ASLTS: Add cases to validate if Type1Opcode is supported at module level

This patch adds module level code execution tests.

test collection: functional
test index in collection: 14
file index: scope.asl 180
            object.asl 181

overall collection: TCLF
overall test index: W01a
overall file index: scope.asl z180
                    object.asl z181

The cases can reflect the current MLC support state - ACPICA currently
supports Type1Opcode at module level. All cases should pass with the
existing MLC support.

Signed-off-by: Lv Zheng <lv.zheng@intel.com>

tests/aslts/bin/settings

@@ -13,7 +13,7 @@ INIT_ALL_AVAILABLE_CASES()
 
 	FUNC_COLL="arithmetic bfield constant control descriptor"
 	FUNC_COLL="$FUNC_COLL logic manipulation name reference region synchronization"
-	FUNC_COLL="$FUNC_COLL table"
+	FUNC_COLL="$FUNC_COLL table module"
 
 	# Complex test collection
 

tests/aslts/src/runtime/cntl/common.asl

@@ -1469,7 +1469,8 @@ Name(TNF0, Package() {
 	"reference",
 	"region",
 	"synchronization",
-	"table"
+	"table",
+	"module"
 })
 
 // Names of complex tests
@@ -1709,6 +1710,8 @@ Name(TFN0, Package() {
 	"recursion.asl",
 	"ns-scope.asl",		// 178
 	"ns-fullpath.asl",
+	"scope.asl",
+	"object.asl",
 
 
 // below are incorrect yet:

tests/aslts/src/runtime/cntl/runmode.asl

@@ -66,6 +66,7 @@ Name(W00a, 0) // reference
 Name(W00b, 0) // region
 Name(W00c, 0) // synchronization
 Name(W00d, 0) // table
+Name(W01a, 0) // module
 
 // COMPLEX
 

tests/aslts/src/runtime/collections/functional/README

@@ -23,6 +23,7 @@ CONTENTS
 11 | region          | Operation Regions                     |
 12 | synchronization | Synchronization                       |
 13 | table           | ACPI table management                 |
+14 | module          | Module level code execution           |
    ___________________________________________________________
 
 FULL

tests/aslts/src/runtime/collections/functional/module/DECL.asl

@@ -0,0 +1,31 @@
+/*
+ * Some or all of this work - Copyright (c) 2006 - 2016, Intel Corp.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * Neither the name of Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+Include("../../../../runtime/collections/functional/module/scope.asl")
+Include("../../../../runtime/collections/functional/module/object.asl")

tests/aslts/src/runtime/collections/functional/module/MAIN.asl

@@ -0,0 +1,56 @@
+/*
+ * Some or all of this work - Copyright (c) 2006 - 2016, Intel Corp.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * Neither the name of Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+DefinitionBlock(
+	"module.aml",   // Output filename
+	"DSDT",     // Signature
+	0x02,       // DSDT Revision
+	"Intel",    // OEMID
+	"Many",     // TABLE ID
+	0x00000001  // OEM Revision
+	) {
+
+	// All declarations
+	Include("../../../../runtime/cntl/DECL.asl")
+	Include("../../../../runtime/collections/functional/module/DECL.asl")
+
+	Method(MAIN) {
+
+		// Initialization
+		STRT(0)
+
+		// Run verification methods
+		Include("../../../../runtime/collections/functional/module/RUN.asl")
+
+		// Final actions
+		Store(FNSH(), Local7)
+		Store(0, Local7)
+
+		return (Local7)
+	}
+}

tests/aslts/src/runtime/collections/functional/module/Makefile

@@ -0,0 +1,7 @@
+# table
+
+AMLMOD= module
+COLL= ../..
+
+TOP= $(COLL)/../../..
+include $(COLL)/Makefile.install

tests/aslts/src/runtime/collections/functional/module/RUN.asl

@@ -0,0 +1,36 @@
+/*
+ * Some or all of this work - Copyright (c) 2006 - 2016, Intel Corp.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * Neither the name of Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+if (STTT("Module level code execution", TCLF, 14, W01a)) {
+	SRMT("MLS0")
+	MLS0()
+	SRMT("MLO0")
+	MLO0()
+}
+FTTT()

tests/aslts/src/runtime/collections/functional/module/object.asl

@@ -0,0 +1,115 @@
+/*
+ * Some or all of this work - Copyright (c) 2006 - 2016, Intel Corp.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * Neither the name of Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Module level execution under Device/Processor/ThermalZone/PowerResource
+ */
+
+/*
+ * Verify if Type1Opcode (ex., If) is allowed under Device, PowerResource,
+ * Processor, or ThermalZone
+ *
+ * ASL spec state:
+ * 1. DeviceTerm supports ObjectList for ACPI 1.0 ~ ACPI 6.1.
+ * 2. PwerResTerm supports ObjectList for ACPI 1.0 ~ ACPI 6.1.
+ * 3. ProcessorTerm supports ObjectList for ACPI 1.0 ~ ACPI 6.1.
+ * 4. ThermalZoneTerm supports ObjectList for ACPI 1.0 ~ ACPI 6.1.
+ *
+ * AML spec state:
+ * 1. DefDevice supports ObjectList for ACPI 1.0 ~ ACPI 6.0.
+ * 2. DefPowerRes supports ObjectList for ACPI 1.0 ~ ACPI 6.0.
+ * 3. DefProcessor supports ObjectList for ACPI 1.0 ~ ACPI 6.0.
+ * 4. DefThermalZone supports ObjectList for ACPI 1.0 ~ ACPI 6.0.
+ *
+ * It appears the AML interpreter shouldn't support TermList for these
+ * objects as both the ASL grammar and AML grammar doesn't allow it. But
+ * the real world apears not.
+ */
+
+Name(z181, 181)
+
+/* Tests for Type1Opcode */
+
+Name(ml10, 0)
+Name(ml11, 0)
+Name(ml12, 0)
+Name(ml13, 0)
+
+Scope(\_SB)
+{
+	Device(dev0)
+	{
+		if (LEqual(ml10, 0)) {
+			Store(2, ml10)
+		}
+		PowerResource(pr00, 1, 0)
+		{
+			if (LEqual(ml13, 0)) {
+				Store(2, ml13)
+			}
+		}
+	}
+}
+Scope(\_PR)
+{
+	Processor(cpu0, 0, 0xFFFFFFFF, 0)
+	{
+		if (LEqual(ml11, 0)) {
+			Store(2, ml11)
+		}
+	}
+}
+Scope(\_TZ)
+{
+	ThermalZone(thz0)
+	{
+		if (LEqual(ml12, 0)) {
+			Store(2, ml12)
+		}
+	}
+}
+
+Method(MLO0,, Serialized)
+{
+	Name(ts, "MLO0")
+
+	Store("TEST: MLO0, Type1Opcode is executable under objects", Debug)
+
+	if (LNotEqual(ml10, 2)) {
+		err(ts, z181, 0, z181, 0, ml10, 2)
+	}
+	if (LNotEqual(ml11, 2)) {
+		err(ts, z181, 1, z181, 1, ml11, 2)
+	}
+	if (LNotEqual(ml12, 2)) {
+		err(ts, z181, 2, z181, 2, ml12, 2)
+	}
+	if (LNotEqual(ml13, 2)) {
+		err(ts, z181, 3, z181, 3, ml13, 2)
+	}
+}

tests/aslts/src/runtime/collections/functional/module/scope.asl

@@ -0,0 +1,91 @@
+/*
+ * Some or all of this work - Copyright (c) 2006 - 2016, Intel Corp.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * Neither the name of Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Module level execution under DefinitionBlock/Scope
+ */
+
+/*
+ * Verify if Type1Opcode (ex., If) is allowed under DefinitionBlock or
+ * Scope
+ *
+ * ASL spec state:
+ * 1. DefinitionBlockTerm supports TermList for ACPI 1.0 ~ 6.0.
+ * 2. ScopeTerm supports TermList for ACPI 1.0 and ObjectList for
+ *    ACPI 2.0 ~ 6.0.
+ *
+ * AML spec state:
+ * 1. AMLCode supports TermList for ACPI 2.0 ~ 6.0.
+ * 2. DefScope supports ObjectList for ACPI 1.0 and TermList for
+ *    ACPI 2.0 ~ 6.0.
+ *
+ * It appears the AML interpreter should support TermList for both
+ * DefinitionBlock and Scope, but the ASL grammar is not compliant to the
+ * AML grammar and the real world.
+ */
+
+Name(z180, 180)
+
+/* Tests for Type1Opcode */
+
+Name(ml00, 0)
+Name(ml01, 0)
+Name(ml02, 0)
+
+if (LEqual(ml00, 0)) {
+	Store(2, ml00)
+}
+Scope(\)
+{
+	if (LEqual(ml01, 0)) {
+		Store(2, ml01)
+	}
+}
+Scope(\_SB)
+{
+	if (LEqual(ml02, 0)) {
+		Store(2, ml02)
+	}
+}
+
+Method(MLS0,, Serialized)
+{
+	Name(ts, "MLS0")
+
+	Store("TEST: MLS0, Type1Opcode is executable under scopes", Debug)
+
+	if (LNotEqual(ml00, 2)) {
+		err(ts, z180, 0, z180, 0, ml00, 2)
+	}
+	if (LNotEqual(ml01, 2)) {
+		err(ts, z180, 1, z180, 1, ml01, 2)
+	}
+	if (LNotEqual(ml02, 2)) {
+		err(ts, z180, 2, z180, 2, ml02, 2)
+	}
+}