mirror of https://github.com/acpica/acpica/
ASLTS: Add cases to demonstrate MLC order issue
Original ACPICA executes If/Else/While wrapped MLC code block in a deferred way, this patch introduces ASLTS cases to demonstrate this issue. file index: order.asl 182 overall file index: order.asl z182 Signed-off-by: Lv Zheng <lv.zheng@intel.com>
This commit is contained in:
parent
6f52b66ca1
commit
5590b7aee0
|
@ -1712,6 +1712,7 @@ Name(TFN0, Package() {
|
|||
"ns-fullpath.asl",
|
||||
"scope.asl",
|
||||
"object.asl",
|
||||
"order.asl",
|
||||
|
||||
|
||||
// below are incorrect yet:
|
||||
|
|
|
@ -36,5 +36,7 @@ if (STTT("Module level code execution", TCLF, 14, W01a)) {
|
|||
MLO0()
|
||||
SRMT("MLO1")
|
||||
MLO1()
|
||||
SRMT("MLD0")
|
||||
MLD0()
|
||||
}
|
||||
FTTT()
|
||||
|
|
|
@ -0,0 +1,63 @@
|
|||
/*
|
||||
* Some or all of this work - Copyright (c) 2006 - 2016, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* Neither the name of Intel Corporation nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Module level execution order
|
||||
*/
|
||||
|
||||
/*
|
||||
* Verify if module level opcode is executed right in place.
|
||||
*/
|
||||
|
||||
Name(z182, 182)
|
||||
|
||||
/* Tests for Type2Opcode order */
|
||||
|
||||
Name(ml20, 0)
|
||||
Name(ob01, 0)
|
||||
|
||||
if (CondRefOf(ob01))
|
||||
{
|
||||
Store(1, ml20)
|
||||
if (CondRefOf(ob02))
|
||||
{
|
||||
Store(2, ml20)
|
||||
}
|
||||
}
|
||||
Name(ob02, 0)
|
||||
|
||||
Method(MLD0,, Serialized)
|
||||
{
|
||||
Name(ts, "MLD0")
|
||||
|
||||
Store("TEST: MLD0, Type2Opcode is executed right in place", Debug)
|
||||
|
||||
if (LNotEqual(ml20, 1)) {
|
||||
err(ts, z182, 6, z182, 6, ml20, 1)
|
||||
}
|
||||
}
|
Loading…
Reference in New Issue