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primitives: use alias define for SSE2

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This commit is contained in:
Bernhard Miklautz 2013-03-01 08:52:34 +01:00
parent b8a545d9c9
commit eb194014d3
12 changed files with 25 additions and 25 deletions
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2
libfreerdp/primitives/prim_add_opt.c
View File

@ -51,7 +51,7 @@ void primitives_init_add_opt(
#ifdef WITH_IPP
prims->add_16s = (__add_16s_t) ippsAdd_16s;
#elif defined(WITH_SSE2)
if (IsProcessorFeaturePresent(PF_XMMI64_INSTRUCTIONS_AVAILABLE)
if (IsProcessorFeaturePresent(PF_SSE2_INSTRUCTIONS_AVAILABLE)
&& IsProcessorFeaturePresent(PF_SSE3_INSTRUCTIONS_AVAILABLE)) /* for LDDQU */
{
prims->add_16s = sse3_add_16s;

2
libfreerdp/primitives/prim_alphaComp_opt.c
View File

@ -216,7 +216,7 @@ void primitives_init_alphaComp_opt(primitives_t* prims)
#ifdef WITH_IPP
prims->alphaComp_argb = ipp_alphaComp_argb;
#elif defined(WITH_SSE2)
if (IsProcessorFeaturePresent(PF_XMMI64_INSTRUCTIONS_AVAILABLE)
if (IsProcessorFeaturePresent(PF_SSE2_INSTRUCTIONS_AVAILABLE)
&& IsProcessorFeaturePresent(PF_SSE3_INSTRUCTIONS_AVAILABLE)) /* for LDDQU */
{
prims->alphaComp_argb = sse2_alphaComp_argb;

2
libfreerdp/primitives/prim_andor_opt.c
View File

@ -52,7 +52,7 @@ void primitives_init_andor_opt(primitives_t *prims)
prims->andC_32u = (__andC_32u_t) ippsAndC_32u;
prims->orC_32u = (__orC_32u_t) ippsOrC_32u;
#elif defined(WITH_SSE2)
if (IsProcessorFeaturePresent(PF_XMMI64_INSTRUCTIONS_AVAILABLE)
if (IsProcessorFeaturePresent(PF_SSE2_INSTRUCTIONS_AVAILABLE)
&& IsProcessorFeaturePresent(PF_SSE3_INSTRUCTIONS_AVAILABLE))
{
prims->andC_32u = sse3_andC_32u;

2
libfreerdp/primitives/prim_colors_opt.c
View File

@ -546,7 +546,7 @@ pstatus_t neon_yCbCrToRGB_16s16s_P3P3(
void primitives_init_colors_opt(primitives_t* prims)
{
#if defined(WITH_SSE2)
if (IsProcessorFeaturePresent(PF_XMMI64_INSTRUCTIONS_AVAILABLE))
if (IsProcessorFeaturePresent(PF_SSE2_INSTRUCTIONS_AVAILABLE))
{
prims->RGBToRGB_16s8u_P3AC4R = sse2_RGBToRGB_16s8u_P3AC4R;
prims->yCbCrToRGB_16s16s_P3P3 = sse2_yCbCrToRGB_16s16s_P3P3;

2
libfreerdp/primitives/prim_set_opt.c
View File

@ -208,7 +208,7 @@ void primitives_init_set_opt(primitives_t *prims)
prims->set_32u = (__set_32u_t) ipp_wrapper_set_32u;
prims->zero = (__zero_t) ippsZero_8u;
#elif defined(WITH_SSE2)
if (IsProcessorFeaturePresent(PF_XMMI64_INSTRUCTIONS_AVAILABLE))
if (IsProcessorFeaturePresent(PF_SSE2_INSTRUCTIONS_AVAILABLE))
{
prims->set_8u = sse2_set_8u;
prims->set_32s = sse2_set_32s;

2
libfreerdp/primitives/prim_shift_opt.c
View File

@ -67,7 +67,7 @@ void primitives_init_shift_opt(primitives_t *prims)
prims->lShiftC_16u = (__lShiftC_16u_t) ippsLShiftC_16u;
prims->rShiftC_16u = (__rShiftC_16u_t) ippsRShiftC_16u;
#elif defined(WITH_SSE2)
if (IsProcessorFeaturePresent(PF_XMMI64_INSTRUCTIONS_AVAILABLE)
if (IsProcessorFeaturePresent(PF_SSE2_INSTRUCTIONS_AVAILABLE)
&& IsProcessorFeaturePresent(PF_SSE3_INSTRUCTIONS_AVAILABLE))
{
prims->lShiftC_16s = sse2_lShiftC_16s;

2
libfreerdp/primitives/prim_sign_opt.c
View File

@ -140,7 +140,7 @@ void primitives_init_sign_opt(primitives_t *prims)
/* Pick tuned versions if possible. */
/* I didn't spot an IPP version of this. */
#if defined(WITH_SSE2)
if (IsProcessorFeaturePresent(PF_XMMI64_INSTRUCTIONS_AVAILABLE)
if (IsProcessorFeaturePresent(PF_SSE2_INSTRUCTIONS_AVAILABLE)
&& IsProcessorFeaturePresent(PF_SSE3_INSTRUCTIONS_AVAILABLE))
{
prims->sign_16s = ssse3_sign_16s;

4
libfreerdp/primitives/test/prim_test.c
View File

@ -48,8 +48,8 @@ static const flagpair_t flags[] =
#ifdef _M_IX86_AMD64
{ PF_MMX_INSTRUCTIONS_AVAILABLE, "MMX" },
{ PF_3DNOW_INSTRUCTIONS_AVAILABLE, "3DNow" },
{ PF_XMMI_INSTRUCTIONS_AVAILABLE, "SSE" },
{ PF_XMMI64_INSTRUCTIONS_AVAILABLE, "SSE2" },
{ PF_SSE_INSTRUCTIONS_AVAILABLE, "SSE" },
{ PF_SSE2_INSTRUCTIONS_AVAILABLE, "SSE2" },
{ PF_SSE3_INSTRUCTIONS_AVAILABLE, "SSE3" },
#elif defined(_M_ARM)
{ PF_ARM_VFP3, "VFP3" },

6
libfreerdp/primitives/test/test_alphaComp.c
View File

@ -133,7 +133,7 @@ int test_alphaComp_func(void)
(const BYTE *) src2, 4*SRC2_WIDTH,
(BYTE *) dst1, 4*DST_WIDTH, TEST_WIDTH, TEST_HEIGHT);
#ifdef WITH_SSE2
if (IsProcessorFeaturePresent(PF_XMMI64_INSTRUCTIONS_AVAILABLE))
if (IsProcessorFeaturePresent(PF_SSE2_INSTRUCTIONS_AVAILABLE))
{
strcat(testStr, " SSE2");
sse2_alphaComp_argb((const BYTE *) src1, 4*SRC1_WIDTH,
@ -166,7 +166,7 @@ int test_alphaComp_func(void)
error = 1;
}
#ifdef WITH_SSE2
if (IsProcessorFeaturePresent(PF_XMMI64_INSTRUCTIONS_AVAILABLE))
if (IsProcessorFeaturePresent(PF_SSE2_INSTRUCTIONS_AVAILABLE))
{
UINT32 c2 = *PIXEL(dst2a, 4*DST_WIDTH, x, y);
if (colordist(c0, c2) > TOLERANCE)
@ -208,7 +208,7 @@ STD_SPEED_TEST(alphaComp_speed, BYTE, BYTE, int bytes __attribute__((unused)) =
size, size),
#ifdef WITH_SSE2
TRUE, sse2_alphaComp_argb(src1, bytes, src2, bytes, dst, bytes,
size, size), PF_XMMI64_INSTRUCTIONS_AVAILABLE, FALSE,
size, size), PF_SSE2_INSTRUCTIONS_AVAILABLE, FALSE,
#else
FALSE, PRIM_NOP, 0, FALSE,
#endif

8
libfreerdp/primitives/test/test_colors.c
View File

@ -67,7 +67,7 @@ int test_RGBToRGB_16s8u_P3AC4R_func(void)
general_RGBToRGB_16s8u_P3AC4R((const INT16 **) ptrs, 64*2,
(BYTE *) out1, 64*4, &roi);
#ifdef WITH_SSE2
if (IsProcessorFeaturePresent(PF_XMMI64_INSTRUCTIONS_AVAILABLE))
if (IsProcessorFeaturePresent(PF_SSE2_INSTRUCTIONS_AVAILABLE))
{
strcat(testStr, " SSE2");
sse2_RGBToRGB_16s8u_P3AC4R((const INT16 **) ptrs, 64*2,
@ -96,7 +96,7 @@ STD_SPEED_TEST(
#ifdef WITH_SSE2
TRUE, sse2_RGBToRGB_16s8u_P3AC4R(
(const INT16 **) src1, 64*2, (BYTE *) dst, 64*4, &roi64x64),
PF_XMMI64_INSTRUCTIONS_AVAILABLE, FALSE,
PF_SSE2_INSTRUCTIONS_AVAILABLE, FALSE,
#else
FALSE, PRIM_NOP, 0, FALSE,
#endif
@ -175,7 +175,7 @@ int test_yCbCrToRGB_16s16s_P3P3_func(void)
general_yCbCrToRGB_16s16s_P3P3(in, 64*2, out1, 64*2, &roi);
#ifdef WITH_SSE2
if (IsProcessorFeaturePresent(PF_XMMI64_INSTRUCTIONS_AVAILABLE))
if (IsProcessorFeaturePresent(PF_SSE2_INSTRUCTIONS_AVAILABLE))
{
strcat(testStr, " SSE2");
sse2_yCbCrToRGB_16s16s_P3P3(in, 64*2, out2, 64*2, &roi);
@ -201,7 +201,7 @@ STD_SPEED_TEST(
TRUE, general_yCbCrToRGB_16s16s_P3P3(src1, 64*2, dst, 64*2, &roi64x64),
#ifdef WITH_SSE2
TRUE, sse2_yCbCrToRGB_16s16s_P3P3(src1, 64*2, dst, 64*2, &roi64x64),
PF_XMMI64_INSTRUCTIONS_AVAILABLE, FALSE,
PF_SSE2_INSTRUCTIONS_AVAILABLE, FALSE,
#elif defined(WITH_NEON)
TRUE, neon_yCbCrToRGB_16s16s_P3P3(src1, 64*2, dst, 64*2, &roi64x64),
PF_ARM_NEON_INSTRUCTIONS_AVAILABLE, FALSE,

10
libfreerdp/primitives/test/test_set.c
View File

@ -47,7 +47,7 @@ int test_set8u_func(void)
#ifdef WITH_SSE2
/* Test SSE under various alignments */
if (IsProcessorFeaturePresent(PF_XMMI64_INSTRUCTIONS_AVAILABLE))
if (IsProcessorFeaturePresent(PF_SSE2_INSTRUCTIONS_AVAILABLE))
{
strcat(testStr, " SSE2");
for (off=0; off<16; ++off)
@ -127,7 +127,7 @@ int test_set32s_func(void)
#ifdef WITH_SSE2
/* Test SSE under various alignments */
if (IsProcessorFeaturePresent(PF_XMMI64_INSTRUCTIONS_AVAILABLE))
if (IsProcessorFeaturePresent(PF_SSE2_INSTRUCTIONS_AVAILABLE))
{
strcat(testStr, " SSE2");
for (off=0; off<16; ++off) {
@ -190,7 +190,7 @@ int test_set32u_func(void)
#ifdef WITH_SSE2
/* Test SSE under various alignments */
if (IsProcessorFeaturePresent(PF_XMMI64_INSTRUCTIONS_AVAILABLE))
if (IsProcessorFeaturePresent(PF_SSE2_INSTRUCTIONS_AVAILABLE))
{
strcat(testStr, " SSE2");
for (off=0; off<16; ++off) {
@ -253,7 +253,7 @@ static inline void memset32u_naive(
STD_SPEED_TEST(set32u_speed_test, UINT32, UINT32, dst=dst,
TRUE, memset32u_naive(constant, dst, size),
#ifdef WITH_SSE2
TRUE, sse2_set_32u(constant, dst, size), PF_XMMI64_INSTRUCTIONS_AVAILABLE, FALSE,
TRUE, sse2_set_32u(constant, dst, size), PF_SSE2_INSTRUCTIONS_AVAILABLE, FALSE,
#else
FALSE, PRIM_NOP, 0, FALSE,
#endif
@ -285,7 +285,7 @@ static inline void memset32s_naive(
STD_SPEED_TEST(set32s_speed_test, INT32, INT32, dst=dst,
TRUE, memset32s_naive(constant, dst, size),
#ifdef WITH_SSE2
TRUE, sse2_set_32s(constant, dst, size), PF_XMMI64_INSTRUCTIONS_AVAILABLE, FALSE,
TRUE, sse2_set_32s(constant, dst, size), PF_SSE2_INSTRUCTIONS_AVAILABLE, FALSE,
#else
FALSE, PRIM_NOP, 0, FALSE,
#endif

8
libfreerdp/primitives/test/test_shift.c
View File

@ -110,7 +110,7 @@ SHIFT_TEST_FUNC(test_rShift_16u_func, UINT16, "rshift_16u", general_rShiftC_16u,
STD_SPEED_TEST(speed_lShift_16s, INT16, INT16, dst=dst,
TRUE, general_lShiftC_16s(src1, constant, dst, size),
#ifdef WITH_SSE2
TRUE, sse2_lShiftC_16s(src1, constant, dst, size), PF_XMMI64_INSTRUCTIONS_AVAILABLE, FALSE,
TRUE, sse2_lShiftC_16s(src1, constant, dst, size), PF_SSE2_INSTRUCTIONS_AVAILABLE, FALSE,
#else
FALSE, PRIM_NOP, 0, FALSE,
#endif
@ -118,7 +118,7 @@ STD_SPEED_TEST(speed_lShift_16s, INT16, INT16, dst=dst,
STD_SPEED_TEST(speed_lShift_16u, UINT16, UINT16, dst=dst,
TRUE, general_lShiftC_16u(src1, constant, dst, size),
#ifdef WITH_SSE2
TRUE, sse2_lShiftC_16u(src1, constant, dst, size), PF_XMMI64_INSTRUCTIONS_AVAILABLE, FALSE,
TRUE, sse2_lShiftC_16u(src1, constant, dst, size), PF_SSE2_INSTRUCTIONS_AVAILABLE, FALSE,
#else
FALSE, PRIM_NOP, 0, FALSE,
#endif
@ -126,7 +126,7 @@ STD_SPEED_TEST(speed_lShift_16u, UINT16, UINT16, dst=dst,
STD_SPEED_TEST(speed_rShift_16s, INT16, INT16, dst=dst,
TRUE, general_rShiftC_16s(src1, constant, dst, size),
#ifdef WITH_SSE2
TRUE, sse2_rShiftC_16s(src1, constant, dst, size), PF_XMMI64_INSTRUCTIONS_AVAILABLE, FALSE,
TRUE, sse2_rShiftC_16s(src1, constant, dst, size), PF_SSE2_INSTRUCTIONS_AVAILABLE, FALSE,
#else
FALSE, PRIM_NOP, 0, FALSE,
#endif
@ -134,7 +134,7 @@ STD_SPEED_TEST(speed_rShift_16s, INT16, INT16, dst=dst,
STD_SPEED_TEST(speed_rShift_16u, UINT16, UINT16, dst=dst,
TRUE, general_rShiftC_16u(src1, constant, dst, size),
#ifdef WITH_SSE2
TRUE, sse2_rShiftC_16u(src1, constant, dst, size), PF_XMMI64_INSTRUCTIONS_AVAILABLE, FALSE,
TRUE, sse2_rShiftC_16u(src1, constant, dst, size), PF_SSE2_INSTRUCTIONS_AVAILABLE, FALSE,
#else
FALSE, PRIM_NOP, 0, FALSE,
#endif