libfreerdp-primitives: cleanup platform definitions

This commit is contained in:
Marc-André Moreau 2013-01-23 18:39:48 -05:00
parent ec22b89772
commit da3a3d5c9a
13 changed files with 53 additions and 55 deletions

View File

@ -23,6 +23,8 @@
#include <freerdp/api.h>
#include <freerdp/types.h>
#include <winpr/platform.h>
typedef INT32 pstatus_t; /* match IppStatus. */
#define PRIMITIVES_SUCCESS (0) /* match ippStsNoErr */

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@ -281,9 +281,7 @@ PRIM_STATIC pstatus_t ipp_alphaComp_argb(
#endif
/* ------------------------------------------------------------------------- */
void primitives_init_alphaComp(
const primitives_hints_t *hints,
primitives_t *prims)
void primitives_init_alphaComp(const primitives_hints_t* hints, primitives_t* prims)
{
prims->alphaComp_argb = general_alphaComp_argb;
#ifdef WITH_IPP
@ -298,8 +296,7 @@ void primitives_init_alphaComp(
}
/* ------------------------------------------------------------------------- */
void primitives_deinit_alphaComp(
primitives_t *prims)
void primitives_deinit_alphaComp(primitives_t *prims)
{
/* Nothing to do. */
}

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@ -28,7 +28,7 @@
#include "prim_internal.h"
#ifdef ANDROID
#ifdef __ANDROID__
#include "cpu-features.h"
#endif
@ -54,13 +54,7 @@ static primitives_t* pPrimitives = NULL;
#define C_BIT_AVX_AES (1<<24)
/* If x86 */
#if defined(__x86_64) || defined(__x86_64__) || defined(__amd64) \
|| defined(__amd64__) || defined(_M_AMD64) || defined(_M_X64) \
|| defined(i386) || defined(__i386) || defined(__i386__) \
|| defined(_M_IX86) || defined(_X86_)
#ifndef i386
#define i386
#endif
#if defined(_M_IX86_AMD64)
/* If GCC */
#ifdef __GNUC__
@ -78,12 +72,13 @@ static void cpuid(
unsigned *edx)
{
*eax = *ebx = *ecx = *edx = 0;
__asm volatile
(
/* The EBX (or RBX register on x86_64) is used for the PIC base address
* and must not be corrupted by our inline assembly.
*/
# if defined(__i386__)
#ifdef _M_IX86
"mov %%ebx, %%esi;"
"cpuid;"
"xchg %%ebx, %%esi;"
@ -153,15 +148,11 @@ static void set_hints(primitives_hints_t* hints)
/* ------------------------------------------------------------------------- */
#elif defined(__arm__) || defined(__ARM_ARCH_7A__) \
|| defined(__ARM_EABI__) || defined(__ARMEL__) || defined(ANDROID)
#ifndef __arm__
#define __arm__
#endif
#elif defined(_M_ARM)
static UINT32 androidNeon(void)
{
#if ANDROID
#ifdef __ANDROID__
if (android_getCpuFamily() != ANDROID_CPU_FAMILY_ARM) return 0;
UINT64 features = android_getCpuFeatures();
@ -178,8 +169,7 @@ static UINT32 androidNeon(void)
return 0;
}
static void set_hints(
primitives_hints_t *hints)
static void set_hints(primitives_hints_t* hints)
{
/* ARM: TODO */
hints->arm_flags |= androidNeon();
@ -234,9 +224,9 @@ UINT32 primitives_get_flags(const primitives_t* prims)
{
primitives_hints_t* hints = (primitives_hints_t*) (prims->hints);
#ifdef i386
#if defined(_M_IX86_AMD64)
return hints->x86_flags;
#elif defined(__arm__)
#elif defined(_M_ARM)
return hints->arm_flags;
#else
return 0;

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@ -43,7 +43,7 @@ int test_add16s_func(void)
memset(d1, 0, sizeof(d1));
memset(d2, 0, sizeof(d2));
general_add_16s(src1+1, src2+1, d1+1, FUNC_TEST_SIZE);
#ifdef i386
#ifdef _M_IX86_AMD64
if (pflags & PRIM_X86_SSE3_AVAILABLE)
{
strcat(testStr, " SSE3");

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@ -132,7 +132,7 @@ int test_alphaComp_func(void)
general_alphaComp_argb((const BYTE *) src1, 4*SRC1_WIDTH,
(const BYTE *) src2, 4*SRC2_WIDTH,
(BYTE *) dst1, 4*DST_WIDTH, TEST_WIDTH, TEST_HEIGHT);
#ifdef i386
#ifdef _M_IX86_AMD64
if (pflags & PRIM_X86_SSE2_AVAILABLE)
{
strcat(testStr, " SSE2");
@ -165,7 +165,7 @@ int test_alphaComp_func(void)
x, y, s1, s2, c0, c1);
error = 1;
}
#ifdef i386
#ifdef _M_IX86_AMD64
if (pflags & PRIM_X86_SSE2_AVAILABLE)
{
UINT32 c2 = *PIXEL(dst2a, 4*DST_WIDTH, x, y);
@ -185,6 +185,7 @@ int test_alphaComp_func(void)
}
#endif /* i386 */
#ifdef WITH_IPP
{
UINT32 c3 = *PIXEL(dst3, 4*DST_WIDTH, x, y);
if (colordist(c0, c3) > TOLERANCE)
{
@ -192,6 +193,7 @@ int test_alphaComp_func(void)
x, y, s1, s2, c0, c3);
error = 1;
}
}
#endif
}
}

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@ -55,7 +55,7 @@ int test_and_32u_func(void)
++failed;
}
}
#ifdef i386
#ifdef _M_IX86_AMD64
if (pflags & PRIM_X86_SSE3_AVAILABLE)
{
strcat(testStr, " SSE3");
@ -129,7 +129,7 @@ int test_or_32u_func(void)
++failed;
}
}
#ifdef i386
#ifdef _M_IX86_AMD64
if (pflags & PRIM_X86_SSE3_AVAILABLE)
{
strcat(testStr, " SSE3");

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@ -61,7 +61,7 @@ int test_RGBToRGB_16s8u_P3AC4R_func(void)
general_RGBToRGB_16s8u_P3AC4R((const INT16 **) ptrs, 64*2,
(BYTE *) out1, 64*4, &roi);
#ifdef i386
#ifdef _M_IX86_AMD64
if (pflags & PRIM_X86_SSE2_AVAILABLE)
{
strcat(testStr, " SSE2");
@ -167,7 +167,7 @@ int test_yCbCrToRGB_16s16s_P3P3_func(void)
out2[2] = b2;
general_yCbCrToRGB_16s16s_P3P3(in, 64*2, out1, 64*2, &roi);
#ifdef i386
#ifdef _M_IX86_AMD64
if (pflags & PRIM_X86_SSE2_AVAILABLE)
{
strcat(testStr, " SSE2");

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@ -77,7 +77,6 @@ STD_SPEED_TEST(copy8u_speed_test, BYTE, BYTE, dst=dst,
int test_copy8u_speed(void)
{
BYTE ALIGN(src[MAX_TEST_SIZE+4]);
BYTE ALIGN(intervening[MAX_TEST_SIZE*7]);
BYTE ALIGN(dst[MAX_TEST_SIZE+4]);
copy8u_speed_test("copy8u", "aligned", src, NULL, 0, dst,
test_sizes, NUM_TEST_SIZES, MEMCPY_PRETEST_ITERATIONS, TEST_TIME);

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@ -43,7 +43,7 @@ int test_set8u_func(void)
UINT32 pflags = primitives_get_flags(primitives_get());
testStr[0] = '\0';
#ifdef i386
#ifdef _M_IX86_AMD64
/* Test SSE under various alignments */
if (pflags & PRIM_X86_SSE2_AVAILABLE)
{
@ -121,10 +121,10 @@ int test_set32s_func(void)
int failed = 0;
int off;
char testStr[256];
UINT32 pflags = primitives_get_flags(primitives_get());
UINT32 pflags = primitives_get_flags(prims);
testStr[0] = '\0';
#ifdef i386
#ifdef _M_IX86_AMD64
/* Test SSE under various alignments */
if (pflags & PRIM_X86_SSE2_AVAILABLE)
{
@ -184,10 +184,10 @@ int test_set32u_func(void)
int failed = 0;
int off;
char testStr[256];
UINT32 pflags = primitives_get_flags(primitives_get());
UINT32 pflags = primitives_get_flags(prims);
testStr[0] = '\0';
#ifdef i386
#ifdef _M_IX86_AMD64
/* Test SSE under various alignments */
if (pflags & PRIM_X86_SSE2_AVAILABLE)
{

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@ -47,7 +47,7 @@ extern pstatus_t sse2_rShiftC_16u(
extern pstatus_t sse2_shiftC_16u(
const UINT16 *pSrc, int val, UINT16 *pDst, int len);
#ifdef i386
#ifdef _M_IX86_AMD64
#define SHIFT_TEST_FUNC(_name_, _type_, _str_, _f1_, _f2_) \
int _name_(void) \
{ \

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@ -37,7 +37,7 @@ int test_sign16s_func(void)
testStr[0] = '\0';
get_random_data(src, sizeof(src));
general_sign_16s(src+1, d1+1, 65535);
#ifdef i386
#ifdef _M_IX86_AMD64
if (pflags & PRIM_X86_SSSE3_AVAILABLE)
{
strcat(testStr, " SSSE3");
@ -57,7 +57,7 @@ int test_sign16s_func(void)
/* Test when we cannot reach 16-byte alignment */
get_random_data(src, sizeof(src));
general_sign_16s(src+1, d1+2, 65535);
#ifdef i386
#ifdef _M_IX86_AMD64
if (pflags & PRIM_X86_SSSE3_AVAILABLE)
{
ssse3_sign_16s(src+1, d2+2, 65535);

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@ -53,6 +53,14 @@
#endif
#endif
/* Intel x86 or AMD64 (_M_IX86_AMD64) */
#if defined(_M_IX86) || defined(_M_AMD64)
#ifndef _M_IX86_AMD64
#define _M_IX86_AMD64 1
#endif
#endif
/* ARM (_M_ARM) */
#if defined(__arm__) || defined(__thumb__) || \

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@ -80,7 +80,7 @@ void GetSystemInfo(LPSYSTEM_INFO lpSystemInfo)
lpSystemInfo->dwPageSize = 0;
lpSystemInfo->lpMinimumApplicationAddress = NULL;
lpSystemInfo->lpMaximumApplicationAddress = NULL;
lpSystemInfo->dwActiveProcessorMask = NULL;
lpSystemInfo->dwActiveProcessorMask = 0;
lpSystemInfo->dwNumberOfProcessors = 0;
lpSystemInfo->dwProcessorType = 0;