2013-02-21 14:45:10 +04:00
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/* FreeRDP: A Remote Desktop Protocol Client
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* Optimized sign operations.
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* vi:ts=4 sw=4:
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*
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* (c) Copyright 2012 Hewlett-Packard Development Company, L.P.
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License. You may obtain
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* a copy of the License at http://www.apache.org/licenses/LICENSE-2.0.
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express
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* or implied. See the License for the specific language governing
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* permissions and limitations under the License.
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*/
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2022-02-16 13:20:38 +03:00
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#include <freerdp/config.h>
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2013-02-21 14:45:10 +04:00
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#include <freerdp/types.h>
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#include <freerdp/primitives.h>
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2013-02-27 18:58:06 +04:00
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#include <winpr/sysinfo.h>
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2013-02-21 14:45:10 +04:00
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#ifdef WITH_SSE2
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#include <emmintrin.h>
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#include <tmmintrin.h>
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#endif /* WITH_SSE2 */
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#include "prim_internal.h"
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2016-04-05 18:07:45 +03:00
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static primitives_t* generic = NULL;
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2013-02-21 14:45:10 +04:00
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#ifdef WITH_SSE2
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/* ------------------------------------------------------------------------- */
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2023-08-22 16:43:51 +03:00
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static pstatus_t ssse3_sign_16s(const INT16* WINPR_RESTRICT pSrc, INT16* WINPR_RESTRICT pDst,
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UINT32 len)
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2013-02-21 14:45:10 +04:00
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{
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2019-11-06 17:24:51 +03:00
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const INT16* sptr = (const INT16*)pSrc;
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INT16* dptr = (INT16*)pDst;
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2013-02-21 14:45:10 +04:00
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size_t count;
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if (len < 16)
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{
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2016-04-05 18:07:45 +03:00
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return generic->sign_16s(pSrc, pDst, len);
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2013-02-21 14:45:10 +04:00
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}
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/* Check for 16-byte alignment (eventually). */
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2019-11-06 17:24:51 +03:00
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if ((ULONG_PTR)pDst & 0x01)
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2013-02-21 14:45:10 +04:00
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{
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2016-04-05 18:07:45 +03:00
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return generic->sign_16s(pSrc, pDst, len);
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2013-02-21 14:45:10 +04:00
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}
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/* Seek 16-byte alignment. */
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2019-11-06 17:24:51 +03:00
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while ((ULONG_PTR)dptr & 0x0f)
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2013-02-21 14:45:10 +04:00
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{
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INT16 src = *sptr++;
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*dptr++ = (src < 0) ? (-1) : ((src > 0) ? 1 : 0);
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2016-04-05 18:07:45 +03:00
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2019-11-06 17:24:51 +03:00
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if (--len == 0)
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return PRIMITIVES_SUCCESS;
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2013-02-21 14:45:10 +04:00
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}
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/* Do 32-short chunks using 8 XMM registers. */
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2019-11-06 17:24:51 +03:00
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count = len >> 5; /* / 32 */
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len -= count << 5; /* * 32 */
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2016-04-05 18:07:45 +03:00
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2019-11-06 17:24:51 +03:00
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if ((ULONG_PTR)sptr & 0x0f)
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2013-02-21 14:45:10 +04:00
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{
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/* Unaligned */
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while (count--)
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{
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__m128i xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7;
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xmm0 = _mm_set1_epi16(0x0001U);
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xmm1 = _mm_set1_epi16(0x0001U);
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xmm2 = _mm_set1_epi16(0x0001U);
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xmm3 = _mm_set1_epi16(0x0001U);
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2021-08-02 13:13:34 +03:00
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xmm4 = _mm_lddqu_si128((const __m128i*)sptr);
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2016-04-05 18:07:45 +03:00
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sptr += 8;
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2021-08-02 13:13:34 +03:00
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xmm5 = _mm_lddqu_si128((const __m128i*)sptr);
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2016-04-05 18:07:45 +03:00
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sptr += 8;
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2021-08-02 13:13:34 +03:00
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xmm6 = _mm_lddqu_si128((const __m128i*)sptr);
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2016-04-05 18:07:45 +03:00
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sptr += 8;
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2021-08-02 13:13:34 +03:00
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xmm7 = _mm_lddqu_si128((const __m128i*)sptr);
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2016-04-05 18:07:45 +03:00
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sptr += 8;
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2013-02-21 14:45:10 +04:00
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xmm0 = _mm_sign_epi16(xmm0, xmm4);
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xmm1 = _mm_sign_epi16(xmm1, xmm5);
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xmm2 = _mm_sign_epi16(xmm2, xmm6);
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xmm3 = _mm_sign_epi16(xmm3, xmm7);
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2021-09-07 09:31:07 +03:00
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_mm_store_si128((__m128i*)dptr, xmm0);
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2016-04-05 18:07:45 +03:00
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dptr += 8;
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2021-09-07 09:31:07 +03:00
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_mm_store_si128((__m128i*)dptr, xmm1);
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2016-04-05 18:07:45 +03:00
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dptr += 8;
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2021-09-07 09:31:07 +03:00
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_mm_store_si128((__m128i*)dptr, xmm2);
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2016-04-05 18:07:45 +03:00
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dptr += 8;
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2021-09-07 09:31:07 +03:00
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_mm_store_si128((__m128i*)dptr, xmm3);
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2016-04-05 18:07:45 +03:00
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dptr += 8;
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2013-02-21 14:45:10 +04:00
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}
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}
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else
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{
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/* Aligned */
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while (count--)
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{
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__m128i xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7;
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xmm0 = _mm_set1_epi16(0x0001U);
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xmm1 = _mm_set1_epi16(0x0001U);
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xmm2 = _mm_set1_epi16(0x0001U);
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xmm3 = _mm_set1_epi16(0x0001U);
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2021-08-02 13:13:34 +03:00
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xmm4 = _mm_load_si128((const __m128i*)sptr);
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2016-04-05 18:07:45 +03:00
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sptr += 8;
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2021-08-02 13:13:34 +03:00
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xmm5 = _mm_load_si128((const __m128i*)sptr);
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2016-04-05 18:07:45 +03:00
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sptr += 8;
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2021-08-02 13:13:34 +03:00
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xmm6 = _mm_load_si128((const __m128i*)sptr);
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2016-04-05 18:07:45 +03:00
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sptr += 8;
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2021-08-02 13:13:34 +03:00
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xmm7 = _mm_load_si128((const __m128i*)sptr);
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2016-04-05 18:07:45 +03:00
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sptr += 8;
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2013-02-21 14:45:10 +04:00
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xmm0 = _mm_sign_epi16(xmm0, xmm4);
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xmm1 = _mm_sign_epi16(xmm1, xmm5);
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xmm2 = _mm_sign_epi16(xmm2, xmm6);
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xmm3 = _mm_sign_epi16(xmm3, xmm7);
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2021-09-07 09:31:07 +03:00
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_mm_store_si128((__m128i*)dptr, xmm0);
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2016-04-05 18:07:45 +03:00
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dptr += 8;
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2021-09-07 09:31:07 +03:00
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_mm_store_si128((__m128i*)dptr, xmm1);
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2016-04-05 18:07:45 +03:00
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dptr += 8;
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2021-09-07 09:31:07 +03:00
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_mm_store_si128((__m128i*)dptr, xmm2);
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2016-04-05 18:07:45 +03:00
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dptr += 8;
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2021-09-07 09:31:07 +03:00
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_mm_store_si128((__m128i*)dptr, xmm3);
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2016-04-05 18:07:45 +03:00
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dptr += 8;
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2013-02-21 14:45:10 +04:00
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}
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}
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/* Do 8-short chunks using two XMM registers. */
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count = len >> 3;
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len -= count << 3;
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2016-04-05 18:07:45 +03:00
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2013-02-21 14:45:10 +04:00
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while (count--)
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{
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__m128i xmm0 = _mm_set1_epi16(0x0001U);
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2016-04-05 18:07:45 +03:00
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__m128i xmm1 = LOAD_SI128(sptr);
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sptr += 8;
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2013-02-21 14:45:10 +04:00
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xmm0 = _mm_sign_epi16(xmm0, xmm1);
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2019-11-06 17:24:51 +03:00
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_mm_store_si128((__m128i*)dptr, xmm0);
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2016-04-05 18:07:45 +03:00
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dptr += 8;
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2013-02-21 14:45:10 +04:00
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}
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/* Do leftovers. */
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while (len--)
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{
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INT16 src = *sptr++;
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*dptr++ = (src < 0) ? -1 : ((src > 0) ? 1 : 0);
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}
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return PRIMITIVES_SUCCESS;
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}
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#endif /* WITH_SSE2 */
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/* ------------------------------------------------------------------------- */
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2023-08-22 16:43:51 +03:00
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void primitives_init_sign_opt(primitives_t* WINPR_RESTRICT prims)
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2013-02-21 14:45:10 +04:00
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{
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2016-04-05 18:07:45 +03:00
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generic = primitives_get_generic();
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primitives_init_sign(prims);
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2013-02-21 14:45:10 +04:00
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/* Pick tuned versions if possible. */
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/* I didn't spot an IPP version of this. */
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#if defined(WITH_SSE2)
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2016-04-05 18:07:45 +03:00
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2019-11-06 17:24:51 +03:00
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if (IsProcessorFeaturePresentEx(PF_EX_SSSE3) &&
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IsProcessorFeaturePresent(PF_SSE3_INSTRUCTIONS_AVAILABLE))
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2013-02-21 14:45:10 +04:00
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{
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2019-11-06 17:24:51 +03:00
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prims->sign_16s = ssse3_sign_16s;
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2013-02-21 14:45:10 +04:00
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}
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2016-04-05 18:07:45 +03:00
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2013-02-21 14:45:10 +04:00
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#endif
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}
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