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Bochs/bochs/cpu/decoder
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Stanislav Shwartsman 81edc636d4 remove duplicate opcodes from decoder definitions
2020-03-28 14:36:27 +00:00
..
decoder.h
Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071
2019-12-20 07:42:07 +00:00
disasm.cc
…
fetchdecode32.cc
add into ia_opcodes.def disasm field for every instruction
2020-03-28 14:23:54 +00:00
fetchdecode64.cc
fixed recent segoverride assignment bug in SVN
2020-02-28 15:03:52 +00:00
fetchdecode_avx.h
remove duplicate opcodes from decoder definitions
2020-03-28 14:36:27 +00:00
fetchdecode_evex.h
AVX512: VPBROADCASTB/W/D/Q with GPR source are only reg/reg
2019-12-21 18:29:51 +00:00
fetchdecode_opmap_0f3a.h
fix decoder: SHA1RNDS4 instruction should be with no SSE prefix
2019-12-27 13:08:20 +00:00
fetchdecode_opmap_0f38.h
Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071
2019-12-20 07:42:07 +00:00
fetchdecode_opmap.h
Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071
2019-12-20 07:42:07 +00:00
fetchdecode_x87.h
…
fetchdecode_xop.h
…
fetchdecode.h
use enums for assign_srcs error output - help with debugging unexpected #UD cases
2019-12-27 19:34:32 +00:00
ia_opcodes.def
remove duplicate opcodes from decoder definitions
2020-03-28 14:36:27 +00:00
ia_opcodes.h
add into ia_opcodes.def disasm field for every instruction
2020-03-28 14:23:54 +00:00
instr.h
CET: DS Seg override is kept for CET Endranch suppress hint even if overridden by other prefixes later
2020-02-21 19:38:23 +00:00