f850a6df1f
- put /*comments symbols*/ around any chars after #endif. Other compilers do not get it. - fix cases in which a pointer is cast to a 32-bit int, then back to a pointer. This breaks on a machine with 64-bit pointers. Examples: FPU_sub arg 2 and FPU_div arg 2. The int->ptr->int conversions are now done more safely by macros REGNO2PTR and PTR2INT. - use GCC_ATTRIBUTE macro instead of __attribute__. For compilers that do not support __attribute__, the macro can be defined to be nothing. - in fpu_entry.c, arg1 of FPU_load_int32 is (s32*), but the calls to it cast their data to (u32*). - if compiler does NOT inline functions in poly.h, the "extern inline" setting caused duplicate symbols to be created. Changed them to "static inline" so that the mul_32_32 from different .c files do not conflict. - implemented setcc so that it doesn't use curly brackets inside parens - comment out sigcontext structure definition, which conflicts with non-linux or non-intel operating systems. It's not used by bochs anyway.
175 lines
3.1 KiB
C
175 lines
3.1 KiB
C
/*---------------------------------------------------------------------------+
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| fpu_arith.c |
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| Code to implement the FPU register/register arithmetic instructions |
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| Copyright (C) 1992,1993,1997 |
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| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia |
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| E-mail billm@suburbia.net |
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+---------------------------------------------------------------------------*/
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#include "fpu_system.h"
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#include "fpu_emu.h"
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#include "control_w.h"
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#include "status_w.h"
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void fadd__()
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{
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/* fadd st,st(i) */
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int i = FPU_rm;
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clear_C1();
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FPU_add(&st(i), FPU_gettagi(i), 0, control_word);
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}
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void fmul__()
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{
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/* fmul st,st(i) */
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int i = FPU_rm;
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clear_C1();
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FPU_mul(&st(i), FPU_gettagi(i), 0, control_word);
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}
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void fsub__()
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{
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/* fsub st,st(i) */
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clear_C1();
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FPU_sub(0, REGNO2PTR(FPU_rm), control_word);
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}
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void fsubr_()
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{
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/* fsubr st,st(i) */
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clear_C1();
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FPU_sub(REV, REGNO2PTR(FPU_rm), control_word);
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}
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void fdiv__()
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{
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/* fdiv st,st(i) */
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clear_C1();
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FPU_div(0, REGNO2PTR(FPU_rm), control_word);
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}
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void fdivr_()
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{
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/* fdivr st,st(i) */
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clear_C1();
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FPU_div(REV, REGNO2PTR(FPU_rm), control_word);
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}
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void fadd_i()
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{
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/* fadd st(i),st */
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int i = FPU_rm;
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clear_C1();
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FPU_add(&st(i), FPU_gettagi(i), i, control_word);
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}
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void fmul_i()
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{
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/* fmul st(i),st */
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clear_C1();
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FPU_mul(&st(0), FPU_gettag0(), FPU_rm, control_word);
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}
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void fsubri()
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{
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/* fsubr st(i),st */
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clear_C1();
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FPU_sub(DEST_RM, REGNO2PTR(FPU_rm), control_word);
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}
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void fsub_i()
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{
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/* fsub st(i),st */
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clear_C1();
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FPU_sub(REV|DEST_RM, REGNO2PTR(FPU_rm), control_word);
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}
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void fdivri()
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{
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/* fdivr st(i),st */
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clear_C1();
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FPU_div(DEST_RM, REGNO2PTR(FPU_rm), control_word);
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}
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void fdiv_i()
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{
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/* fdiv st(i),st */
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clear_C1();
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FPU_div(REV|DEST_RM, REGNO2PTR(FPU_rm), control_word);
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}
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void faddp_()
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{
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/* faddp st(i),st */
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int i = FPU_rm;
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clear_C1();
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if ( FPU_add(&st(i), FPU_gettagi(i), i, control_word) >= 0 )
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FPU_pop();
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}
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void fmulp_()
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{
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/* fmulp st(i),st */
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clear_C1();
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if ( FPU_mul(&st(0), FPU_gettag0(), FPU_rm, control_word) >= 0 )
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FPU_pop();
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}
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void fsubrp()
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{
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/* fsubrp st(i),st */
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clear_C1();
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if ( FPU_sub(DEST_RM, REGNO2PTR(FPU_rm), control_word) >= 0 )
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FPU_pop();
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}
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void fsubp_()
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{
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/* fsubp st(i),st */
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clear_C1();
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if ( FPU_sub(REV|DEST_RM, REGNO2PTR(FPU_rm), control_word) >= 0 )
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FPU_pop();
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}
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void fdivrp()
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{
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/* fdivrp st(i),st */
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clear_C1();
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if ( FPU_div(DEST_RM, REGNO2PTR(FPU_rm), control_word) >= 0 )
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FPU_pop();
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}
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void fdivp_()
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{
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/* fdivp st(i),st */
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clear_C1();
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if ( FPU_div(REV|DEST_RM, REGNO2PTR(FPU_rm), control_word) >= 0 )
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FPU_pop();
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}
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