6252632e31
I saw that issue under gcc 4.9.0. for some reason gcc 4.9.0 didn't optimize next handler call in all fpu opcode handlers. As result, instead of finishing the handler and jumping to next one, the next handler is called blowing up stack. After some long period stack overflow might occur. The fix simply limit the max chaining depth to 1000 traces (should be enough) The same fix should be able to address the stack overflow problem when compiling with -O0 and handlers chaining speedup enabled.
755 lines
22 KiB
C++
755 lines
22 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2013 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#include "cpustats.h"
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void BX_CPU_C::cpu_loop(void)
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{
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR break_point = 0;
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BX_CPU_THIS_PTR magic_break = 0;
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BX_CPU_THIS_PTR stop_reason = STOP_NO_REASON;
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#endif
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if (setjmp(BX_CPU_THIS_PTR jmp_buf_env)) {
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// can get here only from exception function or VMEXIT
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BX_CPU_THIS_PTR icount++;
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BX_SYNC_TIME_IF_SINGLE_PROCESSOR(0);
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#if BX_DEBUGGER || BX_GDBSTUB
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if (dbg_instruction_epilog()) return;
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#endif
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#if BX_GDBSTUB
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if (bx_dbg.gdbstub_enabled) return;
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#endif
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}
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// If the exception() routine has encountered a nasty fault scenario,
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// the debugger may request that control is returned to it so that
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// the situation may be examined.
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#if BX_DEBUGGER
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if (bx_guard.interrupt_requested) return;
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#endif
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// We get here either by a normal function call, or by a longjmp
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// back from an exception() call. In either case, commit the
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// new EIP/ESP, and set up other environmental fields. This code
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// mirrors similar code below, after the interrupt() call.
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BX_CPU_THIS_PTR prev_rip = RIP; // commit new EIP
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BX_CPU_THIS_PTR speculative_rsp = 0;
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while (1) {
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// check on events which occurred for previous instructions (traps)
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// and ones which are asynchronous to the CPU (hardware interrupts)
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if (BX_CPU_THIS_PTR async_event) {
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if (handleAsyncEvent()) {
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// If request to return to caller ASAP.
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return;
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}
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}
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bxICacheEntry_c *entry = getICacheEntry();
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bxInstruction_c *i = entry->i;
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#if BX_SUPPORT_HANDLERS_CHAINING_SPEEDUPS
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for(;;) {
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// want to allow changing of the instruction inside instrumentation callback
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BX_INSTR_BEFORE_EXECUTION(BX_CPU_ID, i);
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RIP += i->ilen();
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// when handlers chaining is enabled this single call will execute entire trace
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BX_CPU_CALL_METHOD(i->execute1, (i)); // might iterate repeat instruction
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BX_SYNC_TIME_IF_SINGLE_PROCESSOR(0);
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if (BX_CPU_THIS_PTR async_event) break;
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i = getICacheEntry()->i;
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}
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#else // BX_SUPPORT_HANDLERS_CHAINING_SPEEDUPS == 0
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bxInstruction_c *last = i + (entry->tlen);
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for(;;) {
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#if BX_DEBUGGER
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if (BX_CPU_THIS_PTR trace)
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debug_disasm_instruction(BX_CPU_THIS_PTR prev_rip);
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#endif
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// want to allow changing of the instruction inside instrumentation callback
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BX_INSTR_BEFORE_EXECUTION(BX_CPU_ID, i);
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RIP += i->ilen();
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BX_CPU_CALL_METHOD(i->execute1, (i)); // might iterate repeat instruction
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BX_CPU_THIS_PTR prev_rip = RIP; // commit new RIP
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BX_INSTR_AFTER_EXECUTION(BX_CPU_ID, i);
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BX_CPU_THIS_PTR icount++;
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BX_SYNC_TIME_IF_SINGLE_PROCESSOR(0);
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// note instructions generating exceptions never reach this point
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#if BX_DEBUGGER || BX_GDBSTUB
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if (dbg_instruction_epilog()) return;
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#endif
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if (BX_CPU_THIS_PTR async_event) break;
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if (++i == last) {
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entry = getICacheEntry();
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i = entry->i;
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last = i + (entry->tlen);
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}
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}
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#endif
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// clear stop trace magic indication that probably was set by repeat or branch32/64
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BX_CPU_THIS_PTR async_event &= ~BX_ASYNC_EVENT_STOP_TRACE;
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} // while (1)
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}
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#if BX_SUPPORT_SMP
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void BX_CPU_C::cpu_run_trace(void)
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{
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if (setjmp(BX_CPU_THIS_PTR jmp_buf_env)) {
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// can get here only from exception function or VMEXIT
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BX_CPU_THIS_PTR icount++;
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return;
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}
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// check on events which occurred for previous instructions (traps)
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// and ones which are asynchronous to the CPU (hardware interrupts)
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if (BX_CPU_THIS_PTR async_event) {
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if (handleAsyncEvent()) {
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// If request to return to caller ASAP.
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return;
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}
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}
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bxICacheEntry_c *entry = getICacheEntry();
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bxInstruction_c *i = entry->i;
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#if BX_SUPPORT_HANDLERS_CHAINING_SPEEDUPS
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// want to allow changing of the instruction inside instrumentation callback
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BX_INSTR_BEFORE_EXECUTION(BX_CPU_ID, i);
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RIP += i->ilen();
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// when handlers chaining is enabled this single call will execute entire trace
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BX_CPU_CALL_METHOD(i->execute1, (i)); // might iterate repeat instruction
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if (BX_CPU_THIS_PTR async_event) {
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// clear stop trace magic indication that probably was set by repeat or branch32/64
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BX_CPU_THIS_PTR async_event &= ~BX_ASYNC_EVENT_STOP_TRACE;
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}
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#else
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bxInstruction_c *last = i + (entry->tlen);
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for(;;) {
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// want to allow changing of the instruction inside instrumentation callback
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BX_INSTR_BEFORE_EXECUTION(BX_CPU_ID, i);
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RIP += i->ilen();
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BX_CPU_CALL_METHOD(i->execute1, (i)); // might iterate repeat instruction
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BX_CPU_THIS_PTR prev_rip = RIP; // commit new RIP
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BX_INSTR_AFTER_EXECUTION(BX_CPU_ID, i);
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BX_CPU_THIS_PTR icount++;
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if (BX_CPU_THIS_PTR async_event) {
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// clear stop trace magic indication that probably was set by repeat or branch32/64
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BX_CPU_THIS_PTR async_event &= ~BX_ASYNC_EVENT_STOP_TRACE;
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break;
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}
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if (++i == last) break;
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}
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#endif // BX_SUPPORT_HANDLERS_CHAINING_SPEEDUPS
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}
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#endif
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bxICacheEntry_c* BX_CPU_C::getICacheEntry(void)
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{
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bx_address eipBiased = RIP + BX_CPU_THIS_PTR eipPageBias;
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if (eipBiased >= BX_CPU_THIS_PTR eipPageWindowSize) {
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prefetch();
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eipBiased = RIP + BX_CPU_THIS_PTR eipPageBias;
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}
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INC_ICACHE_STAT(iCacheLookups);
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bx_phy_address pAddr = BX_CPU_THIS_PTR pAddrFetchPage + eipBiased;
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bxICacheEntry_c *entry = BX_CPU_THIS_PTR iCache.find_entry(pAddr, BX_CPU_THIS_PTR fetchModeMask);
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if (entry == NULL)
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{
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// iCache miss. No validated instruction with matching fetch parameters
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// is in the iCache.
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INC_ICACHE_STAT(iCacheMisses);
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entry = serveICacheMiss(entry, (Bit32u) eipBiased, pAddr);
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}
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return entry;
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}
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#if BX_SUPPORT_HANDLERS_CHAINING_SPEEDUPS && BX_ENABLE_TRACE_LINKING
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// The function is called after taken branch instructions and tries to link the branch to the next trace
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::linkTrace(bxInstruction_c *i)
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{
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#if BX_SUPPORT_SMP
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if (BX_SMP_PROCESSORS > 1)
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return;
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#endif
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#define BX_HANDLERS_CHAINING_MAX_DEPTH 1000
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// do not allow extreme trace link depth / avoid host stack overflow
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// (could happen with badly compiled instruction handlers)
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static Bit32u linkDepth = 0;
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if (BX_CPU_THIS_PTR async_event || ++linkDepth > BX_HANDLERS_CHAINING_MAX_DEPTH) {
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linkDepth = 0;
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return;
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}
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Bit32u delta = (Bit32u) (BX_CPU_THIS_PTR icount - BX_CPU_THIS_PTR icount_last_sync);
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if(delta >= bx_pc_system.getNumCpuTicksLeftNextEvent()) {
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linkDepth = 0;
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return;
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}
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bxInstruction_c *next = i->getNextTrace(BX_CPU_THIS_PTR iCache.traceLinkTimeStamp);
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if (next) {
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bx_address eipBiased = RIP + BX_CPU_THIS_PTR eipPageBias;
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if (eipBiased >= BX_CPU_THIS_PTR eipPageWindowSize) {
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prefetch();
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}
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BX_EXECUTE_INSTRUCTION(next);
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return;
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}
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bx_address eipBiased = RIP + BX_CPU_THIS_PTR eipPageBias;
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if (eipBiased >= BX_CPU_THIS_PTR eipPageWindowSize) {
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prefetch();
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eipBiased = RIP + BX_CPU_THIS_PTR eipPageBias;
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}
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INC_ICACHE_STAT(iCacheLookups);
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bx_phy_address pAddr = BX_CPU_THIS_PTR pAddrFetchPage + eipBiased;
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bxICacheEntry_c *entry = BX_CPU_THIS_PTR iCache.find_entry(pAddr, BX_CPU_THIS_PTR fetchModeMask);
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if (entry != NULL) // link traces - handle only hit cases
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{
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i->setNextTrace(entry->i, BX_CPU_THIS_PTR iCache.traceLinkTimeStamp);
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i = entry->i;
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BX_EXECUTE_INSTRUCTION(i);
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}
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}
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#endif
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#define BX_REPEAT_TIME_UPDATE_INTERVAL (BX_MAX_TRACE_LENGTH-1)
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void BX_CPP_AttrRegparmN(2) BX_CPU_C::repeat(bxInstruction_c *i, BxRepIterationPtr_tR execute)
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{
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// non repeated instruction
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if (! i->repUsedL()) {
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BX_CPU_CALL_REP_ITERATION(execute, (i));
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return;
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}
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#if BX_X86_DEBUGGER
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BX_CPU_THIS_PTR in_repeat = 0;
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#endif
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#if BX_SUPPORT_X86_64
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if (i->as64L()) {
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while(1) {
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if (RCX != 0) {
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BX_CPU_CALL_REP_ITERATION(execute, (i));
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BX_INSTR_REPEAT_ITERATION(BX_CPU_ID, i);
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RCX --;
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}
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if (RCX == 0) return;
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#if BX_DEBUGGER == 0
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if (BX_CPU_THIS_PTR async_event)
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#endif
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break; // exit always if debugger enabled
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BX_CPU_THIS_PTR icount++;
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BX_SYNC_TIME_IF_SINGLE_PROCESSOR(BX_REPEAT_TIME_UPDATE_INTERVAL);
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}
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}
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else
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#endif
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if (i->as32L()) {
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while(1) {
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if (ECX != 0) {
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BX_CPU_CALL_REP_ITERATION(execute, (i));
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BX_INSTR_REPEAT_ITERATION(BX_CPU_ID, i);
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RCX = ECX - 1;
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}
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if (ECX == 0) return;
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#if BX_DEBUGGER == 0
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if (BX_CPU_THIS_PTR async_event)
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#endif
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break; // exit always if debugger enabled
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BX_CPU_THIS_PTR icount++;
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BX_SYNC_TIME_IF_SINGLE_PROCESSOR(BX_REPEAT_TIME_UPDATE_INTERVAL);
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}
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}
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else // 16bit addrsize
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{
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while(1) {
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if (CX != 0) {
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BX_CPU_CALL_REP_ITERATION(execute, (i));
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BX_INSTR_REPEAT_ITERATION(BX_CPU_ID, i);
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CX --;
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}
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if (CX == 0) return;
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#if BX_DEBUGGER == 0
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if (BX_CPU_THIS_PTR async_event)
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#endif
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break; // exit always if debugger enabled
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BX_CPU_THIS_PTR icount++;
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BX_SYNC_TIME_IF_SINGLE_PROCESSOR(BX_REPEAT_TIME_UPDATE_INTERVAL);
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}
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}
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#if BX_X86_DEBUGGER
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BX_CPU_THIS_PTR in_repeat = 1;
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#endif
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RIP = BX_CPU_THIS_PTR prev_rip; // repeat loop not done, restore RIP
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// assert magic async_event to stop trace execution
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BX_CPU_THIS_PTR async_event |= BX_ASYNC_EVENT_STOP_TRACE;
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}
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void BX_CPP_AttrRegparmN(2) BX_CPU_C::repeat_ZF(bxInstruction_c *i, BxRepIterationPtr_tR execute)
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{
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unsigned rep = i->lockRepUsedValue();
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// non repeated instruction
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if (rep < 2) {
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BX_CPU_CALL_REP_ITERATION(execute, (i));
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return;
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}
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#if BX_X86_DEBUGGER
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BX_CPU_THIS_PTR in_repeat = 0;
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#endif
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if (rep == 3) { /* repeat prefix 0xF3 */
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#if BX_SUPPORT_X86_64
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if (i->as64L()) {
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while(1) {
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if (RCX != 0) {
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BX_CPU_CALL_REP_ITERATION(execute, (i));
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BX_INSTR_REPEAT_ITERATION(BX_CPU_ID, i);
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RCX --;
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}
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if (! get_ZF() || RCX == 0) return;
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#if BX_DEBUGGER == 0
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if (BX_CPU_THIS_PTR async_event)
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#endif
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break; // exit always if debugger enabled
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BX_CPU_THIS_PTR icount++;
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BX_SYNC_TIME_IF_SINGLE_PROCESSOR(BX_REPEAT_TIME_UPDATE_INTERVAL);
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}
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}
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else
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#endif
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if (i->as32L()) {
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while(1) {
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if (ECX != 0) {
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BX_CPU_CALL_REP_ITERATION(execute, (i));
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BX_INSTR_REPEAT_ITERATION(BX_CPU_ID, i);
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RCX = ECX - 1;
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}
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if (! get_ZF() || ECX == 0) return;
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#if BX_DEBUGGER == 0
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if (BX_CPU_THIS_PTR async_event)
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#endif
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break; // exit always if debugger enabled
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BX_CPU_THIS_PTR icount++;
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BX_SYNC_TIME_IF_SINGLE_PROCESSOR(BX_REPEAT_TIME_UPDATE_INTERVAL);
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}
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}
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else // 16bit addrsize
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{
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while(1) {
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if (CX != 0) {
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BX_CPU_CALL_REP_ITERATION(execute, (i));
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BX_INSTR_REPEAT_ITERATION(BX_CPU_ID, i);
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CX --;
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}
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if (! get_ZF() || CX == 0) return;
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#if BX_DEBUGGER == 0
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if (BX_CPU_THIS_PTR async_event)
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#endif
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break; // exit always if debugger enabled
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BX_CPU_THIS_PTR icount++;
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BX_SYNC_TIME_IF_SINGLE_PROCESSOR(BX_REPEAT_TIME_UPDATE_INTERVAL);
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}
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}
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}
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else { /* repeat prefix 0xF2 */
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#if BX_SUPPORT_X86_64
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if (i->as64L()) {
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while(1) {
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if (RCX != 0) {
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BX_CPU_CALL_REP_ITERATION(execute, (i));
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BX_INSTR_REPEAT_ITERATION(BX_CPU_ID, i);
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RCX --;
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}
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if (get_ZF() || RCX == 0) return;
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#if BX_DEBUGGER == 0
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if (BX_CPU_THIS_PTR async_event)
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#endif
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break; // exit always if debugger enabled
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BX_CPU_THIS_PTR icount++;
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BX_SYNC_TIME_IF_SINGLE_PROCESSOR(BX_REPEAT_TIME_UPDATE_INTERVAL);
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}
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}
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else
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#endif
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if (i->as32L()) {
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while(1) {
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if (ECX != 0) {
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BX_CPU_CALL_REP_ITERATION(execute, (i));
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BX_INSTR_REPEAT_ITERATION(BX_CPU_ID, i);
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RCX = ECX - 1;
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}
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if (get_ZF() || ECX == 0) return;
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#if BX_DEBUGGER == 0
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if (BX_CPU_THIS_PTR async_event)
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#endif
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break; // exit always if debugger enabled
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BX_CPU_THIS_PTR icount++;
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BX_SYNC_TIME_IF_SINGLE_PROCESSOR(BX_REPEAT_TIME_UPDATE_INTERVAL);
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}
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}
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else // 16bit addrsize
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{
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while(1) {
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if (CX != 0) {
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BX_CPU_CALL_REP_ITERATION(execute, (i));
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BX_INSTR_REPEAT_ITERATION(BX_CPU_ID, i);
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CX --;
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}
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if (get_ZF() || CX == 0) return;
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#if BX_DEBUGGER == 0
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if (BX_CPU_THIS_PTR async_event)
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#endif
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break; // exit always if debugger enabled
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BX_CPU_THIS_PTR icount++;
|
|
|
|
BX_SYNC_TIME_IF_SINGLE_PROCESSOR(BX_REPEAT_TIME_UPDATE_INTERVAL);
|
|
}
|
|
}
|
|
}
|
|
|
|
#if BX_X86_DEBUGGER
|
|
BX_CPU_THIS_PTR in_repeat = 1;
|
|
#endif
|
|
|
|
RIP = BX_CPU_THIS_PTR prev_rip; // repeat loop not done, restore RIP
|
|
|
|
// assert magic async_event to stop trace execution
|
|
BX_CPU_THIS_PTR async_event |= BX_ASYNC_EVENT_STOP_TRACE;
|
|
}
|
|
|
|
// boundaries of consideration:
|
|
//
|
|
// * physical memory boundary: 1024k (1Megabyte) (increments of...)
|
|
// * A20 boundary: 1024k (1Megabyte)
|
|
// * page boundary: 4k
|
|
// * ROM boundary: 2k (dont care since we are only reading)
|
|
// * segment boundary: any
|
|
|
|
void BX_CPU_C::prefetch(void)
|
|
{
|
|
bx_address laddr;
|
|
unsigned pageOffset;
|
|
|
|
INC_ICACHE_STAT(iCachePrefetch);
|
|
|
|
#if BX_SUPPORT_X86_64
|
|
if (long64_mode()) {
|
|
if (! IsCanonical(RIP)) {
|
|
BX_ERROR(("prefetch: #GP(0): RIP crossed canonical boundary"));
|
|
exception(BX_GP_EXCEPTION, 0);
|
|
}
|
|
|
|
// linear address is equal to RIP in 64-bit long mode
|
|
pageOffset = PAGE_OFFSET(EIP);
|
|
laddr = RIP;
|
|
|
|
// Calculate RIP at the beginning of the page.
|
|
BX_CPU_THIS_PTR eipPageBias = pageOffset - RIP;
|
|
BX_CPU_THIS_PTR eipPageWindowSize = 4096;
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
|
|
#if BX_CPU_LEVEL >= 5
|
|
if (USER_PL && BX_CPU_THIS_PTR get_VIP() && BX_CPU_THIS_PTR get_VIF()) {
|
|
if (BX_CPU_THIS_PTR cr4.get_PVI() | (v8086_mode() && BX_CPU_THIS_PTR cr4.get_VME())) {
|
|
BX_ERROR(("prefetch: inconsistent VME state"));
|
|
exception(BX_GP_EXCEPTION, 0);
|
|
}
|
|
}
|
|
#endif
|
|
|
|
BX_CLEAR_64BIT_HIGH(BX_64BIT_REG_RIP); /* avoid 32-bit EIP wrap */
|
|
laddr = get_laddr32(BX_SEG_REG_CS, EIP);
|
|
pageOffset = PAGE_OFFSET(laddr);
|
|
|
|
// Calculate RIP at the beginning of the page.
|
|
BX_CPU_THIS_PTR eipPageBias = (bx_address) pageOffset - EIP;
|
|
|
|
Bit32u limit = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled;
|
|
if (EIP > limit) {
|
|
BX_ERROR(("prefetch: EIP [%08x] > CS.limit [%08x]", EIP, limit));
|
|
exception(BX_GP_EXCEPTION, 0);
|
|
}
|
|
|
|
BX_CPU_THIS_PTR eipPageWindowSize = 4096;
|
|
if (limit + BX_CPU_THIS_PTR eipPageBias < 4096) {
|
|
BX_CPU_THIS_PTR eipPageWindowSize = (Bit32u)(limit + BX_CPU_THIS_PTR eipPageBias + 1);
|
|
}
|
|
}
|
|
|
|
#if BX_X86_DEBUGGER
|
|
if (hwbreakpoint_check(laddr, BX_HWDebugInstruction, BX_HWDebugInstruction)) {
|
|
signal_event(BX_EVENT_CODE_BREAKPOINT_ASSIST);
|
|
if (! interrupts_inhibited(BX_INHIBIT_DEBUG)) {
|
|
// The next instruction could already hit a code breakpoint but
|
|
// async_event won't take effect immediatelly.
|
|
// Check if the next executing instruction hits code breakpoint
|
|
|
|
// check only if not fetching page cross instruction
|
|
// this check is 32-bit wrap safe as well
|
|
if (EIP == (Bit32u) BX_CPU_THIS_PTR prev_rip) {
|
|
Bit32u dr6_bits = code_breakpoint_match(laddr);
|
|
if (dr6_bits & BX_DEBUG_TRAP_HIT) {
|
|
BX_ERROR(("#DB: x86 code breakpoint catched"));
|
|
BX_CPU_THIS_PTR debug_trap |= dr6_bits;
|
|
exception(BX_DB_EXCEPTION, 0);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
else {
|
|
clear_event(BX_EVENT_CODE_BREAKPOINT_ASSIST);
|
|
}
|
|
#endif
|
|
|
|
BX_CPU_THIS_PTR clear_RF();
|
|
|
|
bx_address lpf = LPFOf(laddr);
|
|
unsigned TLB_index = BX_TLB_INDEX_OF(lpf, 0);
|
|
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[TLB_index];
|
|
Bit8u *fetchPtr = 0;
|
|
|
|
if ((tlbEntry->lpf == lpf) && (tlbEntry->accessBits & (0x10 << USER_PL)) != 0) {
|
|
BX_CPU_THIS_PTR pAddrFetchPage = tlbEntry->ppf;
|
|
fetchPtr = (Bit8u*) tlbEntry->hostPageAddr;
|
|
}
|
|
else {
|
|
bx_phy_address pAddr = translate_linear(tlbEntry, laddr, USER_PL, BX_EXECUTE);
|
|
BX_CPU_THIS_PTR pAddrFetchPage = PPFOf(pAddr);
|
|
}
|
|
|
|
if (fetchPtr) {
|
|
BX_CPU_THIS_PTR eipFetchPtr = fetchPtr;
|
|
}
|
|
else {
|
|
BX_CPU_THIS_PTR eipFetchPtr = (const Bit8u*) getHostMemAddr(BX_CPU_THIS_PTR pAddrFetchPage, BX_EXECUTE);
|
|
|
|
// Sanity checks
|
|
if (! BX_CPU_THIS_PTR eipFetchPtr) {
|
|
bx_phy_address pAddr = BX_CPU_THIS_PTR pAddrFetchPage + pageOffset;
|
|
if (pAddr >= BX_MEM(0)->get_memory_len()) {
|
|
BX_PANIC(("prefetch: running in bogus memory, pAddr=0x" FMT_PHY_ADDRX, pAddr));
|
|
}
|
|
else {
|
|
BX_PANIC(("prefetch: getHostMemAddr vetoed direct read, pAddr=0x" FMT_PHY_ADDRX, pAddr));
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
#if BX_DEBUGGER || BX_GDBSTUB
|
|
bx_bool BX_CPU_C::dbg_instruction_epilog(void)
|
|
{
|
|
#if BX_DEBUGGER
|
|
bx_address debug_eip = RIP;
|
|
Bit16u cs = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
|
|
|
|
BX_CPU_THIS_PTR guard_found.cs = cs;
|
|
BX_CPU_THIS_PTR guard_found.eip = debug_eip;
|
|
BX_CPU_THIS_PTR guard_found.laddr = get_laddr(BX_SEG_REG_CS, debug_eip);
|
|
BX_CPU_THIS_PTR guard_found.code_32_64 = BX_CPU_THIS_PTR fetchModeMask;
|
|
|
|
//
|
|
// Take care of break point conditions generated during instruction execution
|
|
//
|
|
|
|
// Check if we hit read/write or time breakpoint
|
|
if (BX_CPU_THIS_PTR break_point) {
|
|
Bit64u tt = bx_pc_system.time_ticks();
|
|
switch (BX_CPU_THIS_PTR break_point) {
|
|
case BREAK_POINT_TIME:
|
|
BX_INFO(("[" FMT_LL "d] Caught time breakpoint", tt));
|
|
BX_CPU_THIS_PTR stop_reason = STOP_TIME_BREAK_POINT;
|
|
return(1); // on a breakpoint
|
|
case BREAK_POINT_READ:
|
|
BX_INFO(("[" FMT_LL "d] Caught read watch point", tt));
|
|
BX_CPU_THIS_PTR stop_reason = STOP_READ_WATCH_POINT;
|
|
return(1); // on a breakpoint
|
|
case BREAK_POINT_WRITE:
|
|
BX_INFO(("[" FMT_LL "d] Caught write watch point", tt));
|
|
BX_CPU_THIS_PTR stop_reason = STOP_WRITE_WATCH_POINT;
|
|
return(1); // on a breakpoint
|
|
default:
|
|
BX_PANIC(("Weird break point condition"));
|
|
}
|
|
}
|
|
|
|
if (BX_CPU_THIS_PTR magic_break) {
|
|
BX_INFO(("[" FMT_LL "d] Stopped on MAGIC BREAKPOINT", bx_pc_system.time_ticks()));
|
|
BX_CPU_THIS_PTR stop_reason = STOP_MAGIC_BREAK_POINT;
|
|
return(1); // on a breakpoint
|
|
}
|
|
|
|
// see if debugger requesting icount guard
|
|
if (bx_guard.guard_for & BX_DBG_GUARD_ICOUNT) {
|
|
if (get_icount() >= BX_CPU_THIS_PTR guard_found.icount_max) {
|
|
return(1);
|
|
}
|
|
}
|
|
|
|
// convenient point to see if user requested debug break or typed Ctrl-C
|
|
if (bx_guard.interrupt_requested) {
|
|
return(1);
|
|
}
|
|
|
|
// support for 'show' command in debugger
|
|
extern unsigned dbg_show_mask;
|
|
if(dbg_show_mask) {
|
|
int rv = bx_dbg_show_symbolic();
|
|
if (rv) return(rv);
|
|
}
|
|
|
|
// Just committed an instruction, before fetching a new one
|
|
// see if debugger is looking for iaddr breakpoint of any type
|
|
if (bx_guard.guard_for & BX_DBG_GUARD_IADDR_ALL) {
|
|
#if (BX_DBG_MAX_VIR_BPOINTS > 0)
|
|
if (bx_guard.guard_for & BX_DBG_GUARD_IADDR_VIR) {
|
|
for (unsigned n=0; n<bx_guard.iaddr.num_virtual; n++) {
|
|
if (bx_guard.iaddr.vir[n].enabled &&
|
|
(bx_guard.iaddr.vir[n].cs == cs) &&
|
|
(bx_guard.iaddr.vir[n].eip == debug_eip))
|
|
{
|
|
BX_CPU_THIS_PTR guard_found.guard_found = BX_DBG_GUARD_IADDR_VIR;
|
|
BX_CPU_THIS_PTR guard_found.iaddr_index = n;
|
|
return(1); // on a breakpoint
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
#if (BX_DBG_MAX_LIN_BPOINTS > 0)
|
|
if (bx_guard.guard_for & BX_DBG_GUARD_IADDR_LIN) {
|
|
for (unsigned n=0; n<bx_guard.iaddr.num_linear; n++) {
|
|
if (bx_guard.iaddr.lin[n].enabled &&
|
|
(bx_guard.iaddr.lin[n].addr == BX_CPU_THIS_PTR guard_found.laddr))
|
|
{
|
|
BX_CPU_THIS_PTR guard_found.guard_found = BX_DBG_GUARD_IADDR_LIN;
|
|
BX_CPU_THIS_PTR guard_found.iaddr_index = n;
|
|
return(1); // on a breakpoint
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
#if (BX_DBG_MAX_PHY_BPOINTS > 0)
|
|
if (bx_guard.guard_for & BX_DBG_GUARD_IADDR_PHY) {
|
|
bx_phy_address phy;
|
|
bx_bool valid = dbg_xlate_linear2phy(BX_CPU_THIS_PTR guard_found.laddr, &phy);
|
|
if (valid) {
|
|
for (unsigned n=0; n<bx_guard.iaddr.num_physical; n++) {
|
|
if (bx_guard.iaddr.phy[n].enabled && (bx_guard.iaddr.phy[n].addr == phy))
|
|
{
|
|
BX_CPU_THIS_PTR guard_found.guard_found = BX_DBG_GUARD_IADDR_PHY;
|
|
BX_CPU_THIS_PTR guard_found.iaddr_index = n;
|
|
return(1); // on a breakpoint
|
|
}
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
#endif
|
|
|
|
#if BX_GDBSTUB
|
|
if (bx_dbg.gdbstub_enabled) {
|
|
unsigned reason = bx_gdbstub_check(EIP);
|
|
if (reason != GDBSTUB_STOP_NO_REASON) return(1);
|
|
}
|
|
#endif
|
|
|
|
return(0);
|
|
}
|
|
#endif // BX_DEBUGGER || BX_GDBSTUB
|