375 lines
8.6 KiB
C++
Executable File
375 lines
8.6 KiB
C++
Executable File
/////////////////////////////////////////////////////////////////////////
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// $Id: bit32.cc,v 1.1 2007-12-07 10:59:18 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_CPU_LEVEL >= 3
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void BX_CPU_C::BSF_GdEd(bxInstruction_c *i)
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{
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/* for 32 bit operand size mode */
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Bit32u op1_32, op2_32;
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/* op2_32 is a register or memory reference */
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if (i->modC0()) {
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op2_32 = BX_READ_32BIT_REG(i->rm());
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}
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else {
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/* pointer, segment address pair */
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read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
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}
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if (op2_32 == 0) {
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assert_ZF(); /* op1_32 undefined */
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return;
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}
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op1_32 = 0;
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while ( (op2_32 & 0x01) == 0 ) {
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op1_32++;
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op2_32 >>= 1;
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}
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SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
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clear_ZF();
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/* now write result back to destination */
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BX_WRITE_32BIT_REGZ(i->nnn(), op1_32);
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}
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void BX_CPU_C::BSR_GdEd(bxInstruction_c *i)
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{
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/* for 32 bit operand size mode */
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Bit32u op1_32, op2_32;
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/* op2_32 is a register or memory reference */
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if (i->modC0()) {
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op2_32 = BX_READ_32BIT_REG(i->rm());
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}
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else {
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/* pointer, segment address pair */
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read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
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}
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if (op2_32 == 0) {
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assert_ZF(); /* op1_32 undefined */
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return;
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}
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op1_32 = 31;
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while ( (op2_32 & 0x80000000) == 0 ) {
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op1_32--;
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op2_32 <<= 1;
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}
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SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
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clear_ZF();
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/* now write result back to destination */
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BX_WRITE_32BIT_REGZ(i->nnn(), op1_32);
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}
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void BX_CPU_C::BT_EdGdM(bxInstruction_c *i)
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{
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bx_address op1_addr;
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Bit32u op1_32, op2_32, index;
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Bit32s displacement32;
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op2_32 = BX_READ_32BIT_REG(i->nnn());
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index = op2_32 & 0x1f;
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displacement32 = ((Bit32s) (op2_32&0xffffffe0)) / 32;
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op1_addr = RMAddr(i) + 4 * displacement32;
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/* pointer, segment address pair */
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read_virtual_dword(i->seg(), op1_addr, &op1_32);
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set_CF((op1_32 >> index) & 0x01);
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}
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void BX_CPU_C::BT_EdGdR(bxInstruction_c *i)
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{
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Bit32u op1_32, op2_32;
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op1_32 = BX_READ_32BIT_REG(i->rm());
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op2_32 = BX_READ_32BIT_REG(i->nnn());
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op2_32 &= 0x1f;
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set_CF((op1_32 >> op2_32) & 0x01);
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}
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void BX_CPU_C::BTS_EdGdM(bxInstruction_c *i)
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{
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bx_address op1_addr;
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Bit32u op1_32, op2_32, bit_i, index;
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Bit32s displacement32;
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op2_32 = BX_READ_32BIT_REG(i->nnn());
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index = op2_32 & 0x1f;
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displacement32 = ((Bit32s) (op2_32&0xffffffe0)) / 32;
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op1_addr = RMAddr(i) + 4 * displacement32;
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/* pointer, segment address pair */
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read_RMW_virtual_dword(i->seg(), op1_addr, &op1_32);
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bit_i = (op1_32 >> index) & 0x01;
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op1_32 |= (((Bit32u) 1) << index);
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write_RMW_virtual_dword(op1_32);
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set_CF(bit_i);
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}
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void BX_CPU_C::BTS_EdGdR(bxInstruction_c *i)
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{
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Bit32u op1_32, op2_32;
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op1_32 = BX_READ_32BIT_REG(i->rm());
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op2_32 = BX_READ_32BIT_REG(i->nnn());
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op2_32 &= 0x1f;
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set_CF((op1_32 >> op2_32) & 0x01);
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op1_32 |= (((Bit32u) 1) << op2_32);
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/* now write result back to the destination */
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BX_WRITE_32BIT_REGZ(i->rm(), op1_32);
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}
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void BX_CPU_C::BTR_EdGdM(bxInstruction_c *i)
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{
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bx_address op1_addr;
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Bit32u op1_32, op2_32, index;
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Bit32s displacement32;
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op2_32 = BX_READ_32BIT_REG(i->nnn());
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index = op2_32 & 0x1f;
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displacement32 = ((Bit32s) (op2_32&0xffffffe0)) / 32;
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op1_addr = RMAddr(i) + 4 * displacement32;
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/* pointer, segment address pair */
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read_RMW_virtual_dword(i->seg(), op1_addr, &op1_32);
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bx_bool temp_cf = (op1_32 >> index) & 0x01;
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op1_32 &= ~(((Bit32u) 1) << index);
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/* now write back to destination */
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write_RMW_virtual_dword(op1_32);
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set_CF(temp_cf);
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}
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void BX_CPU_C::BTR_EdGdR(bxInstruction_c *i)
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{
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Bit32u op1_32, op2_32;
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op1_32 = BX_READ_32BIT_REG(i->rm());
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op2_32 = BX_READ_32BIT_REG(i->nnn());
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op2_32 &= 0x1f;
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set_CF((op1_32 >> op2_32) & 0x01);
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op1_32 &= ~(((Bit32u) 1) << op2_32);
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/* now write result back to the destination */
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BX_WRITE_32BIT_REGZ(i->rm(), op1_32);
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}
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void BX_CPU_C::BTC_EdGdM(bxInstruction_c *i)
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{
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bx_address op1_addr;
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Bit32u op1_32, op2_32, index_32;
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Bit32s displacement32;
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op2_32 = BX_READ_32BIT_REG(i->nnn());
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index_32 = op2_32 & 0x1f;
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displacement32 = ((Bit32s) (op2_32 & 0xffffffe0)) / 32;
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op1_addr = RMAddr(i) + 4 * displacement32;
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read_RMW_virtual_dword(i->seg(), op1_addr, &op1_32);
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bx_bool temp_CF = (op1_32 >> index_32) & 0x01;
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op1_32 ^= (((Bit32u) 1) << index_32); /* toggle bit */
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set_CF(temp_CF);
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write_RMW_virtual_dword(op1_32);
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}
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void BX_CPU_C::BTC_EdGdR(bxInstruction_c *i)
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{
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Bit32u op1_32, op2_32;
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op1_32 = BX_READ_32BIT_REG(i->rm());
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op2_32 = BX_READ_32BIT_REG(i->nnn());
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op2_32 &= 0x1f;
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bx_bool temp_CF = (op1_32 >> op2_32) & 0x01;
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op1_32 ^= (((Bit32u) 1) << op2_32); /* toggle bit */
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set_CF(temp_CF);
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BX_WRITE_32BIT_REGZ(i->rm(), op1_32);
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}
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void BX_CPU_C::BT_EdIbM(bxInstruction_c *i)
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{
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Bit32u op1_32;
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Bit8u op2_8 = i->Ib() & 0x1f;
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read_virtual_dword(i->seg(), RMAddr(i), &op1_32);
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set_CF((op1_32 >> op2_8) & 0x01);
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}
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void BX_CPU_C::BT_EdIbR(bxInstruction_c *i)
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{
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Bit32u op1_32 = BX_READ_32BIT_REG(i->rm());
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Bit8u op2_8 = i->Ib() & 0x1f;
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set_CF((op1_32 >> op2_8) & 0x01);
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}
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void BX_CPU_C::BTS_EdIbM(bxInstruction_c *i)
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{
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Bit32u op1_32;
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Bit8u op2_8 = i->Ib() & 0x1f;
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read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
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bx_bool temp_CF = (op1_32 >> op2_8) & 0x01;
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op1_32 |= (((Bit32u) 1) << op2_8);
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write_RMW_virtual_dword(op1_32);
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set_CF(temp_CF);
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}
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void BX_CPU_C::BTS_EdIbR(bxInstruction_c *i)
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{
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Bit32u op1_32;
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Bit8u op2_8 = i->Ib() & 0x1f;
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op1_32 = BX_READ_32BIT_REG(i->rm());
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bx_bool temp_CF = (op1_32 >> op2_8) & 0x01;
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op1_32 |= (((Bit32u) 1) << op2_8);
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BX_WRITE_32BIT_REGZ(i->rm(), op1_32);
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set_CF(temp_CF);
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}
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void BX_CPU_C::BTC_EdIbM(bxInstruction_c *i)
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{
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Bit32u op1_32;
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Bit8u op2_8 = i->Ib() & 0x1f;
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read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
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bx_bool temp_CF = (op1_32 >> op2_8) & 0x01;
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op1_32 ^= (((Bit32u) 1) << op2_8); /* toggle bit */
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write_RMW_virtual_dword(op1_32);
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set_CF(temp_CF);
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}
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void BX_CPU_C::BTC_EdIbR(bxInstruction_c *i)
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{
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Bit32u op1_32;
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Bit8u op2_8 = i->Ib() & 0x1f;
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op1_32 = BX_READ_32BIT_REG(i->rm());
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bx_bool temp_CF = (op1_32 >> op2_8) & 0x01;
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op1_32 ^= (((Bit32u) 1) << op2_8); /* toggle bit */
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BX_WRITE_32BIT_REGZ(i->rm(), op1_32);
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set_CF(temp_CF);
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}
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void BX_CPU_C::BTR_EdIbM(bxInstruction_c *i)
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{
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Bit32u op1_32;
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Bit8u op2_8 = i->Ib() & 0x1f;
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read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
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bx_bool temp_CF = (op1_32 >> op2_8) & 0x01;
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op1_32 &= ~(((Bit32u) 1) << op2_8);
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write_RMW_virtual_dword(op1_32);
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set_CF(temp_CF);
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}
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void BX_CPU_C::BTR_EdIbR(bxInstruction_c *i)
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{
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Bit32u op1_32;
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Bit8u op2_8 = i->Ib() & 0x1f;
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op1_32 = BX_READ_32BIT_REG(i->rm());
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bx_bool temp_CF = (op1_32 >> op2_8) & 0x01;
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op1_32 &= ~(((Bit32u) 1) << op2_8);
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BX_WRITE_32BIT_REGZ(i->rm(), op1_32);
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set_CF(temp_CF);
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}
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/* 0F B8 */
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void BX_CPU_C::POPCNT_GdEd(bxInstruction_c *i)
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{
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#if BX_SUPPORT_POPCNT || (BX_SUPPORT_SSE >= 5) || (BX_SUPPORT_SSE >= 4 && BX_SUPPORT_SSE_EXTENSION > 0)
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Bit32u op1_32, op2_32;
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/* op2_16 is a register or memory reference */
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if (i->modC0()) {
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op2_32 = BX_READ_32BIT_REG(i->rm());
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}
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else {
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/* pointer, segment address pair */
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read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
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}
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op1_32 = 0;
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while (op2_32 != 0) {
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if (op2_32 & 1) op1_32++;
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op2_32 >>= 1;
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}
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Bit32u flags = op1_32 ? 0 : EFlagsZFMask;
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setEFlagsOSZAPC(flags);
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/* now write result back to destination */
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BX_WRITE_32BIT_REGZ(i->nnn(), op1_32);
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#else
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BX_INFO(("POPCNT_GdEd: required POPCNT support, use --enable-popcnt option"));
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UndefinedOpcode(i);
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#endif
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}
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#endif // (BX_CPU_LEVEL >= 3)
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