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edc3003f35
Bochs/bochs/cpu/cpudb
History
Stanislav Shwartsman edc3003f35 do not use cpuid:level param when it doesn't exists
2013-06-15 17:53:49 +00:00
..
amd_k6_2_chomper.cc allow to select CPU level = 5 from .bochsrc even when Bochs is compiled with CPU_LEVEL=6 2013-04-17 19:46:11 +00:00
amd_k6_2_chomper.h allow to select CPU level = 5 from .bochsrc even when Bochs is compiled with CPU_LEVEL=6 2013-04-17 19:46:11 +00:00
amd_k6_2_chomper.txt - Fixed compilation issue with cpu-level=5 2011-08-30 22:00:27 +00:00
athlon64_clawhammer.cc fixes for SVN. also turion64_tyler supports RDTSCP - include it in CPUID 2012-01-01 17:54:41 +00:00
athlon64_clawhammer.h support more than 32-bit cpu features vector 2011-09-14 20:22:24 +00:00
athlon64_clawhammer.txt Added another CPU to CPUDB: p4_willamette (one more without x86-64 support). 2011-07-31 18:43:46 +00:00
athlon64_venice.cc Major commit ! 2012-02-13 23:29:01 +00:00
athlon64_venice.h Major commit ! 2012-02-13 23:29:01 +00:00
athlon64_venice.txt Major commit ! 2012-02-13 23:29:01 +00:00
atom_n270.cc Do not report Architectural Performance Monitoring in CPUID 2013-05-07 15:34:58 +00:00
atom_n270.h fixed 64-bit segment print from internal debugger 2012-06-14 18:56:47 +00:00
atom_n270.txt dos2unix 2011-08-03 17:50:23 +00:00
core2_penryn_t9600.cc Do not report Architectural Performance Monitoring in CPUID 2013-05-07 15:34:58 +00:00
core2_penryn_t9600.h fixed 64-bit segment print from internal debugger 2012-06-14 18:56:47 +00:00
core2_penryn_t9600.txt dos2unix for generic_cpuid.cc 2011-08-08 18:20:29 +00:00
core_duo_t2400_yonah.cc Do not report Architectural Performance Monitoring in CPUID 2013-05-07 15:34:58 +00:00
core_duo_t2400_yonah.h fixed 64-bit segment print from internal debugger 2012-06-14 18:56:47 +00:00
core_duo_t2400_yonah.txt Major commit ! 2012-02-13 23:29:01 +00:00
corei5_arrandale_m520.cc Do not report Architectural Performance Monitoring in CPUID 2013-05-07 15:34:58 +00:00
corei5_arrandale_m520.h fixed 64-bit segment print from internal debugger 2012-06-14 18:56:47 +00:00
corei5_arrandale_m520.txt Major commit ! 2012-02-13 23:29:01 +00:00
corei5_lynnfield_750.cc Do not report Architectural Performance Monitoring in CPUID 2013-05-07 15:34:58 +00:00
corei5_lynnfield_750.h fixed 64-bit segment print from internal debugger 2012-06-14 18:56:47 +00:00
corei5_lynnfield_750.txt Added Corei5 750 (Lynnfield) configuration to the CPUDB 2012-01-02 20:59:02 +00:00
corei7_ivy_bridge_3770K.cc Added X2APIC support to Ivy Bridge configuration 2013-05-20 18:15:35 +00:00
corei7_ivy_bridge_3770K.h added AMD Bulldozer architecture CPU (Zambezi) to CPUDB 2013-01-07 19:33:04 +00:00
corei7_ivy_bridge_3770K.txt added AMD Bulldozer architecture CPU (Zambezi) to CPUDB 2013-01-07 19:33:04 +00:00
corei7_sandy_bridge_2600K.cc do not use cpuid:level param when it doesn't exists 2013-06-15 17:53:49 +00:00
corei7_sandy_bridge_2600K.h fixed 64-bit segment print from internal debugger 2012-06-14 18:56:47 +00:00
corei7_sandy_bridge_2600K.txt Added another CPU to CPUDB: p4_willamette (one more without x86-64 support). 2011-07-31 18:43:46 +00:00
Makefile.in added AMD Bulldozer architecture CPU (Zambezi) to CPUDB 2013-01-07 19:33:04 +00:00
p2_klamath.cc Major commit ! 2012-02-13 23:29:01 +00:00
p2_klamath.h Major commit ! 2012-02-13 23:29:01 +00:00
p2_klamath.txt Major commit ! 2012-02-13 23:29:01 +00:00
p3_katmai.cc - Now you could disable x86-64 from .bochsrc so now it is possible to emulate 2011-09-25 17:36:20 +00:00
p3_katmai.h - Now you could disable x86-64 from .bochsrc so now it is possible to emulate 2011-09-25 17:36:20 +00:00
p3_katmai.txt Added another CPU to CPUDB: p4_willamette (one more without x86-64 support). 2011-07-31 18:43:46 +00:00
p4_prescott_celeron_336.cc fixed 64-bit segment print from internal debugger 2012-06-14 18:56:47 +00:00
p4_prescott_celeron_336.h fixed 64-bit segment print from internal debugger 2012-06-14 18:56:47 +00:00
p4_prescott_celeron_336.txt Added another CPU to CPUDB: p4_willamette (one more without x86-64 support). 2011-07-31 18:43:46 +00:00
p4_willamette.cc removed param_names.h include where not needed anymore 2012-01-07 17:54:19 +00:00
p4_willamette.h cleaned up code duplication in CPUDB classes 2012-01-07 17:06:03 +00:00
p4_willamette.txt Added another CPU to CPUDB: p4_willamette (one more without x86-64 support). 2011-07-31 18:43:46 +00:00
pentium_mmx.cc allow to select CPU level = 5 from .bochsrc even when Bochs is compiled with CPU_LEVEL=6 2013-04-17 19:46:11 +00:00
pentium_mmx.h allow to select CPU level = 5 from .bochsrc even when Bochs is compiled with CPU_LEVEL=6 2013-04-17 19:46:11 +00:00
pentium_mmx.txt Major commit ! 2012-02-13 23:29:01 +00:00
phenomx3_8650_toliman.cc added AMD Bulldozer architecture CPU (Zambezi) to CPUDB 2013-01-07 19:33:04 +00:00
phenomx3_8650_toliman.h SVM: Added EXITINFO2 write on VMEXIT (missed in prev commit) 2012-02-19 20:15:23 +00:00
phenomx3_8650_toliman.txt Major commit ! 2012-02-13 23:29:01 +00:00
turion64_tyler.cc Major commit ! 2012-02-13 23:29:01 +00:00
turion64_tyler.h Major commit ! 2012-02-13 23:29:01 +00:00
turion64_tyler.txt Major commit ! 2012-02-13 23:29:01 +00:00
zambezi.cc implemented pause threshold count in SVN + bugfix in SMAP 2013-01-08 21:03:22 +00:00
zambezi.h added AMD Bulldozer architecture CPU (Zambezi) to CPUDB 2013-01-07 19:33:04 +00:00
zambezi.txt added AMD Bulldozer architecture CPU (Zambezi) to CPUDB 2013-01-07 19:33:04 +00:00