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Bochs
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bochs
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cpu
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decoder
History
Stanislav Shwartsman
ec5f526ac0
ENBRANCH and RDSSP should remain NOP when CET not enabled, this means they not require an specifical CPU feature to be decoded into the hnadler
2019-12-20 13:16:52 +00:00
..
decoder.h
Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071
2019-12-20 07:42:07 +00:00
disasm.cc
…
fetchdecode32.cc
Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071
2019-12-20 07:42:07 +00:00
fetchdecode64.cc
Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071
2019-12-20 07:42:07 +00:00
fetchdecode_avx.h
…
fetchdecode_evex.h
…
fetchdecode_opmap_0f3a.h
…
fetchdecode_opmap_0f38.h
Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071
2019-12-20 07:42:07 +00:00
fetchdecode_opmap.h
Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071
2019-12-20 07:42:07 +00:00
fetchdecode_x87.h
…
fetchdecode_xop.h
…
fetchdecode.h
…
ia_opcodes.def
ENBRANCH and RDSSP should remain NOP when CET not enabled, this means they not require an specifical CPU feature to be decoded into the hnadler
2019-12-20 13:16:52 +00:00
ia_opcodes.h
…
instr.h
Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071
2019-12-20 07:42:07 +00:00
