0b2bec6752
existing "iolight timer" code in the hard drive code. If an LED is registered with the "auto-off" flag, the device only needs to turn on the LED to indicate data transfer. The LED timer in the gui code turns it off after 0.5 seconds if it is not actived by another transfer. Added this feature to all network devices. - TODO #1: implement this feature in the USB host controllers - TODO #2: the unused timer in the hard drive code could be used for the emulation of seek functions
167 lines
5.0 KiB
C++
167 lines
5.0 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2011 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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#ifndef BX_IODEV_E1000_H
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#define BX_IODEV_E1000_H
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#if BX_USE_E1000_SMF
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# define BX_E1000_SMF static
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# define BX_E1000_THIS theE1000Device->
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# define BX_E1000_THIS_PTR theE1000Device
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#else
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# define BX_E1000_SMF
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# define BX_E1000_THIS this->
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# define BX_E1000_THIS_PTR this
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#endif
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struct e1000_tx_desc {
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Bit64u buffer_addr; // Address of the descriptor's data buffer
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union {
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Bit32u data;
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struct {
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Bit16u length; // Data buffer length
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Bit8u cso; // Checksum offset
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Bit8u cmd; // Descriptor control
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} flags;
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} lower;
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union {
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Bit32u data;
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struct {
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Bit8u status; // Descriptor status
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Bit8u css; // Checksum start
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Bit16u special;
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} fields;
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} upper;
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};
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typedef struct {
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Bit8u header[256];
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Bit8u vlan_header[4];
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Bit8u *vlan;
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Bit8u *data;
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Bit16u size;
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Bit8u sum_needed;
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bx_bool vlan_needed;
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Bit8u ipcss;
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Bit8u ipcso;
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Bit16u ipcse;
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Bit8u tucss;
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Bit8u tucso;
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Bit16u tucse;
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Bit8u hdr_len;
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Bit16u mss;
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Bit32u paylen;
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Bit16u tso_frames;
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bx_bool tse;
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bx_bool ip;
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bx_bool tcp;
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bx_bool cptse; // current packet tse bit
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Bit32u int_cause;
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} e1000_tx;
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typedef struct {
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Bit32u *mac_reg;
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Bit16u phy_reg[0x20];
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Bit16u eeprom_data[64];
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Bit32u rxbuf_size;
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Bit32u rxbuf_min_shift;
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bx_bool check_rxov;
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e1000_tx tx;
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struct {
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Bit32u val_in; // shifted in from guest driver
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Bit16u bitnum_in;
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Bit16u bitnum_out;
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bx_bool reading;
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Bit32u old_eecd;
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} eecd_state;
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int tx_timer_index;
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int statusbar_id;
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Bit8u devfunc;
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} bx_e1000_t;
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class bx_e1000_c : public bx_devmodel_c, bx_pci_device_stub_c {
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public:
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bx_e1000_c();
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virtual ~bx_e1000_c();
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virtual void init(void);
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virtual void reset(unsigned type);
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virtual void register_state(void);
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virtual void after_restore_state(void);
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virtual Bit32u pci_read_handler(Bit8u address, unsigned io_len);
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virtual void pci_write_handler(Bit8u address, Bit32u value, unsigned io_len);
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private:
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bx_e1000_t s;
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eth_pktmover_c *ethdev;
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BX_E1000_SMF void set_irq_level(bx_bool level);
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BX_E1000_SMF void set_interrupt_cause(Bit32u val);
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BX_E1000_SMF void set_ics(Bit32u value);
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BX_E1000_SMF int rxbufsize(Bit32u v);
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BX_E1000_SMF void set_rx_control(Bit32u value);
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BX_E1000_SMF void set_mdic(Bit32u value);
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BX_E1000_SMF Bit32u get_eecd(void);
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BX_E1000_SMF void set_eecd(Bit32u value);
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BX_E1000_SMF Bit32u flash_eerd_read(void);
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BX_E1000_SMF void putsum(Bit8u *data, Bit32u n, Bit32u sloc, Bit32u css, Bit32u cse);
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BX_E1000_SMF bx_bool vlan_enabled(void);
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BX_E1000_SMF bx_bool vlan_rx_filter_enabled(void);
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BX_E1000_SMF bx_bool is_vlan_packet(const Bit8u *buf);
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BX_E1000_SMF bx_bool is_vlan_txd(Bit32u txd_lower);
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BX_E1000_SMF int fcs_len(void);
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BX_E1000_SMF void xmit_seg(void);
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BX_E1000_SMF void process_tx_desc(struct e1000_tx_desc *dp);
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BX_E1000_SMF Bit32u txdesc_writeback(bx_phy_address base, struct e1000_tx_desc *dp);
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BX_E1000_SMF Bit64u tx_desc_base(void);
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BX_E1000_SMF void start_xmit(void);
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static void tx_timer_handler(void *);
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void tx_timer(void);
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BX_E1000_SMF int receive_filter(const Bit8u *buf, int size);
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BX_E1000_SMF bx_bool e1000_has_rxbufs(size_t total_size);
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BX_E1000_SMF Bit64u rx_desc_base(void);
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static Bit32u rx_status_handler(void *arg);
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BX_E1000_SMF Bit32u rx_status(void);
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static void rx_handler(void *arg, const void *buf, unsigned len);
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BX_E1000_SMF void rx_frame(const void *buf, unsigned io_len);
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BX_E1000_SMF bx_bool mem_read_handler(bx_phy_address addr, unsigned len, void *data, void *param);
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BX_E1000_SMF bx_bool mem_write_handler(bx_phy_address addr, unsigned len, void *data, void *param);
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static Bit32u read_handler(void *this_ptr, Bit32u address, unsigned io_len);
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static void write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len);
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#if !BX_USE_E1000_SMF
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Bit32u read(Bit32u address, unsigned io_len);
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void write(Bit32u address, Bit32u value, unsigned io_len);
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#endif
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};
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#endif
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