227 lines
6.6 KiB
C++
227 lines
6.6 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2015 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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// LES/LDS can't be called from long64 mode
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LES_GwMp(bxInstruction_c *i)
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{
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BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
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Bit32u eaddr = (Bit32u) BX_CPU_RESOLVE_ADDR_32(i);
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Bit16u reg_16 = read_virtual_word_32(i->seg(), eaddr);
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Bit16u es = read_virtual_word_32(i->seg(), (eaddr + 2) & i->asize_mask());
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES], es);
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BX_WRITE_16BIT_REG(i->dst(), reg_16);
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BX_NEXT_INSTR(i);
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}
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// LES/LDS can't be called from long64 mode
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LES_GdMp(bxInstruction_c *i)
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{
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BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
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Bit32u eaddr = (Bit32u) BX_CPU_RESOLVE_ADDR_32(i);
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Bit16u es = read_virtual_word_32(i->seg(), (eaddr + 4) & i->asize_mask());
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Bit32u reg_32 = read_virtual_dword_32(i->seg(), eaddr);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES], es);
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BX_WRITE_32BIT_REGZ(i->dst(), reg_32);
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BX_NEXT_INSTR(i);
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}
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// LES/LDS can't be called from long64 mode
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LDS_GwMp(bxInstruction_c *i)
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{
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BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
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Bit32u eaddr = (Bit32u) BX_CPU_RESOLVE_ADDR_32(i);
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Bit16u reg_16 = read_virtual_word_32(i->seg(), eaddr);
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Bit16u ds = read_virtual_word_32(i->seg(), (eaddr + 2) & i->asize_mask());
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS], ds);
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BX_WRITE_16BIT_REG(i->dst(), reg_16);
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BX_NEXT_INSTR(i);
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}
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// LES/LDS can't be called from long64 mode
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LDS_GdMp(bxInstruction_c *i)
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{
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BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
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Bit32u eaddr = (Bit32u) BX_CPU_RESOLVE_ADDR_32(i);
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Bit16u ds = read_virtual_word_32(i->seg(), (eaddr + 4) & i->asize_mask());
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Bit32u reg_32 = read_virtual_dword_32(i->seg(), eaddr);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS], ds);
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BX_WRITE_32BIT_REGZ(i->dst(), reg_32);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LFS_GwMp(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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Bit16u reg_16 = read_virtual_word(i->seg(), eaddr);
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Bit16u fs = read_virtual_word(i->seg(), (eaddr + 2) & i->asize_mask());
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], fs);
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BX_WRITE_16BIT_REG(i->dst(), reg_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LFS_GdMp(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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Bit16u fs = read_virtual_word(i->seg(), (eaddr + 4) & i->asize_mask());
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Bit32u reg_32 = read_virtual_dword(i->seg(), eaddr);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], fs);
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BX_WRITE_32BIT_REGZ(i->dst(), reg_32);
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BX_NEXT_INSTR(i);
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}
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#if BX_SUPPORT_X86_64
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LFS_GqMp(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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Bit16u fs = read_linear_word(i->seg(), get_laddr64(i->seg(), (eaddr + 8) & i->asize_mask()));
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Bit64u reg_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], fs);
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BX_WRITE_64BIT_REG(i->dst(), reg_64);
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BX_NEXT_INSTR(i);
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}
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#endif
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LGS_GwMp(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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Bit16u reg_16 = read_virtual_word(i->seg(), eaddr);
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Bit16u gs = read_virtual_word(i->seg(), (eaddr + 2) & i->asize_mask());
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], gs);
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BX_WRITE_16BIT_REG(i->dst(), reg_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LGS_GdMp(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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Bit16u gs = read_virtual_word(i->seg(), (eaddr + 4) & i->asize_mask());
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Bit32u reg_32 = read_virtual_dword(i->seg(), eaddr);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], gs);
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BX_WRITE_32BIT_REGZ(i->dst(), reg_32);
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BX_NEXT_INSTR(i);
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}
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#if BX_SUPPORT_X86_64
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LGS_GqMp(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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Bit16u gs = read_linear_word(i->seg(), get_laddr64(i->seg(), (eaddr + 8) & i->asize_mask()));
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Bit64u reg_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], gs);
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BX_WRITE_64BIT_REG(i->dst(), reg_64);
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BX_NEXT_INSTR(i);
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}
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#endif
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LSS_GwMp(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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Bit16u reg_16 = read_virtual_word(i->seg(), eaddr);
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Bit16u ss = read_virtual_word(i->seg(), (eaddr + 2) & i->asize_mask());
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], ss);
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BX_WRITE_16BIT_REG(i->dst(), reg_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LSS_GdMp(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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Bit16u ss = read_virtual_word(i->seg(), (eaddr + 4) & i->asize_mask());
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Bit32u reg_32 = read_virtual_dword(i->seg(), eaddr);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], ss);
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BX_WRITE_32BIT_REGZ(i->dst(), reg_32);
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BX_NEXT_INSTR(i);
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}
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#if BX_SUPPORT_X86_64
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LSS_GqMp(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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Bit16u ss = read_linear_word(i->seg(), get_laddr64(i->seg(), (eaddr + 8) & i->asize_mask()));
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Bit64u reg_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], ss);
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BX_WRITE_64BIT_REG(i->dst(), reg_64);
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BX_NEXT_INSTR(i);
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}
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#endif
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