974 lines
27 KiB
C++
974 lines
27 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2012 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ARPL_EwGw(bxInstruction_c *i)
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{
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Bit16u op2_16, op1_16;
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if (! protected_mode()) {
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BX_DEBUG(("ARPL: not recognized in real or virtual-8086 mode"));
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exception(BX_UD_EXCEPTION, 0);
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}
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/* op1_16 is a register or memory reference */
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if (i->modC0()) {
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op1_16 = BX_READ_16BIT_REG(i->rm());
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}
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else {
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
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}
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op2_16 = BX_READ_16BIT_REG(i->nnn());
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if ((op1_16 & 0x03) < (op2_16 & 0x03)) {
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op1_16 = (op1_16 & 0xfffc) | (op2_16 & 0x03);
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/* now write back to destination */
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if (i->modC0()) {
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BX_WRITE_16BIT_REG(i->rm(), op1_16);
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}
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else {
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write_RMW_virtual_word(op1_16);
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}
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assert_ZF();
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}
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else {
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clear_ZF();
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}
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LAR_GvEw(bxInstruction_c *i)
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{
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/* for 16 bit operand size mode */
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Bit16u raw_selector;
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bx_descriptor_t descriptor;
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bx_selector_t selector;
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Bit32u dword1, dword2;
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#if BX_SUPPORT_X86_64
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Bit32u dword3 = 0;
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#endif
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if (! protected_mode()) {
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BX_ERROR(("LAR: not recognized in real or virtual-8086 mode"));
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exception(BX_UD_EXCEPTION, 0);
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}
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if (i->modC0()) {
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raw_selector = BX_READ_16BIT_REG(i->rm());
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}
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else {
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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raw_selector = read_virtual_word(i->seg(), eaddr);
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}
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/* if selector null, clear ZF and done */
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if ((raw_selector & 0xfffc) == 0) {
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clear_ZF();
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BX_NEXT_INSTR(i);
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}
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parse_selector(raw_selector, &selector);
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if (!fetch_raw_descriptor2(&selector, &dword1, &dword2)) {
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BX_DEBUG(("LAR: failed to fetch descriptor"));
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clear_ZF();
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BX_NEXT_INSTR(i);
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}
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parse_descriptor(dword1, dword2, &descriptor);
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if (descriptor.valid==0) {
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BX_DEBUG(("LAR: descriptor not valid"));
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clear_ZF();
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BX_NEXT_INSTR(i);
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}
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/* if source selector is visible at CPL & RPL,
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* within the descriptor table, and of type accepted by LAR instruction,
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* then load register with segment limit and set ZF
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*/
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if (descriptor.segment) { /* normal segment */
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if (IS_CODE_SEGMENT(descriptor.type) && IS_CODE_SEGMENT_CONFORMING(descriptor.type)) {
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/* ignore DPL for conforming segments */
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}
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else {
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if (descriptor.dpl < CPL || descriptor.dpl < selector.rpl) {
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clear_ZF();
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BX_NEXT_INSTR(i);
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}
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}
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}
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else { /* system or gate segment */
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switch (descriptor.type) {
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case BX_SYS_SEGMENT_AVAIL_286_TSS:
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case BX_SYS_SEGMENT_BUSY_286_TSS:
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case BX_286_CALL_GATE:
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case BX_TASK_GATE:
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if (long_mode()) {
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BX_DEBUG(("LAR: descriptor type in not accepted in long mode"));
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clear_ZF();
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BX_NEXT_INSTR(i);
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}
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/* fall through */
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case BX_SYS_SEGMENT_LDT:
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case BX_SYS_SEGMENT_AVAIL_386_TSS:
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case BX_SYS_SEGMENT_BUSY_386_TSS:
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case BX_386_CALL_GATE:
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#if BX_SUPPORT_X86_64
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if (long64_mode() || (descriptor.type == BX_386_CALL_GATE && long_mode()) ) {
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if (!fetch_raw_descriptor2_64(&selector, &dword1, &dword2, &dword3)) {
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BX_ERROR(("LAR: failed to fetch 64-bit descriptor"));
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clear_ZF();
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BX_NEXT_INSTR(i);
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}
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}
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#endif
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break;
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default: /* rest not accepted types to LAR */
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BX_DEBUG(("LAR: not accepted descriptor type"));
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clear_ZF();
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BX_NEXT_INSTR(i);
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}
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if (descriptor.dpl < CPL || descriptor.dpl < selector.rpl) {
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clear_ZF();
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BX_NEXT_INSTR(i);
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}
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}
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assert_ZF();
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if (i->os32L()) {
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/* masked by 00FxFF00, where x is undefined */
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BX_WRITE_32BIT_REGZ(i->nnn(), dword2 & 0x00ffff00);
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}
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else {
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BX_WRITE_16BIT_REG(i->nnn(), dword2 & 0xff00);
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}
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LSL_GvEw(bxInstruction_c *i)
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{
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/* for 16 bit operand size mode */
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Bit16u raw_selector;
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Bit32u limit32;
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bx_selector_t selector;
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Bit32u dword1, dword2;
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#if BX_SUPPORT_X86_64
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Bit32u dword3 = 0;
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#endif
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if (! protected_mode()) {
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BX_ERROR(("LSL: not recognized in real or virtual-8086 mode"));
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exception(BX_UD_EXCEPTION, 0);
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}
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if (i->modC0()) {
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raw_selector = BX_READ_16BIT_REG(i->rm());
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}
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else {
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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raw_selector = read_virtual_word(i->seg(), eaddr);
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}
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/* if selector null, clear ZF and done */
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if ((raw_selector & 0xfffc) == 0) {
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clear_ZF();
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BX_NEXT_INSTR(i);
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}
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parse_selector(raw_selector, &selector);
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if (!fetch_raw_descriptor2(&selector, &dword1, &dword2)) {
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BX_DEBUG(("LSL: failed to fetch descriptor"));
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clear_ZF();
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BX_NEXT_INSTR(i);
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}
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Bit32u descriptor_dpl = (dword2 >> 13) & 0x03;
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if ((dword2 & 0x00001000) == 0) { // system segment
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Bit32u type = (dword2 >> 8) & 0x0000000f;
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switch (type) {
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case BX_SYS_SEGMENT_AVAIL_286_TSS:
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case BX_SYS_SEGMENT_BUSY_286_TSS:
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if (long_mode()) {
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clear_ZF();
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BX_NEXT_INSTR(i);
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}
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/* fall through */
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case BX_SYS_SEGMENT_LDT:
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case BX_SYS_SEGMENT_AVAIL_386_TSS:
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case BX_SYS_SEGMENT_BUSY_386_TSS:
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#if BX_SUPPORT_X86_64
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if (long64_mode()) {
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if (!fetch_raw_descriptor2_64(&selector, &dword1, &dword2, &dword3)) {
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BX_ERROR(("LSL: failed to fetch 64-bit descriptor"));
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clear_ZF();
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BX_NEXT_INSTR(i);
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}
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}
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#endif
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if (descriptor_dpl < CPL || descriptor_dpl < selector.rpl) {
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clear_ZF();
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BX_NEXT_INSTR(i);
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}
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limit32 = (dword1 & 0x0000ffff) | (dword2 & 0x000f0000);
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if (dword2 & 0x00800000)
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limit32 = (limit32 << 12) | 0x00000fff;
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break;
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default: /* rest not accepted types to LSL */
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clear_ZF();
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BX_NEXT_INSTR(i);
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}
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}
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else { // data & code segment
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limit32 = (dword1 & 0x0000ffff) | (dword2 & 0x000f0000);
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if (dword2 & 0x00800000)
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limit32 = (limit32 << 12) | 0x00000fff;
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if ((dword2 & 0x00000c00) != 0x00000c00) {
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// non-conforming code segment
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if (descriptor_dpl < CPL || descriptor_dpl < selector.rpl) {
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clear_ZF();
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BX_NEXT_INSTR(i);
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}
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}
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}
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/* all checks pass, limit32 is now byte granular, write to op1 */
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assert_ZF();
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if (i->os32L()) {
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BX_WRITE_32BIT_REGZ(i->nnn(), limit32);
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}
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else {
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// chop off upper 16 bits
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BX_WRITE_16BIT_REG(i->nnn(), (Bit16u) limit32);
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}
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SLDT_Ew(bxInstruction_c *i)
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{
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if (! protected_mode()) {
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BX_ERROR(("SLDT: not recognized in real or virtual-8086 mode"));
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exception(BX_UD_EXCEPTION, 0);
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}
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#if BX_SUPPORT_VMX >= 2
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if (BX_CPU_THIS_PTR in_vmx_guest)
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if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_DESCRIPTOR_TABLE_VMEXIT))
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VMexit_Instruction(i, VMX_VMEXIT_LDTR_TR_ACCESS);
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#endif
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Bit16u val16 = BX_CPU_THIS_PTR ldtr.selector.value;
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if (i->modC0()) {
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if (i->os32L()) {
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BX_WRITE_32BIT_REGZ(i->rm(), val16);
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}
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else {
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BX_WRITE_16BIT_REG(i->rm(), val16);
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}
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}
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else {
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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write_virtual_word(i->seg(), eaddr, val16);
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}
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::STR_Ew(bxInstruction_c *i)
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{
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if (! protected_mode()) {
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BX_ERROR(("STR: not recognized in real or virtual-8086 mode"));
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exception(BX_UD_EXCEPTION, 0);
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}
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#if BX_SUPPORT_VMX >= 2
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if (BX_CPU_THIS_PTR in_vmx_guest)
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if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_DESCRIPTOR_TABLE_VMEXIT))
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VMexit_Instruction(i, VMX_VMEXIT_LDTR_TR_ACCESS);
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#endif
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Bit16u val16 = BX_CPU_THIS_PTR tr.selector.value;
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if (i->modC0()) {
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if (i->os32L()) {
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BX_WRITE_32BIT_REGZ(i->rm(), val16);
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}
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else {
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BX_WRITE_16BIT_REG(i->rm(), val16);
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}
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}
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else {
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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write_virtual_word(i->seg(), eaddr, val16);
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}
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LLDT_Ew(bxInstruction_c *i)
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{
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/* protected mode */
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bx_descriptor_t descriptor;
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bx_selector_t selector;
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Bit16u raw_selector;
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Bit32u dword1, dword2;
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#if BX_SUPPORT_X86_64
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Bit32u dword3 = 0;
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#endif
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if (! protected_mode()) {
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BX_ERROR(("LLDT: not recognized in real or virtual-8086 mode"));
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exception(BX_UD_EXCEPTION, 0);
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}
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if (CPL != 0) {
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BX_ERROR(("LLDT: The current priveledge level is not 0"));
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exception(BX_GP_EXCEPTION, 0);
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}
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#if BX_SUPPORT_VMX >= 2
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if (BX_CPU_THIS_PTR in_vmx_guest)
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if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_DESCRIPTOR_TABLE_VMEXIT))
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VMexit_Instruction(i, VMX_VMEXIT_LDTR_TR_ACCESS);
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#endif
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if (i->modC0()) {
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raw_selector = BX_READ_16BIT_REG(i->rm());
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}
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else {
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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raw_selector = read_virtual_word(i->seg(), eaddr);
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}
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/* if selector is NULL, invalidate and done */
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if ((raw_selector & 0xfffc) == 0) {
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BX_CPU_THIS_PTR ldtr.selector.value = raw_selector;
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BX_CPU_THIS_PTR ldtr.cache.valid = 0;
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BX_NEXT_INSTR(i);
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}
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/* parse fields in selector */
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parse_selector(raw_selector, &selector);
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// #GP(selector) if the selector operand does not point into GDT
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if (selector.ti != 0) {
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BX_ERROR(("LLDT: selector.ti != 0"));
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exception(BX_GP_EXCEPTION, raw_selector & 0xfffc);
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}
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/* fetch descriptor; call handles out of limits checks */
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#if BX_SUPPORT_X86_64
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if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
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fetch_raw_descriptor_64(&selector, &dword1, &dword2, &dword3, BX_GP_EXCEPTION);
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}
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else
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#endif
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{
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fetch_raw_descriptor(&selector, &dword1, &dword2, BX_GP_EXCEPTION);
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}
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parse_descriptor(dword1, dword2, &descriptor);
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/* if selector doesn't point to an LDT descriptor #GP(selector) */
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if (descriptor.valid == 0 || descriptor.segment ||
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descriptor.type != BX_SYS_SEGMENT_LDT)
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{
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BX_ERROR(("LLDT: doesn't point to an LDT descriptor!"));
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exception(BX_GP_EXCEPTION, raw_selector & 0xfffc);
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}
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/* #NP(selector) if LDT descriptor is not present */
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if (! IS_PRESENT(descriptor)) {
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BX_ERROR(("LLDT: LDT descriptor not present!"));
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exception(BX_NP_EXCEPTION, raw_selector & 0xfffc);
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}
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#if BX_SUPPORT_X86_64
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if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
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descriptor.u.segment.base |= ((Bit64u)(dword3) << 32);
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BX_DEBUG(("64 bit LDT base = 0x%08x%08x",
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GET32H(descriptor.u.segment.base), GET32L(descriptor.u.segment.base)));
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if (!IsCanonical(descriptor.u.segment.base)) {
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BX_ERROR(("LLDT: non-canonical LDT descriptor base!"));
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exception(BX_GP_EXCEPTION, raw_selector & 0xfffc);
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}
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}
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#endif
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BX_CPU_THIS_PTR ldtr.selector = selector;
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BX_CPU_THIS_PTR ldtr.cache = descriptor;
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BX_CPU_THIS_PTR ldtr.cache.valid = 1;
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LTR_Ew(bxInstruction_c *i)
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{
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bx_descriptor_t descriptor;
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bx_selector_t selector;
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Bit16u raw_selector;
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Bit32u dword1, dword2;
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#if BX_SUPPORT_X86_64
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Bit32u dword3 = 0;
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#endif
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if (! protected_mode()) {
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BX_ERROR(("LTR: not recognized in real or virtual-8086 mode"));
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exception(BX_UD_EXCEPTION, 0);
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}
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if (CPL != 0) {
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BX_ERROR(("LTR: The current priveledge level is not 0"));
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exception(BX_GP_EXCEPTION, 0);
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}
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#if BX_SUPPORT_VMX >= 2
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if (BX_CPU_THIS_PTR in_vmx_guest)
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if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_DESCRIPTOR_TABLE_VMEXIT))
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VMexit_Instruction(i, VMX_VMEXIT_LDTR_TR_ACCESS);
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#endif
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|
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if (i->modC0()) {
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raw_selector = BX_READ_16BIT_REG(i->rm());
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}
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else {
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
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/* pointer, segment address pair */
|
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raw_selector = read_virtual_word(i->seg(), eaddr);
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}
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|
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/* if selector is NULL, invalidate and done */
|
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if ((raw_selector & BX_SELECTOR_RPL_MASK) == 0) {
|
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BX_ERROR(("LTR: loading with NULL selector!"));
|
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exception(BX_GP_EXCEPTION, 0);
|
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}
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|
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/* parse fields in selector, then check for null selector */
|
|
parse_selector(raw_selector, &selector);
|
|
|
|
if (selector.ti) {
|
|
BX_ERROR(("LTR: selector.ti != 0"));
|
|
exception(BX_GP_EXCEPTION, raw_selector & 0xfffc);
|
|
}
|
|
|
|
/* fetch descriptor; call handles out of limits checks */
|
|
#if BX_SUPPORT_X86_64
|
|
if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
|
|
fetch_raw_descriptor_64(&selector, &dword1, &dword2, &dword3, BX_GP_EXCEPTION);
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
fetch_raw_descriptor(&selector, &dword1, &dword2, BX_GP_EXCEPTION);
|
|
}
|
|
|
|
parse_descriptor(dword1, dword2, &descriptor);
|
|
|
|
/* #GP(selector) if object is not a TSS or is already busy */
|
|
if (descriptor.valid==0 || descriptor.segment ||
|
|
(descriptor.type!=BX_SYS_SEGMENT_AVAIL_286_TSS &&
|
|
descriptor.type!=BX_SYS_SEGMENT_AVAIL_386_TSS))
|
|
{
|
|
BX_ERROR(("LTR: doesn't point to an available TSS descriptor!"));
|
|
exception(BX_GP_EXCEPTION, raw_selector & 0xfffc);
|
|
}
|
|
|
|
#if BX_SUPPORT_X86_64
|
|
if (long_mode() && descriptor.type!=BX_SYS_SEGMENT_AVAIL_386_TSS) {
|
|
BX_ERROR(("LTR: doesn't point to an available TSS386 descriptor in long mode!"));
|
|
exception(BX_GP_EXCEPTION, raw_selector & 0xfffc);
|
|
}
|
|
#endif
|
|
|
|
/* #NP(selector) if TSS descriptor is not present */
|
|
if (! IS_PRESENT(descriptor)) {
|
|
BX_ERROR(("LTR: TSS descriptor not present!"));
|
|
exception(BX_NP_EXCEPTION, raw_selector & 0xfffc);
|
|
}
|
|
|
|
#if BX_SUPPORT_X86_64
|
|
if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
|
|
descriptor.u.segment.base |= ((Bit64u)(dword3) << 32);
|
|
BX_DEBUG(("64 bit TSS base = 0x%08x%08x",
|
|
GET32H(descriptor.u.segment.base), GET32L(descriptor.u.segment.base)));
|
|
if (!IsCanonical(descriptor.u.segment.base)) {
|
|
BX_ERROR(("LTR: non-canonical TSS descriptor base!"));
|
|
exception(BX_GP_EXCEPTION, raw_selector & 0xfffc);
|
|
}
|
|
}
|
|
#endif
|
|
|
|
BX_CPU_THIS_PTR tr.selector = selector;
|
|
BX_CPU_THIS_PTR tr.cache = descriptor;
|
|
BX_CPU_THIS_PTR tr.cache.valid = 1;
|
|
// tr.cache.type should not have busy bit, or it would not get
|
|
// through the conditions above.
|
|
BX_ASSERT((BX_CPU_THIS_PTR tr.cache.type & 2) == 0);
|
|
BX_CPU_THIS_PTR tr.cache.type |= 2; // mark as busy
|
|
|
|
/* mark as busy */
|
|
if (!(dword2 & 0x0200)) {
|
|
dword2 |= 0x0200; /* set busy bit */
|
|
access_write_linear(BX_CPU_THIS_PTR gdtr.base + selector.index*8 + 4, 4, 0, &dword2);
|
|
}
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VERR_Ew(bxInstruction_c *i)
|
|
{
|
|
/* for 16 bit operand size mode */
|
|
Bit16u raw_selector;
|
|
bx_descriptor_t descriptor;
|
|
bx_selector_t selector;
|
|
Bit32u dword1, dword2;
|
|
|
|
if (! protected_mode()) {
|
|
BX_ERROR(("VERR: not recognized in real or virtual-8086 mode"));
|
|
exception(BX_UD_EXCEPTION, 0);
|
|
}
|
|
|
|
if (i->modC0()) {
|
|
raw_selector = BX_READ_16BIT_REG(i->rm());
|
|
}
|
|
else {
|
|
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
/* pointer, segment address pair */
|
|
raw_selector = read_virtual_word(i->seg(), eaddr);
|
|
}
|
|
|
|
/* if selector null, clear ZF and done */
|
|
if ((raw_selector & 0xfffc) == 0) {
|
|
BX_DEBUG(("VERR: null selector"));
|
|
clear_ZF();
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
/* if source selector is visible at CPL & RPL,
|
|
* within the descriptor table, and of type accepted by VERR instruction,
|
|
* then load register with segment limit and set ZF */
|
|
parse_selector(raw_selector, &selector);
|
|
|
|
if (!fetch_raw_descriptor2(&selector, &dword1, &dword2)) {
|
|
/* not within descriptor table */
|
|
BX_DEBUG(("VERR: not within descriptor table"));
|
|
clear_ZF();
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
parse_descriptor(dword1, dword2, &descriptor);
|
|
|
|
if (descriptor.segment==0) { /* system or gate descriptor */
|
|
BX_DEBUG(("VERR: system descriptor"));
|
|
clear_ZF(); /* inaccessible */
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
if (descriptor.valid==0) {
|
|
BX_DEBUG(("VERR: valid bit cleared"));
|
|
clear_ZF(); /* inaccessible */
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
/* normal data/code segment */
|
|
if (IS_CODE_SEGMENT(descriptor.type)) { /* code segment */
|
|
/* ignore DPL for readable conforming segments */
|
|
if (IS_CODE_SEGMENT_CONFORMING(descriptor.type) &&
|
|
IS_CODE_SEGMENT_READABLE(descriptor.type))
|
|
{
|
|
BX_DEBUG(("VERR: conforming code, OK"));
|
|
assert_ZF(); /* accessible */
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
if (!IS_CODE_SEGMENT_READABLE(descriptor.type)) {
|
|
BX_DEBUG(("VERR: code not readable"));
|
|
clear_ZF(); /* inaccessible */
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
/* readable, non-conforming code segment */
|
|
if ((descriptor.dpl<CPL) || (descriptor.dpl<selector.rpl)) {
|
|
BX_DEBUG(("VERR: non-conforming code not withing priv level"));
|
|
clear_ZF(); /* inaccessible */
|
|
}
|
|
else {
|
|
assert_ZF(); /* accessible */
|
|
}
|
|
}
|
|
else { /* data segment */
|
|
if ((descriptor.dpl<CPL) || (descriptor.dpl<selector.rpl)) {
|
|
BX_DEBUG(("VERR: data seg not withing priv level"));
|
|
clear_ZF(); /* not accessible */
|
|
}
|
|
else {
|
|
assert_ZF(); /* accessible */
|
|
}
|
|
}
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VERW_Ew(bxInstruction_c *i)
|
|
{
|
|
/* for 16 bit operand size mode */
|
|
Bit16u raw_selector;
|
|
bx_descriptor_t descriptor;
|
|
bx_selector_t selector;
|
|
Bit32u dword1, dword2;
|
|
|
|
if (! protected_mode()) {
|
|
BX_ERROR(("VERW: not recognized in real or virtual-8086 mode"));
|
|
exception(BX_UD_EXCEPTION, 0);
|
|
}
|
|
|
|
if (i->modC0()) {
|
|
raw_selector = BX_READ_16BIT_REG(i->rm());
|
|
}
|
|
else {
|
|
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
/* pointer, segment address pair */
|
|
raw_selector = read_virtual_word(i->seg(), eaddr);
|
|
}
|
|
|
|
/* if selector null, clear ZF and done */
|
|
if ((raw_selector & 0xfffc) == 0) {
|
|
BX_DEBUG(("VERW: null selector"));
|
|
clear_ZF();
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
/* if source selector is visible at CPL & RPL,
|
|
* within the descriptor table, and of type accepted by VERW instruction,
|
|
* then load register with segment limit and set ZF */
|
|
parse_selector(raw_selector, &selector);
|
|
|
|
if (!fetch_raw_descriptor2(&selector, &dword1, &dword2)) {
|
|
/* not within descriptor table */
|
|
BX_DEBUG(("VERW: not within descriptor table"));
|
|
clear_ZF();
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
parse_descriptor(dword1, dword2, &descriptor);
|
|
|
|
/* rule out system segments & code segments */
|
|
if (descriptor.segment==0 || IS_CODE_SEGMENT(descriptor.type)) {
|
|
BX_DEBUG(("VERW: system seg or code"));
|
|
clear_ZF();
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
if (descriptor.valid==0) {
|
|
BX_DEBUG(("VERW: valid bit cleared"));
|
|
clear_ZF();
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
/* data segment */
|
|
if (IS_DATA_SEGMENT_WRITEABLE(descriptor.type)) { /* writable */
|
|
if ((descriptor.dpl<CPL) || (descriptor.dpl<selector.rpl)) {
|
|
BX_DEBUG(("VERW: writable data seg not within priv level"));
|
|
clear_ZF(); /* not accessible */
|
|
}
|
|
else {
|
|
assert_ZF(); /* accessible */
|
|
}
|
|
}
|
|
else {
|
|
BX_DEBUG(("VERW: data seg not writable"));
|
|
clear_ZF(); /* not accessible */
|
|
}
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SGDT_Ms(bxInstruction_c *i)
|
|
{
|
|
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
|
|
|
|
#if BX_SUPPORT_VMX >= 2
|
|
if (BX_CPU_THIS_PTR in_vmx_guest)
|
|
if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_DESCRIPTOR_TABLE_VMEXIT))
|
|
VMexit_Instruction(i, VMX_VMEXIT_GDTR_IDTR_ACCESS);
|
|
#endif
|
|
|
|
#if BX_SUPPORT_SVM
|
|
if (BX_CPU_THIS_PTR in_svm_guest) {
|
|
if (SVM_INTERCEPT(SVM_INTERCEPT0_GDTR_READ)) Svm_Vmexit(SVM_VMEXIT_GDTR_READ);
|
|
}
|
|
#endif
|
|
|
|
Bit16u limit_16 = BX_CPU_THIS_PTR gdtr.limit;
|
|
Bit32u base_32 = (Bit32u) BX_CPU_THIS_PTR gdtr.base;
|
|
|
|
Bit32u eaddr = (Bit32u) BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
write_virtual_word_32(i->seg(), eaddr, limit_16);
|
|
write_virtual_dword_32(i->seg(), (eaddr+2) & i->asize_mask(), base_32);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SIDT_Ms(bxInstruction_c *i)
|
|
{
|
|
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
|
|
|
|
#if BX_SUPPORT_VMX >= 2
|
|
if (BX_CPU_THIS_PTR in_vmx_guest)
|
|
if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_DESCRIPTOR_TABLE_VMEXIT))
|
|
VMexit_Instruction(i, VMX_VMEXIT_GDTR_IDTR_ACCESS);
|
|
#endif
|
|
|
|
#if BX_SUPPORT_SVM
|
|
if (BX_CPU_THIS_PTR in_svm_guest) {
|
|
if (SVM_INTERCEPT(SVM_INTERCEPT0_IDTR_READ)) Svm_Vmexit(SVM_VMEXIT_IDTR_READ);
|
|
}
|
|
#endif
|
|
|
|
Bit16u limit_16 = BX_CPU_THIS_PTR idtr.limit;
|
|
Bit32u base_32 = (Bit32u) BX_CPU_THIS_PTR idtr.base;
|
|
|
|
Bit32u eaddr = (Bit32u) BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
write_virtual_word_32(i->seg(), eaddr, limit_16);
|
|
write_virtual_dword_32(i->seg(), (eaddr+2) & i->asize_mask(), base_32);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LGDT_Ms(bxInstruction_c *i)
|
|
{
|
|
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
|
|
|
|
// CPL is always 0 is real mode
|
|
if (/* !real_mode() && */ CPL!=0) {
|
|
BX_ERROR(("LGDT: CPL != 0 causes #GP"));
|
|
exception(BX_GP_EXCEPTION, 0);
|
|
}
|
|
|
|
#if BX_SUPPORT_VMX >= 2
|
|
if (BX_CPU_THIS_PTR in_vmx_guest)
|
|
if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_DESCRIPTOR_TABLE_VMEXIT))
|
|
VMexit_Instruction(i, VMX_VMEXIT_GDTR_IDTR_ACCESS);
|
|
#endif
|
|
|
|
#if BX_SUPPORT_SVM
|
|
if (BX_CPU_THIS_PTR in_svm_guest) {
|
|
if (SVM_INTERCEPT(SVM_INTERCEPT0_GDTR_WRITE)) Svm_Vmexit(SVM_VMEXIT_GDTR_WRITE);
|
|
}
|
|
#endif
|
|
|
|
Bit32u eaddr = (Bit32u) BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
Bit16u limit_16 = read_virtual_word_32(i->seg(), eaddr);
|
|
Bit32u base_32 = read_virtual_dword_32(i->seg(), (eaddr + 2) & i->asize_mask());
|
|
|
|
if (i->os32L() == 0) base_32 &= 0x00ffffff; /* ignore upper 8 bits */
|
|
|
|
BX_CPU_THIS_PTR gdtr.limit = limit_16;
|
|
BX_CPU_THIS_PTR gdtr.base = base_32;
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LIDT_Ms(bxInstruction_c *i)
|
|
{
|
|
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
|
|
|
|
// CPL is always 0 is real mode
|
|
if (/* !real_mode() && */ CPL!=0) {
|
|
BX_ERROR(("LIDT: CPL != 0 causes #GP"));
|
|
exception(BX_GP_EXCEPTION, 0);
|
|
}
|
|
|
|
#if BX_SUPPORT_VMX >= 2
|
|
if (BX_CPU_THIS_PTR in_vmx_guest)
|
|
if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_DESCRIPTOR_TABLE_VMEXIT))
|
|
VMexit_Instruction(i, VMX_VMEXIT_GDTR_IDTR_ACCESS);
|
|
#endif
|
|
|
|
#if BX_SUPPORT_SVM
|
|
if (BX_CPU_THIS_PTR in_svm_guest) {
|
|
if (SVM_INTERCEPT(SVM_INTERCEPT0_IDTR_WRITE)) Svm_Vmexit(SVM_VMEXIT_IDTR_WRITE);
|
|
}
|
|
#endif
|
|
|
|
Bit32u eaddr = (Bit32u) BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
Bit16u limit_16 = read_virtual_word_32(i->seg(), eaddr);
|
|
Bit32u base_32 = read_virtual_dword_32(i->seg(), (eaddr + 2) & i->asize_mask());
|
|
|
|
if (i->os32L() == 0) base_32 &= 0x00ffffff; /* ignore upper 8 bits */
|
|
|
|
BX_CPU_THIS_PTR idtr.limit = limit_16;
|
|
BX_CPU_THIS_PTR idtr.base = base_32;
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
#if BX_SUPPORT_X86_64
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SGDT64_Ms(bxInstruction_c *i)
|
|
{
|
|
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
|
|
|
|
#if BX_SUPPORT_VMX >= 2
|
|
if (BX_CPU_THIS_PTR in_vmx_guest)
|
|
if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_DESCRIPTOR_TABLE_VMEXIT))
|
|
VMexit_Instruction(i, VMX_VMEXIT_GDTR_IDTR_ACCESS);
|
|
#endif
|
|
|
|
#if BX_SUPPORT_SVM
|
|
if (BX_CPU_THIS_PTR in_svm_guest) {
|
|
if (SVM_INTERCEPT(SVM_INTERCEPT0_GDTR_READ)) Svm_Vmexit(SVM_VMEXIT_GDTR_READ);
|
|
}
|
|
#endif
|
|
|
|
Bit16u limit_16 = BX_CPU_THIS_PTR gdtr.limit;
|
|
Bit64u base_64 = BX_CPU_THIS_PTR gdtr.base;
|
|
|
|
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
write_virtual_word_64(i->seg(), eaddr, limit_16);
|
|
write_virtual_qword_64(i->seg(), (eaddr+2) & i->asize_mask(), base_64);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SIDT64_Ms(bxInstruction_c *i)
|
|
{
|
|
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
|
|
|
|
#if BX_SUPPORT_VMX >= 2
|
|
if (BX_CPU_THIS_PTR in_vmx_guest)
|
|
if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_DESCRIPTOR_TABLE_VMEXIT))
|
|
VMexit_Instruction(i, VMX_VMEXIT_GDTR_IDTR_ACCESS);
|
|
#endif
|
|
|
|
#if BX_SUPPORT_SVM
|
|
if (BX_CPU_THIS_PTR in_svm_guest) {
|
|
if (SVM_INTERCEPT(SVM_INTERCEPT0_IDTR_READ)) Svm_Vmexit(SVM_VMEXIT_IDTR_READ);
|
|
}
|
|
#endif
|
|
|
|
Bit16u limit_16 = BX_CPU_THIS_PTR idtr.limit;
|
|
Bit64u base_64 = BX_CPU_THIS_PTR idtr.base;
|
|
|
|
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
write_virtual_word_64(i->seg(), eaddr, limit_16);
|
|
write_virtual_qword_64(i->seg(), (eaddr+2) & i->asize_mask(), base_64);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LGDT64_Ms(bxInstruction_c *i)
|
|
{
|
|
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
|
|
|
|
if (CPL!=0) {
|
|
BX_ERROR(("LGDT64_Ms: CPL != 0 in long mode"));
|
|
exception(BX_GP_EXCEPTION, 0);
|
|
}
|
|
|
|
#if BX_SUPPORT_VMX >= 2
|
|
if (BX_CPU_THIS_PTR in_vmx_guest)
|
|
if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_DESCRIPTOR_TABLE_VMEXIT))
|
|
VMexit_Instruction(i, VMX_VMEXIT_GDTR_IDTR_ACCESS);
|
|
#endif
|
|
|
|
#if BX_SUPPORT_SVM
|
|
if (BX_CPU_THIS_PTR in_svm_guest) {
|
|
if (SVM_INTERCEPT(SVM_INTERCEPT0_GDTR_WRITE)) Svm_Vmexit(SVM_VMEXIT_GDTR_WRITE);
|
|
}
|
|
#endif
|
|
|
|
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
Bit64u base_64 = read_virtual_qword_64(i->seg(), (eaddr + 2) & i->asize_mask());
|
|
if (! IsCanonical(base_64)) {
|
|
BX_ERROR(("LGDT64_Ms: loaded base64 address is not in canonical form!"));
|
|
exception(BX_GP_EXCEPTION, 0);
|
|
}
|
|
Bit16u limit_16 = read_virtual_word_64(i->seg(), eaddr);
|
|
|
|
BX_CPU_THIS_PTR gdtr.limit = limit_16;
|
|
BX_CPU_THIS_PTR gdtr.base = base_64;
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LIDT64_Ms(bxInstruction_c *i)
|
|
{
|
|
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
|
|
|
|
if (CPL != 0) {
|
|
BX_ERROR(("LIDT64_Ms: CPL != 0 in long mode"));
|
|
exception(BX_GP_EXCEPTION, 0);
|
|
}
|
|
|
|
#if BX_SUPPORT_VMX >= 2
|
|
if (BX_CPU_THIS_PTR in_vmx_guest)
|
|
if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_DESCRIPTOR_TABLE_VMEXIT))
|
|
VMexit_Instruction(i, VMX_VMEXIT_GDTR_IDTR_ACCESS);
|
|
#endif
|
|
|
|
#if BX_SUPPORT_SVM
|
|
if (BX_CPU_THIS_PTR in_svm_guest) {
|
|
if (SVM_INTERCEPT(SVM_INTERCEPT0_IDTR_WRITE)) Svm_Vmexit(SVM_VMEXIT_IDTR_WRITE);
|
|
}
|
|
#endif
|
|
|
|
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
Bit64u base_64 = read_virtual_qword_64(i->seg(), (eaddr + 2) & i->asize_mask());
|
|
if (! IsCanonical(base_64)) {
|
|
BX_ERROR(("LIDT64_Ms: loaded base64 address is not in canonical form!"));
|
|
exception(BX_GP_EXCEPTION, 0);
|
|
}
|
|
Bit16u limit_16 = read_virtual_word_64(i->seg(), eaddr);
|
|
|
|
BX_CPU_THIS_PTR idtr.limit = limit_16;
|
|
BX_CPU_THIS_PTR idtr.base = base_64;
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
#endif
|