338 lines
9.0 KiB
C++
338 lines
9.0 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2002-2018 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_3DNOW
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BX_CPP_INLINE void prepare_softfloat_status_word(float_status_t &status, int rounding_mode)
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{
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status.float_exception_flags = 0; // clear exceptions before execution
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status.float_nan_handling_mode = float_first_operand_nan;
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status.float_rounding_mode = rounding_mode;
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status.flush_underflow_to_zero = 0;
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFPNACC_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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/* 0F 0F /r 0C */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PI2FW_PqQq(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 5
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BxPackedMmxRegister result, op;
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BX_CPU_THIS_PTR prepareMMX();
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/* op is a register or memory reference */
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if (i->modC0()) {
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op = BX_READ_MMX_REG(i->src());
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}
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else {
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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/* pointer, segment address pair */
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op = read_virtual_qword(i->seg(), eaddr);
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}
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BX_CPU_THIS_PTR prepareFPU2MMX(); /* FPU2MMX transition */
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float_status_t status_word;
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prepare_softfloat_status_word(status_word, float_round_to_zero);
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MMXUD0(result) =
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int32_to_float32((Bit32s)(MMXSW0(op)), status_word);
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MMXUD1(result) =
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int32_to_float32((Bit32s)(MMXSW2(op)), status_word);
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/* now write result back to destination */
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BX_WRITE_MMX_REG(i->dst(), result);
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BX_NEXT_INSTR(i);
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#endif
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}
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/* 0F 0F /r 0D */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PI2FD_PqQq(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 5
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BxPackedMmxRegister result, op;
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BX_CPU_THIS_PTR prepareMMX();
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/* op is a register or memory reference */
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if (i->modC0()) {
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op = BX_READ_MMX_REG(i->src());
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}
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else {
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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/* pointer, segment address pair */
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op = read_virtual_qword(i->seg(), eaddr);
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}
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BX_CPU_THIS_PTR prepareFPU2MMX(); /* FPU2MMX transition */
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float_status_t status_word;
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prepare_softfloat_status_word(status_word, float_round_to_zero);
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MMXUD0(result) =
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int32_to_float32(MMXSD0(op), status_word);
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MMXUD1(result) =
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int32_to_float32(MMXSD1(op), status_word);
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/* now write result back to destination */
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BX_WRITE_MMX_REG(i->dst(), result);
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BX_NEXT_INSTR(i);
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PF2IW_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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/* 0F 0F /r 1D */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PF2ID_PqQq(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 5
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BxPackedMmxRegister result, op;
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BX_CPU_THIS_PTR prepareMMX();
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/* op is a register or memory reference */
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if (i->modC0()) {
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op = BX_READ_MMX_REG(i->src());
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}
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else {
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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/* pointer, segment address pair */
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op = read_virtual_qword(i->seg(), eaddr);
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}
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BX_CPU_THIS_PTR prepareFPU2MMX(); /* FPU2MMX transition */
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float_status_t status_word;
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prepare_softfloat_status_word(status_word, float_round_to_zero);
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MMXSD0(result) =
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float32_to_int32_round_to_zero(MMXUD0(op), status_word);
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MMXSD1(result) =
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float32_to_int32_round_to_zero(MMXUD1(op), status_word);
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/* now write result back to destination */
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BX_WRITE_MMX_REG(i->dst(), result);
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BX_NEXT_INSTR(i);
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFNACC_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFCMPGE_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFMIN_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFRCP_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFRSQRT_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFSUB_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFADD_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFCMPGT_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFMAX_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFRCPIT1_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFRSQIT1_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFSUBR_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFACC_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFCMPEQ_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFMUL_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFRCPIT2_PqQq(bxInstruction_c *i)
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{
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BX_PANIC(("%s: 3DNow! instruction still not implemented", i->getIaOpcodeNameShort()));
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BX_NEXT_INSTR(i);
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}
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/* 0F 0F /r B7 */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PMULHRW_PqQq(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 5
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BX_CPU_THIS_PTR prepareMMX();
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BxPackedMmxRegister op1 = BX_READ_MMX_REG(i->dst()), op2, result;
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/* op2 is a register or memory reference */
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if (i->modC0()) {
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op2 = BX_READ_MMX_REG(i->src());
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}
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else {
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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/* pointer, segment address pair */
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op2 = read_virtual_qword(i->seg(), eaddr);
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}
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BX_CPU_THIS_PTR prepareFPU2MMX(); /* FPU2MMX transition */
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Bit32s product1 = Bit32s(MMXSW0(op1)) * Bit32s(MMXSW0(op2)) + 0x8000;
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Bit32s product2 = Bit32s(MMXSW1(op1)) * Bit32s(MMXSW1(op2)) + 0x8000;
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Bit32s product3 = Bit32s(MMXSW2(op1)) * Bit32s(MMXSW2(op2)) + 0x8000;
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Bit32s product4 = Bit32s(MMXSW3(op1)) * Bit32s(MMXSW3(op2)) + 0x8000;
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MMXUW0(result) = Bit16u(product1 >> 16);
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MMXUW1(result) = Bit16u(product2 >> 16);
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MMXUW2(result) = Bit16u(product3 >> 16);
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MMXUW3(result) = Bit16u(product4 >> 16);
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/* now write result back to destination */
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BX_WRITE_MMX_REG(i->dst(), result);
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BX_NEXT_INSTR(i);
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#endif
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}
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/* 0F 0F /r BB */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::PSWAPD_PqQq(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 5
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BX_CPU_THIS_PTR prepareMMX();
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BxPackedMmxRegister result, op;
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/* op is a register or memory reference */
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if (i->modC0()) {
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op = BX_READ_MMX_REG(i->src());
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}
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else {
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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/* pointer, segment address pair */
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op = read_virtual_qword(i->seg(), eaddr);
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}
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BX_CPU_THIS_PTR prepareFPU2MMX(); /* FPU2MMX transition */
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MMXUD0(result) = MMXUD1(op);
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MMXUD1(result) = MMXUD0(op);
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/* now write result back to destination */
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BX_WRITE_MMX_REG(i->dst(), result);
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BX_NEXT_INSTR(i);
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#endif
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}
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#endif
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