e6981218dc
- check at startup time which VMX fields are accessible - next step: simplify VMREAD and VMWRITE instructions - eliminate switch statements
312 lines
10 KiB
C++
Executable File
312 lines
10 KiB
C++
Executable File
/////////////////////////////////////////////////////////////////////////
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// $Id: vmcs.cc,v 1.3 2010-11-11 21:41:03 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2009-2010 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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static unsigned vmcs_map[16][1+VMX_HIGHEST_VMCS_ENCODING];
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void BX_CPU_C::init_VMCS(void)
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{
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static bx_bool vmcs_map_ready = 0;
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unsigned type, field;
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if (vmcs_map_ready) return;
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vmcs_map_ready = 1;
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for (type=0; type<16; type++) {
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for (field=0; field <= VMX_HIGHEST_VMCS_ENCODING; field++) {
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vmcs_map[type][field] = 0xffffffff;
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}
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}
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#if 1
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// try to build generic VMCS map
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for (type=0; type<16; type++) {
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for (field=0; field <= VMX_HIGHEST_VMCS_ENCODING; field++) {
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unsigned encoding = (type << 10) + field;
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if (vmcs_map[type][field] != 0xffffffff) {
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BX_PANIC(("VMCS type %d field %d (encoding = 0x%08x) is already initialized", type, field, encoding));
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}
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if (vmcs_field_supported(encoding)) {
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// allocate 64 fields (4 byte each) per type
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vmcs_map[type][field] = VMCS_DATA_OFFSET + (type*64 + field) * 4;
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if(vmcs_map[type][field] >= VMX_VMCS_AREA_SIZE) {
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BX_PANIC(("VMCS type %d field %d (encoding = 0x%08x) is out of VMCS boundaries", type, field, encoding));
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}
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}
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}
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}
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#else
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// define your own VMCS format
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#include "vmcs.h"
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#endif
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}
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unsigned vmcs_field_offset(Bit32u encoding)
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{
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return vmcs_map[VMCS_FIELD_INDEX(encoding)][VMCS_FIELD(encoding)];
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}
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bx_bool BX_CPU_C::vmcs_field_supported(Bit32u encoding)
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{
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switch(encoding)
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{
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#if BX_SUPPORT_VMX >= 2
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/* VMCS 16-bit control fields */
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/* binary 0000_00xx_xxxx_xxx0 */
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case VMCS_16BIT_CONTROL_VPID:
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return 1;
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#endif
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/* VMCS 16-bit guest-state fields */
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/* binary 0000_10xx_xxxx_xxx0 */
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case VMCS_16BIT_GUEST_ES_SELECTOR:
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case VMCS_16BIT_GUEST_CS_SELECTOR:
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case VMCS_16BIT_GUEST_SS_SELECTOR:
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case VMCS_16BIT_GUEST_DS_SELECTOR:
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case VMCS_16BIT_GUEST_FS_SELECTOR:
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case VMCS_16BIT_GUEST_GS_SELECTOR:
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case VMCS_16BIT_GUEST_LDTR_SELECTOR:
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case VMCS_16BIT_GUEST_TR_SELECTOR:
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return 1;
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/* VMCS 16-bit host-state fields */
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/* binary 0000_11xx_xxxx_xxx0 */
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case VMCS_16BIT_HOST_ES_SELECTOR:
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case VMCS_16BIT_HOST_CS_SELECTOR:
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case VMCS_16BIT_HOST_SS_SELECTOR:
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case VMCS_16BIT_HOST_DS_SELECTOR:
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case VMCS_16BIT_HOST_FS_SELECTOR:
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case VMCS_16BIT_HOST_GS_SELECTOR:
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case VMCS_16BIT_HOST_TR_SELECTOR:
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return 1;
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/* VMCS 32_bit control fields */
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/* binary 0100_00xx_xxxx_xxx0 */
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case VMCS_32BIT_CONTROL_PIN_BASED_EXEC_CONTROLS:
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case VMCS_32BIT_CONTROL_PROCESSOR_BASED_VMEXEC_CONTROLS:
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case VMCS_32BIT_CONTROL_EXECUTION_BITMAP:
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case VMCS_32BIT_CONTROL_PAGE_FAULT_ERR_CODE_MASK:
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case VMCS_32BIT_CONTROL_PAGE_FAULT_ERR_CODE_MATCH:
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case VMCS_32BIT_CONTROL_CR3_TARGET_COUNT:
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case VMCS_32BIT_CONTROL_VMEXIT_CONTROLS:
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case VMCS_32BIT_CONTROL_VMEXIT_MSR_STORE_COUNT:
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case VMCS_32BIT_CONTROL_VMEXIT_MSR_LOAD_COUNT:
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case VMCS_32BIT_CONTROL_VMENTRY_CONTROLS:
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case VMCS_32BIT_CONTROL_VMENTRY_MSR_LOAD_COUNT:
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case VMCS_32BIT_CONTROL_VMENTRY_INTERRUPTION_INFO:
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case VMCS_32BIT_CONTROL_VMENTRY_EXCEPTION_ERR_CODE:
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case VMCS_32BIT_CONTROL_VMENTRY_INSTRUCTION_LENGTH:
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#if BX_SUPPORT_X86_64
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case VMCS_32BIT_CONTROL_TPR_THRESHOLD:
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#endif
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#if BX_SUPPORT_VMX >= 2
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case VMCS_32BIT_CONTROL_SECONDARY_VMEXEC_CONTROLS:
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#endif
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return 1;
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/* VMCS 32-bit read only data fields */
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/* binary 0100_01xx_xxxx_xxx0 */
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case VMCS_32BIT_INSTRUCTION_ERROR:
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case VMCS_32BIT_VMEXIT_REASON:
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case VMCS_32BIT_VMEXIT_INTERRUPTION_INFO:
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case VMCS_32BIT_VMEXIT_INTERRUPTION_ERR_CODE:
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case VMCS_32BIT_IDT_VECTORING_INFO:
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case VMCS_32BIT_IDT_VECTORING_ERR_CODE:
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case VMCS_32BIT_VMEXIT_INSTRUCTION_LENGTH:
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case VMCS_32BIT_VMEXIT_INSTRUCTION_INFO:
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return 1;
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/* VMCS 32-bit guest-state fields */
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/* binary 0100_10xx_xxxx_xxx0 */
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case VMCS_32BIT_GUEST_ES_LIMIT:
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case VMCS_32BIT_GUEST_CS_LIMIT:
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case VMCS_32BIT_GUEST_SS_LIMIT:
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case VMCS_32BIT_GUEST_DS_LIMIT:
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case VMCS_32BIT_GUEST_FS_LIMIT:
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case VMCS_32BIT_GUEST_GS_LIMIT:
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case VMCS_32BIT_GUEST_LDTR_LIMIT:
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case VMCS_32BIT_GUEST_TR_LIMIT:
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case VMCS_32BIT_GUEST_GDTR_LIMIT:
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case VMCS_32BIT_GUEST_IDTR_LIMIT:
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case VMCS_32BIT_GUEST_ES_ACCESS_RIGHTS:
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case VMCS_32BIT_GUEST_CS_ACCESS_RIGHTS:
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case VMCS_32BIT_GUEST_SS_ACCESS_RIGHTS:
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case VMCS_32BIT_GUEST_DS_ACCESS_RIGHTS:
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case VMCS_32BIT_GUEST_FS_ACCESS_RIGHTS:
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case VMCS_32BIT_GUEST_GS_ACCESS_RIGHTS:
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case VMCS_32BIT_GUEST_LDTR_ACCESS_RIGHTS:
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case VMCS_32BIT_GUEST_TR_ACCESS_RIGHTS:
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case VMCS_32BIT_GUEST_INTERRUPTIBILITY_STATE:
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case VMCS_32BIT_GUEST_ACTIVITY_STATE:
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case VMCS_32BIT_GUEST_SMBASE:
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case VMCS_32BIT_GUEST_IA32_SYSENTER_CS_MSR:
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return 1;
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/* VMCS 32-bit host-state fields */
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/* binary 0100_11xx_xxxx_xxx0 */
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case VMCS_32BIT_HOST_IA32_SYSENTER_CS_MSR:
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return 1;
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/* VMCS 64-bit control fields */
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/* binary 0010_00xx_xxxx_xxx0 */
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case VMCS_64BIT_CONTROL_IO_BITMAP_A:
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case VMCS_64BIT_CONTROL_IO_BITMAP_A_HI:
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case VMCS_64BIT_CONTROL_IO_BITMAP_B:
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case VMCS_64BIT_CONTROL_IO_BITMAP_B_HI:
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case VMCS_64BIT_CONTROL_MSR_BITMAPS:
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case VMCS_64BIT_CONTROL_MSR_BITMAPS_HI:
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case VMCS_64BIT_CONTROL_VMEXIT_MSR_STORE_ADDR:
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case VMCS_64BIT_CONTROL_VMEXIT_MSR_STORE_ADDR_HI:
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case VMCS_64BIT_CONTROL_VMEXIT_MSR_LOAD_ADDR:
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case VMCS_64BIT_CONTROL_VMEXIT_MSR_LOAD_ADDR_HI:
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case VMCS_64BIT_CONTROL_VMENTRY_MSR_LOAD_ADDR:
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case VMCS_64BIT_CONTROL_VMENTRY_MSR_LOAD_ADDR_HI:
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case VMCS_64BIT_CONTROL_EXECUTIVE_VMCS_PTR:
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case VMCS_64BIT_CONTROL_EXECUTIVE_VMCS_PTR_HI:
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case VMCS_64BIT_CONTROL_TSC_OFFSET:
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case VMCS_64BIT_CONTROL_TSC_OFFSET_HI:
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#if BX_SUPPORT_X86_64
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case VMCS_64BIT_CONTROL_VIRTUAL_APIC_PAGE_ADDR:
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case VMCS_64BIT_CONTROL_VIRTUAL_APIC_PAGE_ADDR_HI:
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#endif
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#if BX_SUPPORT_VMX >= 2
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case VMCS_64BIT_CONTROL_APIC_ACCESS_ADDR:
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case VMCS_64BIT_CONTROL_APIC_ACCESS_ADDR_HI:
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case VMCS_64BIT_CONTROL_EPTPTR:
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case VMCS_64BIT_CONTROL_EPTPTR_HI:
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#endif
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return 1;
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#if BX_SUPPORT_VMX >= 2
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/* VMCS 64-bit read only data fields */
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/* binary 0010_01xx_xxxx_xxx0 */
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case VMCS_64BIT_GUEST_PHYSICAL_ADDR:
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case VMCS_64BIT_GUEST_PHYSICAL_ADDR_HI:
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return 1;
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#endif
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/* VMCS 64-bit guest state fields */
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/* binary 0010_10xx_xxxx_xxx0 */
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case VMCS_64BIT_GUEST_LINK_POINTER:
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case VMCS_64BIT_GUEST_LINK_POINTER_HI:
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case VMCS_64BIT_GUEST_IA32_DEBUGCTL:
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case VMCS_64BIT_GUEST_IA32_DEBUGCTL_HI:
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#if BX_SUPPORT_VMX >= 2
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case VMCS_64BIT_GUEST_IA32_PAT:
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case VMCS_64BIT_GUEST_IA32_PAT_HI:
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case VMCS_64BIT_GUEST_IA32_EFER:
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case VMCS_64BIT_GUEST_IA32_EFER_HI:
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case VMCS_64BIT_GUEST_IA32_PDPTE0:
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case VMCS_64BIT_GUEST_IA32_PDPTE0_HI:
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case VMCS_64BIT_GUEST_IA32_PDPTE1:
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case VMCS_64BIT_GUEST_IA32_PDPTE1_HI:
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case VMCS_64BIT_GUEST_IA32_PDPTE2:
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case VMCS_64BIT_GUEST_IA32_PDPTE2_HI:
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case VMCS_64BIT_GUEST_IA32_PDPTE3:
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case VMCS_64BIT_GUEST_IA32_PDPTE3_HI:
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#endif
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return 1;
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#if BX_SUPPORT_VMX >= 2
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/* VMCS 64-bit host state fields */
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/* binary 0010_11xx_xxxx_xxx0 */
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case VMCS_64BIT_HOST_IA32_PAT:
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case VMCS_64BIT_HOST_IA32_PAT_HI:
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case VMCS_64BIT_HOST_IA32_EFER:
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case VMCS_64BIT_HOST_IA32_EFER_HI:
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return 1;
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#endif
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/* VMCS natural width control fields */
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/* binary 0110_00xx_xxxx_xxx0 */
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case VMCS_CONTROL_CR0_GUEST_HOST_MASK:
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case VMCS_CONTROL_CR4_GUEST_HOST_MASK:
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case VMCS_CONTROL_CR0_READ_SHADOW:
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case VMCS_CONTROL_CR4_READ_SHADOW:
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case VMCS_CR3_TARGET0:
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case VMCS_CR3_TARGET1:
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case VMCS_CR3_TARGET2:
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case VMCS_CR3_TARGET3:
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return 1;
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/* VMCS natural width read only data fields */
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/* binary 0110_01xx_xxxx_xxx0 */
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case VMCS_VMEXIT_QUALIFICATION:
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case VMCS_IO_RCX:
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case VMCS_IO_RSI:
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case VMCS_IO_RDI:
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case VMCS_IO_RIP:
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case VMCS_GUEST_LINEAR_ADDR:
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return 1;
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/* VMCS natural width guest state fields */
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/* binary 0110_10xx_xxxx_xxx0 */
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case VMCS_GUEST_CR0:
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case VMCS_GUEST_CR3:
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case VMCS_GUEST_CR4:
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case VMCS_GUEST_ES_BASE:
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case VMCS_GUEST_CS_BASE:
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case VMCS_GUEST_SS_BASE:
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case VMCS_GUEST_DS_BASE:
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case VMCS_GUEST_FS_BASE:
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case VMCS_GUEST_GS_BASE:
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case VMCS_GUEST_LDTR_BASE:
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case VMCS_GUEST_TR_BASE:
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case VMCS_GUEST_GDTR_BASE:
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case VMCS_GUEST_IDTR_BASE:
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case VMCS_GUEST_DR7:
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case VMCS_GUEST_RSP:
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case VMCS_GUEST_RIP:
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case VMCS_GUEST_RFLAGS:
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case VMCS_GUEST_PENDING_DBG_EXCEPTIONS:
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case VMCS_GUEST_IA32_SYSENTER_ESP_MSR:
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case VMCS_GUEST_IA32_SYSENTER_EIP_MSR:
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return 1;
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/* VMCS natural width host state fields */
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/* binary 0110_11xx_xxxx_xxx0 */
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case VMCS_HOST_CR0:
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case VMCS_HOST_CR3:
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case VMCS_HOST_CR4:
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case VMCS_HOST_FS_BASE:
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case VMCS_HOST_GS_BASE:
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case VMCS_HOST_TR_BASE:
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case VMCS_HOST_GDTR_BASE:
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case VMCS_HOST_IDTR_BASE:
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case VMCS_HOST_IA32_SYSENTER_ESP_MSR:
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case VMCS_HOST_IA32_SYSENTER_EIP_MSR:
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case VMCS_HOST_RSP:
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case VMCS_HOST_RIP:
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return 1;
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default:
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return 0;
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}
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return 0;
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}
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