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in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.
59 lines
2.7 KiB
HTML
59 lines
2.7 KiB
HTML
<HTML>
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<HEAD>
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<META NAME="copyright" CONTENT="Copyright 2001 by MandrakeSoft S.A.">
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<META NAME="Author" CONTENT="Bryce Denney">
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<META HTTP-EQUIV="Content-Type" CONTENT="text/html;CHARSET=iso-8859-1">
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<TITLE>Running ./configure</TITLE>
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</HEAD>
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<BODY TEXT="#000000" BGCOLOR="#ececec" LINK="#3333cc" VLINK="#666666">
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<CENTER><H1>Symmetric Multiprocessor (SMP) Simulation </H1></CENTER>
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Bochs can now simulate an SMP machine when you use "--enable-processors=N"
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in the configure command. SMP support was added by Bryce Denney, who
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was very interested in watching a multiprocessor operating system work
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at a low level. It should also be helpful to operating system developers
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who are writing SMP drivers, or just for users who want to test drive
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an SMP machine to see what it looks like.
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<p>
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It is important to understand that configuring bochs for 4 processors will make
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your single-threaded applications run faster in general! On the contrary, it
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has to spend time simulating idle processors as well as the ones doing your
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task. The point is to simulate an SMP system, not to speed up a uniprocessor
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application.
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<p>
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What was required to make SMP work in Bochs? (Note that only Linux 2.2
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has been tested so far.)
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<ul>
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<li> local APIC on each processor with timer
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<li> one I/O APIC model
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<li> implement RDTSC feature (read time stamp counter)
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<li> modifications to rombios.c to add a data structure called the Intel
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Multiprocessor Configuration. An SMP-aware operating system
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probes BIOS memory to find the structure, which contains information about
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how many processors, their IDs, interrupt sources, etc.
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</ul>
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What needs to be done to improve SMP support?
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<ul>
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<li> still needs work on rombios.c to allow you to configure the number of
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processors in the .bochsrc. Presently you have to choose the number
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of processors at compile time.
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<li> debugger support is still limited. For example, you can set breakpoints,
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but you can't specify which processor you want to set the breakpoint for.
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<li> test on SMP systems other than linux 2.2.14
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<li> several parts of the APIC model which weren't needed for linux 2.2.14
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are not implemented yet and cause a panic. If you boot linux 2.4.3 for
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example, it says "panic: cluster model addressing not implemented". See
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<a href="http://sourceforge.net/tracker/index.php?func=detail&aid=421938&group_id=12580&atid=362580">this bug report</a> for tips on getting linux 2.4 to boot.
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(The apic is not the only problem!)
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<li> A number of people have suggested using threads to simulate each CPU in
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a different thread. Then on a real SMP machine, the threads can execute
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in parallel. This is a great idea, but it's not done at present.
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</ul>
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</BODY>
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</HTML>
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