df2d388fa4
devices except pciusb
827 lines
27 KiB
C++
827 lines
27 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: serial.cc,v 1.33 2003-07-31 19:51:42 vruppert Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2002 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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// Peter Grehan (grehan@iprg.nokia.com) coded most of this
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// serial emulation. Here's some notes from his implementation:
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// New files. Implement a single 8250, and allow terminal input/output
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// to stdout on FreeBSD. 16550/16550a/16552 should be easy: just add code
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// to handle a FIFO. I only did what was needed to get console output.
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// define USE_TTY_HACK to connect an xterm or similar (depends on tty.c)
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// to the serial port /AM
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// Define BX_PLUGGABLE in files that can be compiled into plugins. For
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// platforms that require a special tag on exported symbols, BX_PLUGGABLE
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// is used to know when we are exporting symbols and when we are importing.
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#define BX_PLUGGABLE
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#include "bochs.h"
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#define LOG_THIS theSerialDevice->
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#if USE_RAW_SERIAL
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#include <signal.h>
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#endif
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#ifdef WIN32
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#ifndef __MINGW32__
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// +++
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//#include <winsock2.h>
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#include <winsock.h>
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#endif
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#endif
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#if defined(__FreeBSD__) || defined(__OpenBSD__) || defined(__linux__) || defined(__GNU__)
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#define SERIAL_ENABLE
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#endif
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#ifdef SERIAL_ENABLE
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extern "C" {
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#include <termios.h>
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};
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#endif
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#ifdef SERIAL_ENABLE
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static struct termios term_orig, term_new;
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#endif
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static int tty_id;
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bx_serial_c *theSerialDevice = NULL;
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int
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libserial_LTX_plugin_init(plugin_t *plugin, plugintype_t type, int argc, char *argv[])
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{
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theSerialDevice = new bx_serial_c ();
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bx_devices.pluginSerialDevice = theSerialDevice;
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BX_REGISTER_DEVICE_DEVMODEL(plugin, type, theSerialDevice, BX_PLUGIN_SERIAL);
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return(0); // Success
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}
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void
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libserial_LTX_plugin_fini(void)
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{
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}
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bx_serial_c::bx_serial_c(void)
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{
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put("SER");
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settype(SERLOG);
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tty_id = -1;
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for (int i=0; i<BX_SERIAL_MAXDEV; i++) {
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s[i].tx_timer_index = BX_NULL_TIMER_HANDLE;
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s[i].rx_timer_index = BX_NULL_TIMER_HANDLE;
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}
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}
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bx_serial_c::~bx_serial_c(void)
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{
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#ifdef SERIAL_ENABLE
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if ((bx_options.com[0].Oenabled->get ()) && (tty_id >= 0))
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tcsetattr(tty_id, TCSAFLUSH, &term_orig);
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#endif
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// nothing for now
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}
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void
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bx_serial_c::init(void)
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{
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if (!bx_options.com[0].Oenabled->get ())
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return;
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#ifdef SERIAL_ENABLE
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if (strlen(bx_options.com[0].Odev->getptr ()) > 0) {
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tty_id = open(bx_options.com[0].Odev->getptr (), O_RDWR|O_NONBLOCK,600);
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if (tty_id < 0)
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BX_PANIC(("open of %s (%s) failed\n",
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"com1", bx_options.com[0].Odev->getptr ()));
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BX_DEBUG(("tty_id: %d",tty_id));
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tcgetattr(tty_id, &term_orig);
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bcopy((caddr_t) &term_orig, (caddr_t) &term_new, sizeof(struct termios));
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cfmakeraw(&term_new);
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term_new.c_oflag |= OPOST | ONLCR; // Enable NL to CR-NL translation
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#ifndef TRUE_CTLC
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// ctl-C will exit Bochs, or trap to the debugger
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term_new.c_iflag &= ~IGNBRK;
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term_new.c_iflag |= BRKINT;
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term_new.c_lflag |= ISIG;
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#else
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// ctl-C will be delivered to the serial port
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term_new.c_iflag |= IGNBRK;
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term_new.c_iflag &= ~BRKINT;
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#endif /* !def TRUE_CTLC */
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term_new.c_iflag = 0;
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term_new.c_oflag = 0;
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term_new.c_cflag = CS8|CREAD|CLOCAL;
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term_new.c_lflag = 0;
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term_new.c_cc[VMIN] = 1;
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term_new.c_cc[VTIME] = 0;
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//term_new.c_iflag |= IXOFF;
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tcsetattr(tty_id, TCSAFLUSH, &term_new);
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}
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#endif /* def SERIAL_ENABLE */
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// nothing for now
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#if USE_RAW_SERIAL
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this->raw = new serial_raw("/dev/cua0", SIGUSR1);
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#endif // USE_RAW_SERIAL
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DEV_register_irq(4, "Serial Port 1");
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#if defined (USE_TTY_HACK)
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tty_id = tty_alloc("Bx Serial Console, Your Window to the 8250");
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if (tty_id > 0)
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BX_INFO(("TTY allocated fd = %d", tty_get_fd(tty_id)));
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else
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BX_INFO(("TTY allocation failed"));
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#else
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//BX_INFO(("TTY not used, serial port is not connected"));
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#endif
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/*
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* Put the UART registers into their RESET state
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*/
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for (unsigned i=0; i<BX_SERIAL_CONFDEV; i++) {
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/* internal state */
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BX_SER_THIS s[i].rx_empty = 1;
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BX_SER_THIS s[i].tx_empty = 1;
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BX_SER_THIS s[i].ls_ipending = 0;
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BX_SER_THIS s[i].ms_ipending = 0;
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BX_SER_THIS s[i].rx_ipending = 0;
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BX_SER_THIS s[i].tx_ipending = 0;
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BX_SER_THIS s[i].ls_interrupt = 0;
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BX_SER_THIS s[i].ms_interrupt = 0;
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BX_SER_THIS s[i].rx_interrupt = 0;
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BX_SER_THIS s[i].tx_interrupt = 0;
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if (BX_SER_THIS s[i].tx_timer_index == BX_NULL_TIMER_HANDLE) {
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BX_SER_THIS s[i].tx_timer_index =
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bx_pc_system.register_timer(this, tx_timer_handler, 0,
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0,0, "serial.tx"); // one-shot, inactive
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}
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if (BX_SER_THIS s[i].rx_timer_index == BX_NULL_TIMER_HANDLE) {
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BX_SER_THIS s[i].rx_timer_index =
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bx_pc_system.register_timer(this, rx_timer_handler, 0,
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0,0, "serial.rx"); // one-shot, inactive
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}
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BX_SER_THIS s[i].rx_pollstate = BX_SER_RXIDLE;
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/* int enable: b0000 0000 */
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BX_SER_THIS s[i].int_enable.rxdata_enable = 0;
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BX_SER_THIS s[i].int_enable.txhold_enable = 0;
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BX_SER_THIS s[i].int_enable.rxlstat_enable = 0;
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BX_SER_THIS s[i].int_enable.modstat_enable = 0;
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/* int ID: b0000 0001 */
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BX_SER_THIS s[i].int_ident.ipending = 1;
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BX_SER_THIS s[i].int_ident.int_ID = 0;
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BX_SER_THIS s[i].int_ident.fifo_enabled = 0;
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/* FIFO control: b0000 0000 */
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BX_SER_THIS s[i].fifo_cntl.enable = 0;
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BX_SER_THIS s[i].fifo_cntl.rxreset = 0;
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BX_SER_THIS s[i].fifo_cntl.txreset = 0;
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BX_SER_THIS s[i].fifo_cntl.dmamode = 0;
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BX_SER_THIS s[i].fifo_cntl.rxtrigger = 0;
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/* Line Control reg: b0000 0000 */
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BX_SER_THIS s[i].line_cntl.wordlen_sel = 0;
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BX_SER_THIS s[i].line_cntl.stopbits = 0;
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BX_SER_THIS s[i].line_cntl.parity_enable = 0;
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BX_SER_THIS s[i].line_cntl.evenparity_sel = 0;
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BX_SER_THIS s[i].line_cntl.stick_parity = 0;
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BX_SER_THIS s[i].line_cntl.break_cntl = 0;
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BX_SER_THIS s[i].line_cntl.dlab = 0;
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/* Modem Control reg: b0000 0000 */
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BX_SER_THIS s[i].modem_cntl.dtr = 0;
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BX_SER_THIS s[i].modem_cntl.rts = 0;
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BX_SER_THIS s[i].modem_cntl.out1 = 0;
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BX_SER_THIS s[i].modem_cntl.out2 = 0;
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BX_SER_THIS s[i].modem_cntl.local_loopback = 0;
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/* Line Status register: b0110 0000 */
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BX_SER_THIS s[i].line_status.rxdata_ready = 0;
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BX_SER_THIS s[i].line_status.overrun_error = 0;
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BX_SER_THIS s[i].line_status.parity_error = 0;
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BX_SER_THIS s[i].line_status.framing_error = 0;
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BX_SER_THIS s[i].line_status.break_int = 0;
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BX_SER_THIS s[i].line_status.txhold_empty = 1;
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BX_SER_THIS s[i].line_status.txtransm_empty = 1;
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BX_SER_THIS s[i].line_status.fifo_error = 0;
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/* Modem Status register: bXXXX 0000 */
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BX_SER_THIS s[i].modem_status.delta_cts = 0;
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BX_SER_THIS s[i].modem_status.delta_dsr = 0;
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BX_SER_THIS s[i].modem_status.ri_trailedge = 0;
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BX_SER_THIS s[i].modem_status.delta_dcd = 0;
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BX_SER_THIS s[i].modem_status.cts = 0;
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BX_SER_THIS s[i].modem_status.dsr = 0;
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BX_SER_THIS s[i].modem_status.ri = 0;
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BX_SER_THIS s[i].modem_status.dcd = 0;
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BX_SER_THIS s[i].scratch = 0; /* scratch register */
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BX_SER_THIS s[i].divisor_lsb = 0; /* divisor-lsb register */
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BX_SER_THIS s[i].divisor_msb = 0; /* divisor-msb register */
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}
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for (unsigned addr=0x03F8; addr<=0x03FF; addr++) {
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BX_DEBUG(("register read/write: 0x%04x",addr));
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DEV_register_ioread_handler(this, read_handler, addr, "Serial Port 1", 1);
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DEV_register_iowrite_handler(this, write_handler, addr, "Serial Port 1", 1);
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}
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BX_INFO(( "com1 at 0x3f8/8 irq 4" ));
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}
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void
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bx_serial_c::reset(unsigned type)
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{
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}
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// static IO port read callback handler
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// redirects to non-static class handler to avoid virtual functions
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Bit32u
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bx_serial_c::read_handler(void *this_ptr, Bit32u address, unsigned io_len)
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{
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#if !BX_USE_SER_SMF
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bx_serial_c *class_ptr = (bx_serial_c *) this_ptr;
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return( class_ptr->read(address, io_len) );
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}
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Bit32u
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bx_serial_c::read(Bit32u address, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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#endif // !BX_USE_SER_SMF
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//UNUSED(address);
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Bit8u val;
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/* SERIAL PORT 1 */
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BX_DEBUG(("register read from address 0x%04x - ", (unsigned) address));
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switch (address) {
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case 0x03F8: /* receive buffer, or divisor latch LSB if DLAB set */
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if (BX_SER_THIS s[0].line_cntl.dlab) {
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val = BX_SER_THIS s[0].divisor_lsb;
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} else {
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val = BX_SER_THIS s[0].rxbuffer;
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BX_SER_THIS s[0].line_status.rxdata_ready = 0;
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BX_SER_THIS s[0].rx_empty = 1;
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/* If there are no more ints pending, clear the irq */
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if ((BX_SER_THIS s[0].tx_interrupt == 0) &&
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(BX_SER_THIS s[0].ls_interrupt == 0) &&
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(BX_SER_THIS s[0].ms_interrupt == 0)) {
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DEV_pic_lower_irq(4);
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}
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BX_SER_THIS s[0].rx_interrupt = 0;
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BX_SER_THIS s[0].rx_ipending = 0;
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}
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break;
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case 0x03F9: /* interrupt enable register, or div. latch MSB */
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if (BX_SER_THIS s[0].line_cntl.dlab) {
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val = BX_SER_THIS s[0].divisor_msb;
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} else {
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val = BX_SER_THIS s[0].int_enable.rxdata_enable |
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(BX_SER_THIS s[0].int_enable.txhold_enable << 1) |
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(BX_SER_THIS s[0].int_enable.rxlstat_enable << 2) |
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(BX_SER_THIS s[0].int_enable.modstat_enable << 3);
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}
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break;
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case 0x03FA: /* interrupt ID register */
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/*
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* Set the interrupt ID based on interrupt source
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*/
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if (BX_SER_THIS s[0].ls_interrupt) {
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BX_SER_THIS s[0].int_ident.int_ID = 0x3;
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BX_SER_THIS s[0].int_ident.ipending = 0;
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} else if (BX_SER_THIS s[0].rx_interrupt) {
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BX_SER_THIS s[0].int_ident.int_ID = 0x2;
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BX_SER_THIS s[0].int_ident.ipending = 0;
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} else if (BX_SER_THIS s[0].tx_interrupt) {
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BX_SER_THIS s[0].int_ident.int_ID = 0x1;
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BX_SER_THIS s[0].int_ident.ipending = 0;
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} else if (BX_SER_THIS s[0].ms_interrupt) {
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BX_SER_THIS s[0].int_ident.int_ID = 0x0;
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BX_SER_THIS s[0].int_ident.ipending = 0;
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} else {
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BX_SER_THIS s[0].int_ident.int_ID = 0x0;
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BX_SER_THIS s[0].int_ident.ipending = 1;
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}
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/* If there are no more ints pending, clear the irq */
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if ((BX_SER_THIS s[0].rx_interrupt == 0) &&
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(BX_SER_THIS s[0].ls_interrupt == 0) &&
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(BX_SER_THIS s[0].ms_interrupt == 0)) {
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DEV_pic_lower_irq(4);
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}
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BX_SER_THIS s[0].tx_interrupt = 0;
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BX_SER_THIS s[0].tx_ipending = 0;
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val = BX_SER_THIS s[0].int_ident.ipending |
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(BX_SER_THIS s[0].int_ident.int_ID << 1) |
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(BX_SER_THIS s[0].int_ident.fifo_enabled << 6);
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break;
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case 0x03FB: /* Line control register */
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val = BX_SER_THIS s[0].line_cntl.wordlen_sel |
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(BX_SER_THIS s[0].line_cntl.stopbits << 2) |
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(BX_SER_THIS s[0].line_cntl.parity_enable << 3) |
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(BX_SER_THIS s[0].line_cntl.evenparity_sel << 4) |
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(BX_SER_THIS s[0].line_cntl.stick_parity << 5) |
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(BX_SER_THIS s[0].line_cntl.break_cntl << 6) |
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(BX_SER_THIS s[0].line_cntl.dlab << 7);
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break;
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case 0x03FC: /* MODEM control register */
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val = BX_SER_THIS s[0].modem_cntl.dtr |
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(BX_SER_THIS s[0].modem_cntl.rts << 1) |
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(BX_SER_THIS s[0].modem_cntl.out1 << 2) |
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(BX_SER_THIS s[0].modem_cntl.out2 << 3) |
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(BX_SER_THIS s[0].modem_cntl.local_loopback << 4);
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break;
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case 0x03FD: /* Line status register */
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val = BX_SER_THIS s[0].line_status.rxdata_ready |
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(BX_SER_THIS s[0].line_status.overrun_error << 1) |
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(BX_SER_THIS s[0].line_status.parity_error << 2) |
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(BX_SER_THIS s[0].line_status.framing_error << 3) |
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(BX_SER_THIS s[0].line_status.break_int << 4) |
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(BX_SER_THIS s[0].line_status.txhold_empty << 5) |
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(BX_SER_THIS s[0].line_status.txtransm_empty << 6) |
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(BX_SER_THIS s[0].line_status.fifo_error << 7);
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BX_SER_THIS s[0].line_status.overrun_error = 0;
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BX_SER_THIS s[0].line_status.break_int = 0;
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/* If there are no more ints pending, clear the irq */
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if ((BX_SER_THIS s[0].rx_interrupt == 0) &&
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(BX_SER_THIS s[0].tx_interrupt == 0) &&
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(BX_SER_THIS s[0].ms_interrupt == 0)) {
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DEV_pic_lower_irq(4);
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}
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BX_SER_THIS s[0].ls_interrupt = 0;
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BX_SER_THIS s[0].ls_ipending = 0;
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break;
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case 0x03FE: /* MODEM status register */
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val = BX_SER_THIS s[0].modem_status.delta_cts |
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(BX_SER_THIS s[0].modem_status.delta_dsr << 1) |
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(BX_SER_THIS s[0].modem_status.ri_trailedge << 2) |
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(BX_SER_THIS s[0].modem_status.delta_dcd << 3) |
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(BX_SER_THIS s[0].modem_status.cts << 4) |
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(BX_SER_THIS s[0].modem_status.dsr << 5) |
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|
(BX_SER_THIS s[0].modem_status.ri << 6) |
|
|
(BX_SER_THIS s[0].modem_status.dcd << 7);
|
|
BX_SER_THIS s[0].modem_status.delta_cts = 0;
|
|
BX_SER_THIS s[0].modem_status.delta_dsr = 0;
|
|
BX_SER_THIS s[0].modem_status.ri_trailedge = 0;
|
|
BX_SER_THIS s[0].modem_status.delta_dcd = 0;
|
|
/* If there are no more ints pending, clear the irq */
|
|
if ((BX_SER_THIS s[0].rx_interrupt == 0) &&
|
|
(BX_SER_THIS s[0].tx_interrupt == 0) &&
|
|
(BX_SER_THIS s[0].ls_interrupt == 0)) {
|
|
DEV_pic_lower_irq(4);
|
|
}
|
|
BX_SER_THIS s[0].ms_interrupt = 0;
|
|
BX_SER_THIS s[0].ms_ipending = 0;
|
|
break;
|
|
|
|
case 0x03FF: /* scratch register */
|
|
val = BX_SER_THIS s[0].scratch;
|
|
break;
|
|
|
|
default:
|
|
val = 0; // keep compiler happy
|
|
BX_PANIC(("unsupported io read from address=0x%04x!",
|
|
(unsigned) address));
|
|
break;
|
|
}
|
|
|
|
BX_DEBUG(("val = 0x%02x", (unsigned) val));
|
|
|
|
return(val);
|
|
}
|
|
|
|
|
|
// static IO port write callback handler
|
|
// redirects to non-static class handler to avoid virtual functions
|
|
|
|
void
|
|
bx_serial_c::write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
|
|
{
|
|
#if !BX_USE_SER_SMF
|
|
bx_serial_c *class_ptr = (bx_serial_c *) this_ptr;
|
|
|
|
class_ptr->write(address, value, io_len);
|
|
}
|
|
|
|
void
|
|
bx_serial_c::write(Bit32u address, Bit32u value, unsigned io_len)
|
|
{
|
|
#else
|
|
UNUSED(this_ptr);
|
|
#endif // !BX_USE_SER_SMF
|
|
bx_bool prev_cts, prev_dsr, prev_ri, prev_dcd;
|
|
bx_bool gen_int = 0;
|
|
|
|
/* SERIAL PORT 1 */
|
|
|
|
BX_DEBUG(("write to address: 0x%04x = 0x%02x",
|
|
(unsigned) address, (unsigned) value));
|
|
|
|
switch (address) {
|
|
case 0x03F8: /* transmit buffer, or divisor latch LSB if DLAB set */
|
|
if (BX_SER_THIS s[0].line_cntl.dlab) {
|
|
BX_SER_THIS s[0].divisor_lsb = value;
|
|
|
|
if (value != 0) {
|
|
BX_SER_THIS s[0].baudrate = (int) (BX_PC_CLOCK_XTL /
|
|
(16 * ((BX_SER_THIS s[0].divisor_msb << 8) |
|
|
BX_SER_THIS s[0].divisor_lsb)));
|
|
#if USE_RAW_SERIAL
|
|
BX_SER_THIS raw->set_baudrate(BX_SER_THIS s[0].baudrate);
|
|
#endif // USE_RAW_SERIAL
|
|
}
|
|
} else {
|
|
if (BX_SER_THIS s[0].tx_empty) {
|
|
BX_SER_THIS s[0].tx_empty = 0;
|
|
BX_SER_THIS s[0].line_status.txtransm_empty = 0;
|
|
BX_SER_THIS s[0].line_status.txhold_empty = 0;
|
|
/* If there are no more ints pending, clear the irq */
|
|
if ((BX_SER_THIS s[0].rx_interrupt == 0) &&
|
|
(BX_SER_THIS s[0].ls_interrupt == 0) &&
|
|
(BX_SER_THIS s[0].ms_interrupt == 0)) {
|
|
DEV_pic_lower_irq(4);
|
|
}
|
|
BX_SER_THIS s[0].tx_interrupt = 0;
|
|
BX_SER_THIS s[0].tx_ipending = 0;
|
|
Bit8u bitmask = 0xff >> (3 - BX_SER_THIS s[0].line_cntl.wordlen_sel);
|
|
BX_SER_THIS s[0].txbuffer = value & bitmask;
|
|
bx_pc_system.activate_timer(BX_SER_THIS s[0].tx_timer_index,
|
|
(int) (1000000.0 / (BX_SER_THIS s[0].baudrate / 8)),
|
|
0); /* not continuous */
|
|
} else {
|
|
BX_ERROR(("write to tx hold register when not empty"));
|
|
}
|
|
}
|
|
break;
|
|
|
|
case 0x03F9: /* interrupt enable register, or div. latch MSB */
|
|
if (BX_SER_THIS s[0].line_cntl.dlab) {
|
|
BX_SER_THIS s[0].divisor_msb = value;
|
|
|
|
if (BX_SER_THIS s[0].divisor_msb != 0 && value != 0) {
|
|
BX_SER_THIS s[0].baudrate = (int) (BX_PC_CLOCK_XTL /
|
|
(16 * ((BX_SER_THIS s[0].divisor_msb << 8) |
|
|
BX_SER_THIS s[0].divisor_lsb)));
|
|
#if USE_RAW_SERIAL
|
|
BX_SER_THIS raw->set_baudrate(BX_SER_THIS s[0].baudrate);
|
|
#endif // USE_RAW_SERIAL
|
|
}
|
|
} else {
|
|
BX_SER_THIS s[0].int_enable.rxdata_enable = value & 0x01;
|
|
BX_SER_THIS s[0].int_enable.txhold_enable = (value & 0x02) >> 1;
|
|
BX_SER_THIS s[0].int_enable.rxlstat_enable = (value & 0x04) >> 2;
|
|
BX_SER_THIS s[0].int_enable.modstat_enable = (value & 0x08) >> 3;
|
|
if ((BX_SER_THIS s[0].ms_ipending == 1) &&
|
|
(BX_SER_THIS s[0].int_enable.modstat_enable == 1)) {
|
|
BX_SER_THIS s[0].ms_interrupt = 1;
|
|
BX_SER_THIS s[0].ms_ipending = 0;
|
|
gen_int = 1;
|
|
}
|
|
if ((BX_SER_THIS s[0].tx_ipending == 1) &&
|
|
(BX_SER_THIS s[0].int_enable.txhold_enable == 1)) {
|
|
BX_SER_THIS s[0].tx_interrupt = 1;
|
|
BX_SER_THIS s[0].tx_ipending = 0;
|
|
gen_int = 1;
|
|
}
|
|
if ((BX_SER_THIS s[0].rx_ipending == 1) &&
|
|
(BX_SER_THIS s[0].int_enable.rxdata_enable == 1)) {
|
|
BX_SER_THIS s[0].rx_interrupt = 1;
|
|
BX_SER_THIS s[0].rx_ipending = 0;
|
|
gen_int = 1;
|
|
if ((BX_SER_THIS s[0].ls_ipending == 1) &&
|
|
(BX_SER_THIS s[0].int_enable.rxlstat_enable == 1)) {
|
|
BX_SER_THIS s[0].ls_interrupt = 1;
|
|
BX_SER_THIS s[0].ls_ipending = 0;
|
|
gen_int = 1;
|
|
}
|
|
}
|
|
if (gen_int == 1)
|
|
DEV_pic_raise_irq(4);
|
|
}
|
|
break;
|
|
|
|
case 0x03FA: /* FIFO control register */
|
|
/* Ignore until FIFO mode is supported... */
|
|
break;
|
|
|
|
case 0x03FB: /* Line control register */
|
|
#if !USE_RAW_SERIAL
|
|
if ((value & 0x3) != 0x3) {
|
|
/* ignore this: this is set by FreeBSD when the console
|
|
code wants to set DLAB */
|
|
}
|
|
#endif // !USE_RAW_SERIAL
|
|
#if USE_RAW_SERIAL
|
|
if (BX_SER_THIS s[0].line_cntl.wordlen_sel != (value & 0x3)) {
|
|
BX_SER_THIS raw->set_data_bits((value & 0x3) + 5);
|
|
}
|
|
if (BX_SER_THIS s[0].line_cntl.stopbits != (value & 0x4) >> 2) {
|
|
BX_SER_THIS raw->set_stop_bits((value & 0x4 >> 2) ? 2 : 1);
|
|
}
|
|
if (BX_SER_THIS s[0].line_cntl.parity_enable != (value & 0x8) >> 3 ||
|
|
BX_SER_THIS s[0].line_cntl.evenparity_sel != (value & 0x10) >> 4 ||
|
|
BX_SER_THIS s[0].line_cntl.stick_parity != (value & 0x20) >> 5) {
|
|
if (((value & 0x20) >> 5) &&
|
|
((value & 0x8) >> 3))
|
|
BX_PANIC(("sticky parity set and parity enabled"));
|
|
BX_SER_THIS raw->set_parity_mode(((value & 0x8) >> 3),
|
|
((value & 0x10) >> 4) ? P_EVEN : P_ODD);
|
|
}
|
|
if (BX_SER_THIS s[0].line_cntl.break_cntl && !((value & 0x40) >> 6)) {
|
|
BX_SER_THIS raw->transmit(C_BREAK);
|
|
}
|
|
#endif // USE_RAW_SERIAL
|
|
|
|
BX_SER_THIS s[0].line_cntl.wordlen_sel = value & 0x3;
|
|
/* These are ignored, but set them up so they can be read back */
|
|
BX_SER_THIS s[0].line_cntl.stopbits = (value & 0x4) >> 2;
|
|
BX_SER_THIS s[0].line_cntl.parity_enable = (value & 0x8) >> 3;
|
|
BX_SER_THIS s[0].line_cntl.evenparity_sel = (value & 0x10) >> 4;
|
|
BX_SER_THIS s[0].line_cntl.stick_parity = (value & 0x20) >> 5;
|
|
BX_SER_THIS s[0].line_cntl.break_cntl = (value & 0x40) >> 6;
|
|
/* used when doing future writes */
|
|
if (BX_SER_THIS s[0].line_cntl.dlab &&
|
|
!((value & 0x80) >> 7)) {
|
|
// Start the receive polling process if not already started
|
|
// and there is a valid baudrate. Poll every 4 bit times
|
|
if (BX_SER_THIS s[0].rx_pollstate == BX_SER_RXIDLE &&
|
|
BX_SER_THIS s[0].baudrate != 0) {
|
|
BX_SER_THIS s[0].rx_pollstate = BX_SER_RXPOLL;
|
|
bx_pc_system.activate_timer(BX_SER_THIS s[0].rx_timer_index,
|
|
(int) (1000000.0 / (BX_SER_THIS s[0].baudrate / 4)),
|
|
0); /* not continuous */
|
|
}
|
|
BX_DEBUG(("baud rate set - %d", BX_SER_THIS s[0].baudrate));
|
|
}
|
|
BX_SER_THIS s[0].line_cntl.dlab = (value & 0x80) >> 7;
|
|
break;
|
|
|
|
case 0x03FC: /* MODEM control register */
|
|
if ((value & 0x01) == 0) {
|
|
#if USE_RAW_SERIAL
|
|
BX_SER_THIS raw->send_hangup();
|
|
#endif
|
|
}
|
|
|
|
BX_SER_THIS s[0].modem_cntl.dtr = value & 0x01;
|
|
BX_SER_THIS s[0].modem_cntl.rts = (value & 0x02) >> 1;
|
|
BX_SER_THIS s[0].modem_cntl.out1 = (value & 0x04) >> 2;
|
|
BX_SER_THIS s[0].modem_cntl.out2 = (value & 0x08) >> 3;
|
|
BX_SER_THIS s[0].modem_cntl.local_loopback = (value & 0x10) >> 4;
|
|
|
|
if (BX_SER_THIS s[0].modem_cntl.local_loopback) {
|
|
prev_cts = BX_SER_THIS s[0].modem_status.cts;
|
|
prev_dsr = BX_SER_THIS s[0].modem_status.dsr;
|
|
prev_ri = BX_SER_THIS s[0].modem_status.ri;
|
|
prev_dcd = BX_SER_THIS s[0].modem_status.dcd;
|
|
BX_SER_THIS s[0].modem_status.cts = BX_SER_THIS s[0].modem_cntl.rts;
|
|
BX_SER_THIS s[0].modem_status.dsr = BX_SER_THIS s[0].modem_cntl.dtr;
|
|
BX_SER_THIS s[0].modem_status.ri = BX_SER_THIS s[0].modem_cntl.out1;
|
|
BX_SER_THIS s[0].modem_status.dcd = BX_SER_THIS s[0].modem_cntl.out2;
|
|
if (BX_SER_THIS s[0].modem_status.cts != prev_cts) {
|
|
BX_SER_THIS s[0].modem_status.delta_cts = 1;
|
|
BX_SER_THIS s[0].ms_ipending = 1;
|
|
}
|
|
if (BX_SER_THIS s[0].modem_status.dsr != prev_dsr) {
|
|
BX_SER_THIS s[0].modem_status.delta_dsr = 1;
|
|
BX_SER_THIS s[0].ms_ipending = 1;
|
|
}
|
|
if (BX_SER_THIS s[0].modem_status.ri != prev_ri)
|
|
BX_SER_THIS s[0].ms_ipending = 1;
|
|
if ((BX_SER_THIS s[0].modem_status.ri == 0) && (prev_ri == 1))
|
|
BX_SER_THIS s[0].modem_status.ri_trailedge = 1;
|
|
if (BX_SER_THIS s[0].modem_status.dcd != prev_dcd) {
|
|
BX_SER_THIS s[0].modem_status.delta_dcd = 1;
|
|
BX_SER_THIS s[0].ms_ipending = 1;
|
|
}
|
|
if ((BX_SER_THIS s[0].ms_ipending == 1) &&
|
|
(BX_SER_THIS s[0].int_enable.modstat_enable == 1)) {
|
|
BX_SER_THIS s[0].ms_interrupt = 1;
|
|
BX_SER_THIS s[0].ms_ipending = 0;
|
|
}
|
|
} else {
|
|
/* set these to 0 for the time being */
|
|
BX_SER_THIS s[0].modem_status.cts = 0;
|
|
BX_SER_THIS s[0].modem_status.dsr = 0;
|
|
BX_SER_THIS s[0].modem_status.ri = 0;
|
|
BX_SER_THIS s[0].modem_status.dcd = 0;
|
|
}
|
|
break;
|
|
|
|
case 0x03FD: /* Line status register */
|
|
BX_ERROR(("write to line status register ignored"));
|
|
break;
|
|
|
|
case 0x03FE: /* MODEM status register */
|
|
BX_ERROR(("write to MODEM status register ignored"));
|
|
break;
|
|
|
|
case 0x03FF: /* scratch register */
|
|
BX_SER_THIS s[0].scratch = value;
|
|
break;
|
|
|
|
default:
|
|
BX_PANIC(("unsupported io write to address=0x%04x, value = 0x%02x!",
|
|
(unsigned) address, (unsigned) value));
|
|
break;
|
|
}
|
|
}
|
|
|
|
void
|
|
bx_serial_c::tx_timer_handler(void *this_ptr)
|
|
{
|
|
bx_serial_c *class_ptr = (bx_serial_c *) this_ptr;
|
|
|
|
class_ptr->tx_timer();
|
|
}
|
|
|
|
|
|
void
|
|
bx_serial_c::tx_timer(void)
|
|
{
|
|
int gen_int = 0;
|
|
|
|
BX_SER_THIS s[0].tx_empty = 1;
|
|
BX_SER_THIS s[0].line_status.txtransm_empty = 1;
|
|
BX_SER_THIS s[0].line_status.txhold_empty = 1;
|
|
if (BX_SER_THIS s[0].int_enable.txhold_enable) {
|
|
gen_int = 1;
|
|
BX_SER_THIS s[0].tx_interrupt = 1;
|
|
} else {
|
|
BX_SER_THIS s[0].tx_ipending = 1;
|
|
}
|
|
|
|
if (BX_SER_THIS s[0].modem_cntl.local_loopback) {
|
|
if (BX_SER_THIS s[0].rx_empty == 0)
|
|
BX_SER_THIS s[0].line_status.overrun_error = 1;
|
|
BX_SER_THIS s[0].rxbuffer = BX_SER_THIS s[0].txbuffer;
|
|
BX_SER_THIS s[0].line_status.rxdata_ready = 1;
|
|
BX_SER_THIS s[0].rx_empty = 0;
|
|
if (BX_SER_THIS s[0].modem_cntl.out2) {
|
|
if (BX_SER_THIS s[0].int_enable.rxdata_enable) {
|
|
gen_int = 1;
|
|
BX_SER_THIS s[0].rx_interrupt = 1;
|
|
} else {
|
|
BX_SER_THIS s[0].rx_ipending = 1;
|
|
}
|
|
if (BX_SER_THIS s[0].int_enable.rxlstat_enable) {
|
|
gen_int = 1;
|
|
BX_SER_THIS s[0].ls_interrupt = 1;
|
|
} else {
|
|
BX_SER_THIS s[0].ls_ipending = 1;
|
|
}
|
|
}
|
|
} else {
|
|
#if defined (USE_TTY_HACK)
|
|
tty(tty_id, 0, & BX_SER_THIS s[0].txbuffer);
|
|
#elif USE_RAW_SERIAL
|
|
if (!BX_SER_THIS raw->ready_transmit())
|
|
BX_PANIC(("Not ready to transmit"));
|
|
BX_SER_THIS raw->transmit(BX_SER_THIS s[0].txbuffer);
|
|
#endif
|
|
#if defined(SERIAL_ENABLE)
|
|
BX_DEBUG(("write: '%c'", BX_SER_THIS s[0].txbuffer));
|
|
if (tty_id >= 0) write(tty_id, (bx_ptr_t) & BX_SER_THIS s[0].txbuffer, 1);
|
|
#endif
|
|
}
|
|
|
|
if (gen_int) {
|
|
DEV_pic_raise_irq(4);
|
|
}
|
|
}
|
|
|
|
|
|
void
|
|
bx_serial_c::rx_timer_handler(void *this_ptr)
|
|
{
|
|
bx_serial_c *class_ptr = (bx_serial_c *) this_ptr;
|
|
|
|
class_ptr->rx_timer();
|
|
}
|
|
|
|
|
|
void
|
|
bx_serial_c::rx_timer(void)
|
|
{
|
|
#if BX_HAVE_SELECT
|
|
#ifndef __BEOS__
|
|
struct timeval tval;
|
|
fd_set fds;
|
|
#endif
|
|
#endif
|
|
int bdrate = BX_SER_THIS s[0].baudrate / 8;
|
|
unsigned char chbuf = 0;
|
|
|
|
#if BX_HAVE_SELECT
|
|
#ifndef __BEOS__
|
|
tval.tv_sec = 0;
|
|
tval.tv_usec = 0;
|
|
|
|
// MacOS: I'm not sure what to do with this, since I don't know
|
|
// what an fd_set is or what FD_SET() or select() do. They aren't
|
|
// declared in the CodeWarrior standard library headers. I'm just
|
|
// leaving it commented out for the moment.
|
|
|
|
FD_ZERO(&fds);
|
|
if (tty_id >= 0) FD_SET(tty_id, &fds);
|
|
|
|
if (BX_SER_THIS s[0].line_status.rxdata_ready == 0) {
|
|
#if defined (USE_TTY_HACK)
|
|
if (tty_prefetch_char(tty_id)) {
|
|
tty(tty_id, 1, &chbuf);
|
|
#elif USE_RAW_SERIAL
|
|
bx_bool rdy;
|
|
uint16 data;
|
|
if ((rdy = BX_SER_THIS raw->ready_receive())) {
|
|
data = BX_SER_THIS raw->receive();
|
|
if (data == C_BREAK) {
|
|
BX_DEBUG(("got BREAK"));
|
|
BX_SER_THIS s[0].line_status.break_int = 1;
|
|
rdy = 0;
|
|
}
|
|
}
|
|
if (rdy) {
|
|
chbuf = data;
|
|
#elif defined(SERIAL_ENABLE)
|
|
if ((tty_id >= 0) && (select(tty_id + 1, &fds, NULL, NULL, &tval) == 1)) {
|
|
(void) read(tty_id, &chbuf, 1);
|
|
BX_DEBUG(("read: '%c'",chbuf));
|
|
#else
|
|
if (0) {
|
|
#endif
|
|
if (!BX_SER_THIS s[0].modem_cntl.local_loopback) {
|
|
|
|
BX_SER_THIS s[0].rxbuffer = chbuf;
|
|
BX_SER_THIS s[0].line_status.rxdata_ready = 1;
|
|
BX_SER_THIS s[0].rx_empty = 0;
|
|
if (BX_SER_THIS s[0].int_enable.rxdata_enable) {
|
|
BX_SER_THIS s[0].rx_interrupt = 1;
|
|
DEV_pic_raise_irq(4);
|
|
} else {
|
|
BX_SER_THIS s[0].rx_ipending = 1;
|
|
}
|
|
}
|
|
} else {
|
|
bdrate = (int) (1000000.0 / 100000); // Poll frequency is 100ms
|
|
}
|
|
} else {
|
|
// Poll at 4x baud rate to see if the next-char can
|
|
// be read
|
|
bdrate *= 4;
|
|
}
|
|
#endif
|
|
#endif
|
|
|
|
bx_pc_system.activate_timer(BX_SER_THIS s[0].rx_timer_index,
|
|
(int) (1000000.0 / bdrate),
|
|
0); /* not continuous */
|
|
}
|