91fd4b3745
user can turn on/off use of native host specific inline asm statements. By default, this option is enabled, so you only need it to disable inline asms in your compile for now. Currently only on x86+GCC environments, will inline asm() statements be used. Eventually, other platforms could specify some asm()s; probably for endian issues such as byte-swapping and unaligned memory accesses. On x86, there are some inline asm()s which do the arithmetic EFLAGS processing so that the lazy flags handling is somewhat bypassed. Eventually, I'll add more, at least for the more common instructions. This adds a little extra performance.
552 lines
11 KiB
C++
552 lines
11 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: logical8.cc,v 1.13 2002-09-23 17:59:18 kevinlawton Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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void
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BX_CPU_C::XOR_EbGb(bxInstruction_c *i)
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{
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Bit8u op2, op1, result;
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/* op2 is a register, op2_addr is an index of a register */
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op2 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
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/* op1 is a register or memory reference */
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if (i->modC0()) {
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op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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/* pointer, segment address pair */
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
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}
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result = op1 ^ op2;
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/* now write result back to destination */
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if (i->modC0()) {
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result);
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}
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else {
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Write_RMW_virtual_byte(result);
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}
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SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_XOR8);
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}
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void
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BX_CPU_C::XOR_GbEb(bxInstruction_c *i)
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{
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Bit8u op1, op2, result;
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op1 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
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/* op2 is a register or memory reference */
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if (i->modC0()) {
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op2 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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/* pointer, segment address pair */
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read_virtual_byte(i->seg(), RMAddr(i), &op2);
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}
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result = op1 ^ op2;
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/* now write result back to destination, which is a register */
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BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), result);
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SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_XOR8);
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}
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void
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BX_CPU_C::XOR_ALIb(bxInstruction_c *i)
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{
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Bit8u op1, op2, sum;
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op1 = AL;
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op2 = i->Ib();
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sum = op1 ^ op2;
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/* now write sum back to destination, which is a register */
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AL = sum;
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SET_FLAGS_OSZAPC_8(op1, op2, sum, BX_INSTR_XOR8);
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}
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void
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BX_CPU_C::XOR_EbIb(bxInstruction_c *i)
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{
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Bit8u op2, op1, result;
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op2 = i->Ib();
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/* op1 is a register or memory reference */
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if (i->modC0()) {
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op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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/* pointer, segment address pair */
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
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}
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result = op1 ^ op2;
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/* now write result back to destination */
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if (i->modC0()) {
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result);
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}
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else {
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Write_RMW_virtual_byte(result);
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}
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SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_XOR8);
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}
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void
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BX_CPU_C::OR_EbIb(bxInstruction_c *i)
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{
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Bit8u op2, op1, result;
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op2 = i->Ib();
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/* op1 is a register or memory reference */
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if (i->modC0()) {
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op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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/* pointer, segment address pair */
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
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}
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result = op1 | op2;
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/* now write result back to destination */
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if (i->modC0()) {
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result);
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}
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else {
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Write_RMW_virtual_byte(result);
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}
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SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_OR8);
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}
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void
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BX_CPU_C::NOT_Eb(bxInstruction_c *i)
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{
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Bit8u op1_8, result_8;
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/* op1 is a register or memory reference */
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if (i->modC0()) {
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op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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/* pointer, segment address pair */
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1_8);
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}
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result_8 = ~op1_8;
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/* now write result back to destination */
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if (i->modC0()) {
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
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}
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else {
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Write_RMW_virtual_byte(result_8);
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}
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}
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void
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BX_CPU_C::OR_EbGb(bxInstruction_c *i)
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{
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Bit8u op2, op1, result;
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/* op2 is a register, op2_addr is an index of a register */
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op2 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
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/* op1 is a register or memory reference */
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if (i->modC0()) {
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op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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/* pointer, segment address pair */
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
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}
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result = op1 | op2;
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/* now write result back to destination */
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if (i->modC0()) {
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result);
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}
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else {
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Write_RMW_virtual_byte(result);
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}
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SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_OR8);
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}
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void
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BX_CPU_C::OR_GbEb(bxInstruction_c *i)
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{
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Bit8u op1, op2, result;
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op1 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
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/* op2 is a register or memory reference */
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if (i->modC0()) {
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op2 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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/* pointer, segment address pair */
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read_virtual_byte(i->seg(), RMAddr(i), &op2);
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}
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result = op1 | op2;
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/* now write result back to destination, which is a register */
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BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), result);
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SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_OR8);
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}
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void
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BX_CPU_C::OR_ALIb(bxInstruction_c *i)
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{
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Bit8u op1, op2, sum;
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op1 = AL;
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op2 = i->Ib();
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sum = op1 | op2;
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/* now write sum back to destination, which is a register */
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AL = sum;
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SET_FLAGS_OSZAPC_8(op1, op2, sum, BX_INSTR_OR8);
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}
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void
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BX_CPU_C::AND_EbGb(bxInstruction_c *i)
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{
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Bit8u op2, op1, result;
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op2 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
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if (i->modC0()) {
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op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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/* pointer, segment address pair */
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
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}
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result = op1 & op2;
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if (i->modC0()) {
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result);
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}
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else {
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Write_RMW_virtual_byte(result);
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}
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#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
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Bit32u flags32;
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asm (
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"andb %3, %1\n\t"
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"pushfl \n\t"
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"popl %0"
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: "=g" (flags32), "=q" (result)
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: "1" (op1), "mq" (op2)
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: "cc"
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);
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BX_CPU_THIS_PTR eflags.val32 =
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(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
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(flags32 & EFlagsOSZAPCMask);
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BX_CPU_THIS_PTR lf_flags_status = 0;
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#else
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SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8);
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#endif
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}
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void
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BX_CPU_C::AND_GbEb(bxInstruction_c *i)
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{
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Bit8u op1, op2, result;
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op1 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
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if (i->modC0()) {
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op2 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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read_virtual_byte(i->seg(), RMAddr(i), &op2);
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}
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result = op1 & op2;
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BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), result);
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#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
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Bit32u flags32;
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asm (
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"andb %3, %1\n\t"
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"pushfl \n\t"
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"popl %0"
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: "=g" (flags32), "=q" (result)
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: "1" (op1), "mq" (op2)
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: "cc"
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);
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BX_CPU_THIS_PTR eflags.val32 =
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(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
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(flags32 & EFlagsOSZAPCMask);
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BX_CPU_THIS_PTR lf_flags_status = 0;
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#else
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SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8);
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#endif
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}
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void
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BX_CPU_C::AND_ALIb(bxInstruction_c *i)
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{
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Bit8u op1, op2, result;
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op1 = AL;
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op2 = i->Ib();
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result = op1 & op2;
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AL = result;
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#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
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Bit32u flags32;
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asm (
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"andb %3, %1\n\t"
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"pushfl \n\t"
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"popl %0"
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: "=g" (flags32), "=q" (result)
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: "1" (op1), "mq" (op2)
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: "cc"
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);
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BX_CPU_THIS_PTR eflags.val32 =
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(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
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(flags32 & EFlagsOSZAPCMask);
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BX_CPU_THIS_PTR lf_flags_status = 0;
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#else
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SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8);
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#endif
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}
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void
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BX_CPU_C::AND_EbIb(bxInstruction_c *i)
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{
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Bit8u op2, op1, result;
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op2 = i->Ib();
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if (i->modC0()) {
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op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
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}
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result = op1 & op2;
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if (i->modC0()) {
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result);
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}
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else {
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Write_RMW_virtual_byte(result);
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}
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#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
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Bit32u flags32;
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asm (
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"andb %3, %1\n\t"
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"pushfl \n\t"
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"popl %0"
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: "=g" (flags32), "=q" (result)
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: "1" (op1), "mq" (op2)
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: "cc"
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);
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BX_CPU_THIS_PTR eflags.val32 =
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(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
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(flags32 & EFlagsOSZAPCMask);
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BX_CPU_THIS_PTR lf_flags_status = 0;
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#else
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SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8);
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#endif
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}
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void
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BX_CPU_C::TEST_EbGb(bxInstruction_c *i)
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{
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Bit8u op2, op1;
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/* op2 is a register, op2_addr is an index of a register */
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op2 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
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/* op1 is a register or memory reference */
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if (i->modC0()) {
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op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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/* pointer, segment address pair */
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read_virtual_byte(i->seg(), RMAddr(i), &op1);
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}
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#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
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Bit32u flags32;
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asm (
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"testb %2, %1\n\t"
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"pushfl \n\t"
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"popl %0"
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: "=g" (flags32)
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: "q" (op1), "mq" (op2)
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: "cc"
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);
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BX_CPU_THIS_PTR eflags.val32 =
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(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
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(flags32 & EFlagsOSZAPCMask);
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BX_CPU_THIS_PTR lf_flags_status = 0;
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#else
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Bit8u result;
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result = op1 & op2;
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SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_TEST8);
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#endif
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}
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void
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BX_CPU_C::TEST_ALIb(bxInstruction_c *i)
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{
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Bit8u op2, op1;
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/* op1 is the AL register */
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op1 = AL;
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/* op2 is imm8 */
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op2 = i->Ib();
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#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
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Bit32u flags32;
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asm (
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"testb %2, %1\n\t"
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"pushfl \n\t"
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"popl %0"
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: "=g" (flags32)
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: "q" (op1), "mq" (op2)
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: "cc"
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);
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BX_CPU_THIS_PTR eflags.val32 =
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(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
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(flags32 & EFlagsOSZAPCMask);
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BX_CPU_THIS_PTR lf_flags_status = 0;
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#else
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Bit8u result;
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result = op1 & op2;
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SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_TEST8);
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#endif
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}
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void
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BX_CPU_C::TEST_EbIb(bxInstruction_c *i)
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{
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Bit8u op2, op1;
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op2 = i->Ib();
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/* op1 is a register or memory reference */
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if (i->modC0()) {
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op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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/* pointer, segment address pair */
|
|
read_virtual_byte(i->seg(), RMAddr(i), &op1);
|
|
}
|
|
|
|
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
|
|
Bit32u flags32;
|
|
asm (
|
|
"testb %2, %1\n\t"
|
|
"pushfl \n\t"
|
|
"popl %0"
|
|
: "=g" (flags32)
|
|
: "q" (op1), "mq" (op2)
|
|
: "cc"
|
|
);
|
|
BX_CPU_THIS_PTR eflags.val32 =
|
|
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
|
|
(flags32 & EFlagsOSZAPCMask);
|
|
BX_CPU_THIS_PTR lf_flags_status = 0;
|
|
#else
|
|
Bit8u result;
|
|
result = op1 & op2;
|
|
|
|
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_TEST8);
|
|
#endif
|
|
}
|