f8c3968d42
- Fixed critical bug in CPU code added with one of the prev commits
- Disasm support for SSE4
- Rename PNI->SSE3 everywhere in the code
- Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
- Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
- Fixed ENTER and LEAVE instructions in x86-64 mode
- Added ability to turn ON instruction trace, only GUI support is missed.
Instruction trace could be enabled if Bochs was compiled with disasm
- More changes Bit32u -> bx_phy_address
- Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
- Small code cleanup
- Update CHANGES and user docs
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| .. | ||
| control_w.h | ||
| f2xm1.cc | ||
| ferr.cc | ||
| fpatan.cc | ||
| fprem.cc | ||
| fpu_arith.cc | ||
| fpu_compare.cc | ||
| fpu_const.cc | ||
| fpu_constant.h | ||
| fpu_load_store.cc | ||
| fpu_misc.cc | ||
| fpu_tags.cc | ||
| fpu_trans.cc | ||
| fpu.cc | ||
| fsincos.cc | ||
| fyl2x.cc | ||
| Makefile.in | ||
| poly.cc | ||
| softfloat-macros.h | ||
| softfloat-round-pack.cc | ||
| softfloat-round-pack.h | ||
| softfloat-specialize.cc | ||
| softfloat-specialize.h | ||
| softfloat.cc | ||
| softfloat.h | ||
| softfloatx80.cc | ||
| softfloatx80.h | ||
| status_w.h | ||
| tag_w.h | ||
| todo | ||