Bochs/bochs/cpu/cpudb/intel
2019-10-26 20:09:30 +00:00
..
atom_n270.cc cleanup of warning messages from cpuid code 2017-03-26 20:12:14 +00:00
atom_n270.h
atom_n270.txt
broadwell_ult.cc added Skylake-X model to CPUDB -> with EVEX and AVX512 support 2017-08-09 20:36:17 +00:00
broadwell_ult.h
broadwell_ult.txt
core2_penryn_t9600.cc cleanup of warning messages from cpuid code 2017-03-26 20:12:14 +00:00
core2_penryn_t9600.h
core2_penryn_t9600.txt
core_duo_t2400_yonah.cc cleanup of warning messages from cpuid code 2017-03-26 20:12:14 +00:00
core_duo_t2400_yonah.h
core_duo_t2400_yonah.txt
corei3_cnl.cc fixes for CNL CPUID 2018-10-26 19:46:56 +00:00
corei3_cnl.h add Intel Cannonlake CPU model to CPUDB featuring AVF512FMA52 and SHA instructions 2018-10-26 09:23:58 +00:00
corei3_cnl.txt add Intel Cannonlake CPU model to CPUDB featuring AVF512FMA52 and SHA instructions 2018-10-26 09:23:58 +00:00
corei5_arrandale_m520.cc cleanup of warning messages from cpuid code 2017-03-26 20:12:14 +00:00
corei5_arrandale_m520.h
corei5_arrandale_m520.txt
corei5_lynnfield_750.cc cleanup of warning messages from cpuid code 2017-03-26 20:12:14 +00:00
corei5_lynnfield_750.h
corei5_lynnfield_750.txt
corei7_haswell_4770.cc cleanup of warning messages from cpuid code 2017-03-26 20:12:14 +00:00
corei7_haswell_4770.h
corei7_haswell_4770.txt
corei7_icelake-u.cc implemented SCA (Side-Channel-Attack) Prevention reporting and corresponding MSR registers, enabled for Icelake-U CPU definition 2019-10-26 20:09:30 +00:00
corei7_icelake-u.h add Icelake-U model to CPUDB database. TODO: verify its VMX features 2019-09-24 20:26:14 +00:00
corei7_icelake-u.txt add Icelake-U model to CPUDB database. TODO: verify its VMX features 2019-09-24 20:26:14 +00:00
corei7_ivy_bridge_3770K.cc cleanup of warning messages from cpuid code 2017-03-26 20:12:14 +00:00
corei7_ivy_bridge_3770K.h
corei7_ivy_bridge_3770K.txt
corei7_sandy_bridge_2600K.cc cleanup of warning messages from cpuid code 2017-03-26 20:12:14 +00:00
corei7_sandy_bridge_2600K.h
corei7_sandy_bridge_2600K.txt
corei7_skylake-x.cc Enable PML VMX feature in Skylake-X 2018-10-26 19:54:22 +00:00
corei7_skylake-x.h skylake CPUID should compile also with no EVEX 2017-08-09 21:04:15 +00:00
corei7_skylake-x.txt added Skylake-X model to CPUDB -> with EVEX and AVX512 support 2017-08-09 20:36:17 +00:00
p2_klamath.cc cleanup of warning messages from cpuid code 2017-03-26 20:12:14 +00:00
p2_klamath.h
p2_klamath.txt
p3_katmai.cc cleanup of warning messages from cpuid code 2017-03-26 20:12:14 +00:00
p3_katmai.h
p3_katmai.txt
p4_prescott_celeron_336.cc cleanup of warning messages from cpuid code 2017-03-26 20:12:14 +00:00
p4_prescott_celeron_336.h
p4_prescott_celeron_336.txt
p4_willamette.cc cleanup of warning messages from cpuid code 2017-03-26 20:12:14 +00:00
p4_willamette.h
p4_willamette.txt
pentium_mmx.cc cleanup of warning messages from cpuid code 2017-03-26 20:12:14 +00:00
pentium_mmx.h
pentium_mmx.txt
pentium.cc cleanup of warning messages from cpuid code 2017-03-26 20:12:14 +00:00
pentium.h
pentium.txt