a6fef54678
- for bochs files with other header, replaced with current mandrake header
251 lines
6.1 KiB
C++
251 lines
6.1 KiB
C++
// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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//
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// This is the glue logic needed to connect the wm-FPU-emu
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// FPU emulator written by Bill Metzenthen to bochs.
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//
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#include "bochs.h"
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extern "C" {
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#include "fpu_emu.h"
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#include "linux/signal.h"
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}
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// Use this to hold a pointer to the instruction since
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// we can't pass this to the FPU emulation routines, which
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// will ultimately call routines here.
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static BxInstruction_t *fpu_iptr = NULL;
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i387_t i387;
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extern "C" void
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math_emulate2(fpu_addr_modes addr_modes,
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u_char FPU_modrm,
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u_char byte1,
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void *data_address,
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struct address data_sel_off,
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struct address entry_sel_off);
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extern "C" void printfp(char *s, FPU_REG *r);
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// This is called by bochs upon reset
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void
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BX_CPU_C::fpu_init(void)
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{
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finit();
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}
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void
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BX_CPU_C::fpu_execute(BxInstruction_t *i)
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{
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fpu_addr_modes addr_modes;
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void *data_address;
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struct address data_sel_off;
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struct address entry_sel_off;
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Boolean is_32;
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fpu_iptr = i;
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#if 0
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addr_modes.default_mode = VM86;
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addr_modes.default_mode = 0; // FPU_CS == __USER_CS && FPU_DS == __USER_DS
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addr_modes.default_mode = SEG32;
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addr_modes.default_mode = PM16;
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#endif
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if (protected_mode()) {
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addr_modes.default_mode = SEG32;
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}
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else if (v8086_mode()) {
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addr_modes.default_mode = VM86;
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}
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else {
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// real mode, use vm86 for now
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addr_modes.default_mode = VM86;
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}
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// Mark if instruction used opsize or addrsize prefixes
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// Actually, addr_modes.override.address_size is not used,
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// could delete that code.
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is_32 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b;
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if (i->as_32 == is_32)
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addr_modes.override.address_size = 0;
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else
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addr_modes.override.address_size = ADDR_SIZE_PREFIX;
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if (i->os_32 == is_32)
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addr_modes.override.operand_size = 0;
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else
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addr_modes.override.operand_size = OP_SIZE_PREFIX;
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// For now set access_limit to max. It seems to be
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// a number from 0..255 denoting how many bytes the
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// current instruction can access according to its
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// memory operand. 255 means >= 255.
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access_limit = 0xff;
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// fill in orig eip here in offset
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// fill in CS in selector
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entry_sel_off.offset = BX_CPU_THIS_PTR prev_eip;
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entry_sel_off.selector =
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
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// should set these fields to 0 if mem operand not used
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data_address = (void *) i->rm_addr;
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data_sel_off.offset = i->rm_addr;
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data_sel_off.selector = BX_CPU_THIS_PTR sregs[i->seg].selector.value;
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math_emulate2(addr_modes, i->modrm, i->b1, data_address,
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data_sel_off, entry_sel_off);
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}
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unsigned
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fpu_get_ds(void)
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{
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return(BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value);
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}
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void
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fpu_set_ax(unsigned short val16)
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{
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AX = val16;
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//fprintf(stderr, "fpu_set_ax(0x%04x)\n", (unsigned) val16);
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}
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void
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fpu_verify_area(unsigned what, void *ptr, unsigned n)
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{
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bx_segment_reg_t *seg;
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seg = &BX_CPU_THIS_PTR sregs[fpu_iptr->seg];
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if (what == VERIFY_READ) {
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BX_CPU.read_virtual_checks(seg, PTR2INT(ptr), n);
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}
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else { // VERIFY_WRITE
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BX_CPU.write_virtual_checks(seg, PTR2INT(ptr), n);
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}
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//fprintf(stderr, "verify_area: 0x%x\n", PTR2INT(ptr));
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}
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void
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FPU_printall(void)
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{
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bx_panic("FPU_printall\n");
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}
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unsigned
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fpu_get_user(void *ptr, unsigned len)
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{
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Bit32u val32;
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Bit16u val16;
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Bit8u val8;
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switch (len) {
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case 1:
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BX_CPU.read_virtual_byte(fpu_iptr->seg, PTR2INT(ptr), &val8);
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val32 = val8;
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break;
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case 2:
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BX_CPU.read_virtual_word(fpu_iptr->seg, PTR2INT(ptr), &val16);
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val32 = val16;
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break;
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case 4:
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BX_CPU.read_virtual_dword(fpu_iptr->seg, PTR2INT(ptr), &val32);
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break;
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default:
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bx_panic("fpu_get_user: len=%u\n", len);
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}
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return(val32);
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}
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void
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fpu_put_user(unsigned val, void *ptr, unsigned len)
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{
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Bit32u val32;
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Bit16u val16;
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Bit8u val8;
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switch (len) {
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case 1:
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val8 = val;
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BX_CPU.write_virtual_byte(fpu_iptr->seg, PTR2INT(ptr), &val8);
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break;
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case 2:
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val16 = val;
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BX_CPU.write_virtual_word(fpu_iptr->seg, PTR2INT(ptr), &val16);
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break;
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case 4:
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val32 = val;
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BX_CPU.write_virtual_dword(fpu_iptr->seg, PTR2INT(ptr), &val32);
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break;
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default:
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bx_panic("fpu_put_user: len=%u\n", len);
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}
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}
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void
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math_abort(struct info *info, unsigned int signal)
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{
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UNUSED(info); // info is always passed NULL
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#if BX_CPU_LEVEL >= 4
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// values of signal:
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// SIGILL : opcodes which are illegal
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// SIGFPE : unmasked FP exception before WAIT or non-control instruction
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// SIGSEGV : access data beyond segment violation
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switch (signal) {
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case SIGFPE:
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if (BX_CPU.cr0.ne == 0) {
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// MSDOS compatibility external interrupt (IRQ13)
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bx_panic("math_abort: MSDOS compatibility not supported yet\n");
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}
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BX_CPU.exception(BX_MF_EXCEPTION, 0, 0);
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// execution does not reach here
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case SIGILL:
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bx_panic("math_abort: SIGILL not implemented yet.\n");
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break;
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case SIGSEGV:
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bx_panic("math_abort: SIGSEGV not implemented yet.\n");
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break;
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}
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#else
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UNUSED(signal);
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bx_panic("math_abort: CPU<4 not supported yet\n");
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#endif
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}
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int
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printk(const char * fmt, ...)
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{
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bx_printf("printk not complete: %s\n", fmt);
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return(0); // for now
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}
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