166 lines
4.1 KiB
C++
166 lines
4.1 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2003-2017 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu/cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_FPU
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#include "softfloatx80.h"
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/* D9 C8 */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FXCH_STi(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR prepareFPU(i);
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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int st0_tag = BX_CPU_THIS_PTR the_i387.FPU_gettagi(0);
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int sti_tag = BX_CPU_THIS_PTR the_i387.FPU_gettagi(i->src());
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floatx80 st0_reg = BX_READ_FPU_REG(0);
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floatx80 sti_reg = BX_READ_FPU_REG(i->src());
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clear_C1();
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if (st0_tag == FPU_Tag_Empty || sti_tag == FPU_Tag_Empty)
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{
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FPU_exception(i, FPU_EX_Stack_Underflow);
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if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
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{
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/* Masked response */
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if (st0_tag == FPU_Tag_Empty)
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st0_reg = floatx80_default_nan;
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if (sti_tag == FPU_Tag_Empty)
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sti_reg = floatx80_default_nan;
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}
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else {
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BX_NEXT_INSTR(i);
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}
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}
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BX_WRITE_FPU_REG(st0_reg, i->src());
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BX_WRITE_FPU_REG(sti_reg, 0);
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BX_NEXT_INSTR(i);
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}
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/* D9 E0 */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FCHS(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR prepareFPU(i);
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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if (IS_TAG_EMPTY(0)) {
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FPU_stack_underflow(i, 0);
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}
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else {
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clear_C1();
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floatx80 st0_reg = BX_READ_FPU_REG(0);
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BX_WRITE_FPU_REG(floatx80_chs(st0_reg), 0);
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}
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BX_NEXT_INSTR(i);
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}
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/* D9 E1 */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FABS(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR prepareFPU(i);
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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if (IS_TAG_EMPTY(0)) {
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FPU_stack_underflow(i, 0);
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}
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else {
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clear_C1();
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floatx80 st0_reg = BX_READ_FPU_REG(0);
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BX_WRITE_FPU_REG(floatx80_abs(st0_reg), 0);
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}
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BX_NEXT_INSTR(i);
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}
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/* D9 F6 */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FDECSTP(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR prepareFPU(i);
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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BX_CPU_THIS_PTR the_i387.tos = (BX_CPU_THIS_PTR the_i387.tos-1) & 7;
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BX_NEXT_INSTR(i);
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}
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/* D9 F7 */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FINCSTP(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR prepareFPU(i);
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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BX_CPU_THIS_PTR the_i387.tos = (BX_CPU_THIS_PTR the_i387.tos+1) & 7;
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BX_NEXT_INSTR(i);
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}
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/* DD C0 */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FFREE_STi(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR prepareFPU(i);
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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BX_CPU_THIS_PTR the_i387.FPU_settagi(FPU_Tag_Empty, i->dst());
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BX_NEXT_INSTR(i);
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}
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/*
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* Free the st(0) register and pop it from the FPU stack.
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* "Undocumented" by Intel & AMD but mentioned in AMDs Athlon Docs.
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*/
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/* DF C0 */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FFREEP_STi(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR prepareFPU(i);
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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BX_CPU_THIS_PTR the_i387.FPU_settagi(FPU_Tag_Empty, i->dst());
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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BX_NEXT_INSTR(i);
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}
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#endif
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