bb7a648d91
------------ Implemented SVN nested paging support - the Virtual Box boots perfectly with Nested Paging guest ! A lot of code duplication was added for now - major cleanup will follow later. ! Added AMD Phenom X3 8650 (Toliman) configuration to the CPUDB - this configuration has Nested Paging enabled. Some CPUID modules rework done to enable Toliman configuration. Ckean up 'executable' attribute from all CPU source files.
181 lines
4.4 KiB
C++
181 lines
4.4 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2011 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_X86_64 && BX_SUPPORT_AVX
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BEXTR_GqEqIdR(bxInstruction_c *i)
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{
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Bit16u control = (Bit16u) i->Id();
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unsigned start = control & 0xff;
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unsigned len = control >> 8;
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Bit64u op1_64 = 0;
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if (start < 64 && len > 0) {
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op1_64 = BX_READ_64BIT_REG(i->rm());
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op1_64 >>= start;
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if (len < 64) {
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Bit64u extract_mask = (BX_CONST64(1) << len) - 1;
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op1_64 &= extract_mask;
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}
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}
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SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
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BX_WRITE_64BIT_REG(i->nnn(), op1_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLCFILL_BqEqR(bxInstruction_c *i)
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{
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Bit64u op_64 = BX_READ_64BIT_REG(i->rm());
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Bit64u result_64 = (op_64 + 1) & op_64;
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SET_FLAGS_OSZAPC_LOGIC_64(result_64);
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set_CF((op_64 + 1) == 0);
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BX_WRITE_64BIT_REG(i->vvv(), result_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLCI_BqEqR(bxInstruction_c *i)
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{
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Bit64u op_64 = BX_READ_64BIT_REG(i->rm());
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Bit64u result_64 = ~(op_64 + 1) | op_64;
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SET_FLAGS_OSZAPC_LOGIC_64(result_64);
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set_CF((op_64 + 1) == 0);
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BX_WRITE_64BIT_REG(i->vvv(), result_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLCIC_BqEqR(bxInstruction_c *i)
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{
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Bit64u op_64 = BX_READ_64BIT_REG(i->rm());
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Bit64u result_64 = (op_64 + 1) & ~op_64;
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SET_FLAGS_OSZAPC_LOGIC_64(result_64);
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set_CF((op_64 + 1) == 0);
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BX_WRITE_64BIT_REG(i->vvv(), result_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLCMSK_BqEqR(bxInstruction_c *i)
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{
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Bit64u op_64 = BX_READ_64BIT_REG(i->rm());
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Bit64u result_64 = (op_64 + 1) ^ op_64;
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SET_FLAGS_OSZAPC_LOGIC_64(result_64);
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set_CF((op_64 + 1) == 0);
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BX_WRITE_64BIT_REG(i->vvv(), result_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLCS_BqEqR(bxInstruction_c *i)
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{
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Bit64u op_64 = BX_READ_64BIT_REG(i->rm());
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Bit64u result_64 = (op_64 + 1) | op_64;
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SET_FLAGS_OSZAPC_LOGIC_64(result_64);
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set_CF((op_64 + 1) == 0);
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BX_WRITE_64BIT_REG(i->vvv(), result_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLSFILL_BqEqR(bxInstruction_c *i)
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{
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Bit64u op_64 = BX_READ_64BIT_REG(i->rm());
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Bit64u result_64 = (op_64 - 1) | op_64;
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SET_FLAGS_OSZAPC_LOGIC_64(result_64);
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set_CF(op_64 == 0);
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BX_WRITE_64BIT_REG(i->vvv(), result_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLSIC_BqEqR(bxInstruction_c *i)
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{
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Bit64u op_64 = BX_READ_64BIT_REG(i->rm());
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Bit64u result_64 = (op_64 - 1) | ~op_64;
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SET_FLAGS_OSZAPC_LOGIC_64(result_64);
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set_CF(op_64 == 0);
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BX_WRITE_64BIT_REG(i->vvv(), result_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::T1MSKC_BqEqR(bxInstruction_c *i)
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{
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Bit64u op_64 = BX_READ_64BIT_REG(i->rm());
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Bit64u result_64 = (op_64 + 1) | ~op_64;
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SET_FLAGS_OSZAPC_LOGIC_64(result_64);
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set_CF((op_64 + 1) == 0);
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BX_WRITE_64BIT_REG(i->vvv(), result_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TZMSK_BqEqR(bxInstruction_c *i)
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{
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Bit64u op_64 = BX_READ_64BIT_REG(i->rm());
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Bit64u result_64 = (op_64 - 1) & ~op_64;
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SET_FLAGS_OSZAPC_LOGIC_64(result_64);
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set_CF(op_64 == 0);
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BX_WRITE_64BIT_REG(i->vvv(), result_64);
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BX_NEXT_INSTR(i);
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}
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#endif
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