945 lines
29 KiB
C++
945 lines
29 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2011-2012 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_AVX
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extern void mxcsr_to_softfloat_status_word(float_status_t &status, bx_mxcsr_t mxcsr);
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#include "simd_int.h"
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#include "simd_compare.h"
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typedef void (*simd_compare_method)(BxPackedXmmRegister *op1, const BxPackedXmmRegister *op2);
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// comparison predicate for PCOMB
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static simd_compare_method compare8[8] = {
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xmm_pcmpltb,
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xmm_pcmpleb,
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xmm_pcmpgtb,
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xmm_pcmpgeb,
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xmm_pcmpeqb,
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xmm_pcmpneb,
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xmm_pcmpfalse,
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xmm_pcmptrue
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};
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// comparison predicate for PCOMUB
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static simd_compare_method compare8u[8] = {
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xmm_pcmpltub,
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xmm_pcmpleub,
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xmm_pcmpgtub,
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xmm_pcmpgeub,
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xmm_pcmpeqb,
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xmm_pcmpneb,
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xmm_pcmpfalse,
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xmm_pcmptrue
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};
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// comparison predicate for PCOMW
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static simd_compare_method compare16[8] = {
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xmm_pcmpltw,
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xmm_pcmplew,
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xmm_pcmpgtw,
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xmm_pcmpgew,
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xmm_pcmpeqw,
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xmm_pcmpnew,
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xmm_pcmpfalse,
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xmm_pcmptrue
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};
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// comparison predicate for PCOMUW
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static simd_compare_method compare16u[8] = {
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xmm_pcmpltuw,
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xmm_pcmpleuw,
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xmm_pcmpgtuw,
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xmm_pcmpgeuw,
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xmm_pcmpeqw,
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xmm_pcmpnew,
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xmm_pcmpfalse,
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xmm_pcmptrue
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};
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// comparison predicate for PCOMD
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static simd_compare_method compare32[8] = {
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xmm_pcmpltd,
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xmm_pcmpled,
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xmm_pcmpgtd,
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xmm_pcmpged,
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xmm_pcmpeqd,
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xmm_pcmpned,
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xmm_pcmpfalse,
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xmm_pcmptrue
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};
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// comparison predicate for PCOMUD
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static simd_compare_method compare32u[8] = {
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xmm_pcmpltud,
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xmm_pcmpleud,
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xmm_pcmpgtud,
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xmm_pcmpgeud,
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xmm_pcmpeqd,
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xmm_pcmpned,
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xmm_pcmpfalse,
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xmm_pcmptrue
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};
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// comparison predicate for PCOMQ
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static simd_compare_method compare64[8] = {
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xmm_pcmpltq,
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xmm_pcmpleq,
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xmm_pcmpgtq,
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xmm_pcmpgeq,
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xmm_pcmpeqq,
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xmm_pcmpneq,
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xmm_pcmpfalse,
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xmm_pcmptrue
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};
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// comparison predicate for PCOMUQ
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static simd_compare_method compare64u[8] = {
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xmm_pcmpltuq,
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xmm_pcmpleuq,
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xmm_pcmpgtuq,
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xmm_pcmpgeuq,
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xmm_pcmpeqq,
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xmm_pcmpneq,
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xmm_pcmpfalse,
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xmm_pcmptrue
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};
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typedef Bit8u (*vpperm_operation)(Bit8u byte);
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BX_CPP_INLINE Bit8u vpperm_bit_reverse(Bit8u v8)
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{
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return (v8 >> 7) |
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((v8 >> 5) & 0x02) |
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((v8 >> 3) & 0x04) |
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((v8 >> 1) & 0x08) |
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((v8 << 1) & 0x10) |
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((v8 << 3) & 0x20) |
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((v8 << 5) & 0x40) |
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(v8 << 7);
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}
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BX_CPP_INLINE Bit8u vpperm_noop(Bit8u v8) { return v8; }
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BX_CPP_INLINE Bit8u vpperm_invert(Bit8u v8) { return ~v8; }
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BX_CPP_INLINE Bit8u vpperm_invert_bit_reverse(Bit8u v8) { return vpperm_bit_reverse(~v8); }
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BX_CPP_INLINE Bit8u vpperm_zeros(Bit8u v8) { return 0; }
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BX_CPP_INLINE Bit8u vpperm_ones(Bit8u v8) { return 0xff; }
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BX_CPP_INLINE Bit8u vpperm_replicate_msb(Bit8u v8) { return (((Bit8s) v8) >> 7); }
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BX_CPP_INLINE Bit8u vpperm_invert_replicate_msb(Bit8u v8) { return vpperm_replicate_msb(~v8); }
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// logical operation for VPPERM
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static vpperm_operation vpperm_op[8] = {
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vpperm_noop,
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vpperm_invert,
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vpperm_bit_reverse,
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vpperm_invert_bit_reverse,
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vpperm_zeros,
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vpperm_ones,
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vpperm_replicate_msb,
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vpperm_invert_replicate_msb
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};
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPCMOV_VdqHdqWdqVIb(bxInstruction_c *i)
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{
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BxPackedYmmRegister op1 = BX_READ_YMM_REG(i->src1());
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BxPackedYmmRegister op2 = BX_READ_YMM_REG(i->src2());
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BxPackedYmmRegister op3 = BX_READ_YMM_REG(i->src3());
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unsigned len = i->getVL();
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for (unsigned n=0; n < len; n++) {
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xmm_pselect(&op1.ymm128(n), &op2.ymm128(n), &op3.ymm128(n));
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}
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BX_WRITE_YMM_REGZ_VLEN(i->dst(), op1, len);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPPERM_VdqHdqWdqVIb(bxInstruction_c *i)
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{
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
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BxPackedXmmRegister op2 = BX_READ_XMM_REG(i->src2());
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BxPackedXmmRegister op3 = BX_READ_XMM_REG(i->src3()), dst;
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for (unsigned n=0;n<16;n++) {
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unsigned control = op3.xmmubyte(n);
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if (control & 0x10)
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dst.xmmubyte(n) = op1.xmmubyte(control & 0xf);
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else
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dst.xmmubyte(n) = op2.xmmubyte(control & 0xf);
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dst.xmmubyte(n) = vpperm_op[control >> 5](dst.xmmubyte(n));
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}
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BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), dst);
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BX_NEXT_INSTR(i);
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}
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#define XOP_SHIFT_ROTATE(HANDLER, func) \
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C:: HANDLER (bxInstruction_c *i) \
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{ \
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1()), op2 = BX_READ_XMM_REG(i->src2()); \
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\
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(func)(&op1, &op2); \
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\
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BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1); \
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\
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BX_NEXT_INSTR(i); \
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}
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XOP_SHIFT_ROTATE(VPSHAB_VdqWdqHdq, xmm_pshab);
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XOP_SHIFT_ROTATE(VPSHAW_VdqWdqHdq, xmm_pshaw);
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XOP_SHIFT_ROTATE(VPSHAD_VdqWdqHdq, xmm_pshad);
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XOP_SHIFT_ROTATE(VPSHAQ_VdqWdqHdq, xmm_pshaq);
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XOP_SHIFT_ROTATE(VPSHLB_VdqWdqHdq, xmm_pshlb);
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XOP_SHIFT_ROTATE(VPSHLW_VdqWdqHdq, xmm_pshlw);
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XOP_SHIFT_ROTATE(VPSHLD_VdqWdqHdq, xmm_pshld);
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XOP_SHIFT_ROTATE(VPSHLQ_VdqWdqHdq, xmm_pshlq);
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XOP_SHIFT_ROTATE(VPROTB_VdqWdqHdq, xmm_protb);
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XOP_SHIFT_ROTATE(VPROTW_VdqWdqHdq, xmm_protw);
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XOP_SHIFT_ROTATE(VPROTD_VdqWdqHdq, xmm_protd);
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XOP_SHIFT_ROTATE(VPROTQ_VdqWdqHdq, xmm_protq);
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMACSSWW_VdqHdqWdqVIbR(bxInstruction_c *i)
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{
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
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BxPackedXmmRegister op2 = BX_READ_XMM_REG(i->src2());
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BxPackedXmmRegister op3 = BX_READ_XMM_REG(i->src3());
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for(unsigned n=0;n<8;n++) {
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op1.xmm16s(n) = SaturateDwordSToWordS(((Bit32s) op1.xmm16s(n) * (Bit32s) op2.xmm16s(n)) + (Bit32s) op3.xmm16s(n));
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}
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BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMACSSWD_VdqHdqWdqVIbR(bxInstruction_c *i)
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{
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
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BxPackedXmmRegister op2 = BX_READ_XMM_REG(i->src2());
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BxPackedXmmRegister op3 = BX_READ_XMM_REG(i->src3());
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op1.xmm32s(0) = SaturateQwordSToDwordS(((Bit32s) op1.xmm16s(1) * (Bit32s) op2.xmm16s(1)) + (Bit64s) op3.xmm32s(0));
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op1.xmm32s(1) = SaturateQwordSToDwordS(((Bit32s) op1.xmm16s(3) * (Bit32s) op2.xmm16s(3)) + (Bit64s) op3.xmm32s(1));
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op1.xmm32s(2) = SaturateQwordSToDwordS(((Bit32s) op1.xmm16s(5) * (Bit32s) op2.xmm16s(5)) + (Bit64s) op3.xmm32s(2));
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op1.xmm32s(3) = SaturateQwordSToDwordS(((Bit32s) op1.xmm16s(7) * (Bit32s) op2.xmm16s(7)) + (Bit64s) op3.xmm32s(3));
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BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
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BX_NEXT_INSTR(i);
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}
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BX_CPP_INLINE Bit64s add_saturate64(Bit64s a, Bit64s b)
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{
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Bit64s r = a + b;
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Bit64u overflow = GET_ADD_OVERFLOW(a, b, r, BX_CONST64(0x8000000000000000));
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if (! overflow) return r;
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// signed overflow detected, saturate
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if (a > 0) overflow--;
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return (Bit64s) overflow;
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMACSSDQL_VdqHdqWdqVIbR(bxInstruction_c *i)
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{
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
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BxPackedXmmRegister op2 = BX_READ_XMM_REG(i->src2());
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BxPackedXmmRegister op3 = BX_READ_XMM_REG(i->src3());
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Bit64s product1 = (Bit64s) op1.xmm32s(0) * (Bit64s) op2.xmm32s(0);
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Bit64s product2 = (Bit64s) op1.xmm32s(2) * (Bit64s) op2.xmm32s(2);
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op1.xmm64s(0) = add_saturate64(product1, op3.xmm64s(0));
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op1.xmm64s(1) = add_saturate64(product2, op3.xmm64s(1));
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BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMACSSDD_VdqHdqWdqVIbR(bxInstruction_c *i)
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{
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
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BxPackedXmmRegister op2 = BX_READ_XMM_REG(i->src2());
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BxPackedXmmRegister op3 = BX_READ_XMM_REG(i->src3());
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for(unsigned n=0;n<4;n++) {
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op1.xmm32s(n) = SaturateQwordSToDwordS(((Bit64s) op1.xmm32s(n) * (Bit64s) op2.xmm32s(n)) + (Bit64s) op3.xmm32s(n));
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}
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BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMACSSDQH_VdqHdqWdqVIbR(bxInstruction_c *i)
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{
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
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BxPackedXmmRegister op2 = BX_READ_XMM_REG(i->src2());
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BxPackedXmmRegister op3 = BX_READ_XMM_REG(i->src3());
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Bit64s product1 = (Bit64s) op1.xmm32s(1) * (Bit64s) op2.xmm32s(1);
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Bit64s product2 = (Bit64s) op1.xmm32s(3) * (Bit64s) op2.xmm32s(3);
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op1.xmm64s(0) = add_saturate64(product1, op3.xmm64s(0));
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op1.xmm64s(1) = add_saturate64(product2, op3.xmm64s(1));
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BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMACSWW_VdqHdqWdqVIbR(bxInstruction_c *i)
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{
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
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BxPackedXmmRegister op2 = BX_READ_XMM_REG(i->src2());
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BxPackedXmmRegister op3 = BX_READ_XMM_REG(i->src3());
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for(unsigned n=0;n<8;n++) {
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op1.xmm16s(n) = ((Bit32s) op1.xmm16s(n) * (Bit32s) op2.xmm16s(n)) + (Bit32s) op3.xmm16s(n);
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}
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BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMACSWD_VdqHdqWdqVIbR(bxInstruction_c *i)
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{
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
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BxPackedXmmRegister op2 = BX_READ_XMM_REG(i->src2());
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BxPackedXmmRegister op3 = BX_READ_XMM_REG(i->src3());
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op1.xmm32s(0) = ((Bit32s) op1.xmm16s(1) * (Bit32s) op2.xmm16s(1)) + (Bit64s) op3.xmm32s(0);
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op1.xmm32s(1) = ((Bit32s) op1.xmm16s(3) * (Bit32s) op2.xmm16s(3)) + (Bit64s) op3.xmm32s(1);
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op1.xmm32s(2) = ((Bit32s) op1.xmm16s(5) * (Bit32s) op2.xmm16s(5)) + (Bit64s) op3.xmm32s(2);
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op1.xmm32s(3) = ((Bit32s) op1.xmm16s(7) * (Bit32s) op2.xmm16s(7)) + (Bit64s) op3.xmm32s(3);
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BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMACSDQL_VdqHdqWdqVIbR(bxInstruction_c *i)
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{
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
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BxPackedXmmRegister op2 = BX_READ_XMM_REG(i->src2());
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BxPackedXmmRegister op3 = BX_READ_XMM_REG(i->src3());
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Bit64s product1 = (Bit64s) op1.xmm32s(0) * (Bit64s) op2.xmm32s(0);
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Bit64s product2 = (Bit64s) op1.xmm32s(2) * (Bit64s) op2.xmm32s(2);
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op1.xmm64s(0) = product1 + op3.xmm64s(0);
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op1.xmm64s(1) = product2 + op3.xmm64s(1);
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BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMACSDD_VdqHdqWdqVIbR(bxInstruction_c *i)
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{
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
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BxPackedXmmRegister op2 = BX_READ_XMM_REG(i->src2());
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BxPackedXmmRegister op3 = BX_READ_XMM_REG(i->src3());
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for(unsigned n=0;n<4;n++) {
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op1.xmm32s(n) = ((Bit64s) op1.xmm32s(n) * (Bit64s) op2.xmm32s(n)) + (Bit64s) op3.xmm32s(n);
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}
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BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMACSDQH_VdqHdqWdqVIbR(bxInstruction_c *i)
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{
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
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BxPackedXmmRegister op2 = BX_READ_XMM_REG(i->src2());
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BxPackedXmmRegister op3 = BX_READ_XMM_REG(i->src3());
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Bit64s product1 = (Bit64s) op1.xmm32s(1) * (Bit64s) op2.xmm32s(1);
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Bit64s product2 = (Bit64s) op1.xmm32s(3) * (Bit64s) op2.xmm32s(3);
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|
|
|
op1.xmm64s(0) = product1 + op3.xmm64s(0);
|
|
op1.xmm64s(1) = product2 + op3.xmm64s(1);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMADCSSWD_VdqHdqWdqVIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
|
|
BxPackedXmmRegister op2 = BX_READ_XMM_REG(i->src2());
|
|
BxPackedXmmRegister op3 = BX_READ_XMM_REG(i->src3());
|
|
|
|
Bit32s product[8];
|
|
|
|
for(unsigned n=0;n < 8;n++)
|
|
product[n] = (Bit32s) op1.xmm16s(n) * (Bit32s) op2.xmm16s(n);
|
|
|
|
op1.xmm32s(0) = SaturateQwordSToDwordS((Bit64s) product[0] + (Bit64s) product[1] + (Bit64s) op3.xmm32s(0));
|
|
op1.xmm32s(1) = SaturateQwordSToDwordS((Bit64s) product[2] + (Bit64s) product[3] + (Bit64s) op3.xmm32s(1));
|
|
op1.xmm32s(2) = SaturateQwordSToDwordS((Bit64s) product[4] + (Bit64s) product[5] + (Bit64s) op3.xmm32s(2));
|
|
op1.xmm32s(3) = SaturateQwordSToDwordS((Bit64s) product[6] + (Bit64s) product[7] + (Bit64s) op3.xmm32s(3));
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMADCSWD_VdqHdqWdqVIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
|
|
BxPackedXmmRegister op2 = BX_READ_XMM_REG(i->src2());
|
|
BxPackedXmmRegister op3 = BX_READ_XMM_REG(i->src3());
|
|
|
|
Bit32s product[8];
|
|
|
|
for(unsigned n=0;n < 8;n++)
|
|
product[n] = (Bit32s) op1.xmm16s(n) * (Bit32s) op2.xmm16s(n);
|
|
|
|
op1.xmm32s(0) = product[0] + product[1] + op3.xmm32s(0);
|
|
op1.xmm32s(1) = product[2] + product[3] + op3.xmm32s(1);
|
|
op1.xmm32s(2) = product[4] + product[5] + op3.xmm32s(2);
|
|
op1.xmm32s(3) = product[6] + product[7] + op3.xmm32s(3);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPROTB_VdqWdqIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
int count = i->Ib();
|
|
|
|
if (count > 0) {
|
|
// rotate left
|
|
xmm_prolb(&op, count);
|
|
}
|
|
else if (count < 0) {
|
|
// rotate right
|
|
xmm_prorb(&op, -count);
|
|
}
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPROTW_VdqWdqIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
int count = i->Ib();
|
|
|
|
if (count > 0) {
|
|
// rotate left
|
|
xmm_prolw(&op, count);
|
|
}
|
|
else if (count < 0) {
|
|
// rotate right
|
|
xmm_prorw(&op, -count);
|
|
}
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPROTD_VdqWdqIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
int count = i->Ib();
|
|
|
|
if (count > 0) {
|
|
// rotate left
|
|
xmm_prold(&op, count);
|
|
}
|
|
else if (count < 0) {
|
|
// rotate right
|
|
xmm_prord(&op, -count);
|
|
}
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPROTQ_VdqWdqIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
int count = i->Ib();
|
|
|
|
if (count > 0) {
|
|
// rotate left
|
|
xmm_prolq(&op, count);
|
|
}
|
|
else if (count < 0) {
|
|
// rotate right
|
|
xmm_prorq(&op, -count);
|
|
}
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPCOMB_VdqHdqWdqIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1()), op2 = BX_READ_XMM_REG(i->src2());
|
|
|
|
compare8[i->Ib() & 7](&op1, &op2);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPCOMW_VdqHdqWdqIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1()), op2 = BX_READ_XMM_REG(i->src2());
|
|
|
|
compare16[i->Ib() & 7](&op1, &op2);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPCOMD_VdqHdqWdqIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1()), op2 = BX_READ_XMM_REG(i->src2());
|
|
|
|
compare32[i->Ib() & 7](&op1, &op2);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPCOMQ_VdqHdqWdqIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1()), op2 = BX_READ_XMM_REG(i->src2());
|
|
|
|
compare64[i->Ib() & 7](&op1, &op2);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPCOMUB_VdqHdqWdqIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1()), op2 = BX_READ_XMM_REG(i->src2());
|
|
|
|
compare8u[i->Ib() & 7](&op1, &op2);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPCOMUW_VdqHdqWdqIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1()), op2 = BX_READ_XMM_REG(i->src2());
|
|
|
|
compare16u[i->Ib() & 7](&op1, &op2);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPCOMUD_VdqHdqWdqIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1()), op2 = BX_READ_XMM_REG(i->src2());
|
|
|
|
compare32u[i->Ib() & 7](&op1, &op2);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPCOMUQ_VdqHdqWdqIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1()), op2 = BX_READ_XMM_REG(i->src2());
|
|
|
|
compare64u[i->Ib() & 7](&op1, &op2);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VFRCZPS_VpsWpsR(bxInstruction_c *i)
|
|
{
|
|
BxPackedYmmRegister op = BX_READ_YMM_REG(i->src());
|
|
unsigned len = i->getVL();
|
|
|
|
float_status_t status;
|
|
mxcsr_to_softfloat_status_word(status, MXCSR);
|
|
|
|
for (unsigned n=0; n < (4*len); n++) {
|
|
op.ymm32u(n) = float32_frc(op.ymm32u(n), status);
|
|
}
|
|
|
|
check_exceptionsSSE(status.float_exception_flags);
|
|
BX_WRITE_YMM_REGZ_VLEN(i->dst(), op, len);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VFRCZPD_VpdWpdR(bxInstruction_c *i)
|
|
{
|
|
BxPackedYmmRegister op = BX_READ_YMM_REG(i->src());
|
|
unsigned len = i->getVL();
|
|
|
|
float_status_t status;
|
|
mxcsr_to_softfloat_status_word(status, MXCSR);
|
|
|
|
for (unsigned n=0; n < (2*len); n++) {
|
|
op.ymm64u(n) = float64_frc(op.ymm64u(n), status);
|
|
}
|
|
|
|
check_exceptionsSSE(status.float_exception_flags);
|
|
|
|
BX_WRITE_YMM_REGZ_VLEN(i->dst(), op, len);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VFRCZSS_VssWssR(bxInstruction_c *i)
|
|
{
|
|
float32 op = BX_READ_XMM_REG_LO_DWORD(i->src());
|
|
BxPackedXmmRegister r;
|
|
|
|
float_status_t status;
|
|
mxcsr_to_softfloat_status_word(status, MXCSR);
|
|
|
|
r.xmm64u(0) = (Bit64u) float32_frc(op, status);
|
|
r.xmm64u(1) = 0;
|
|
|
|
check_exceptionsSSE(status.float_exception_flags);
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), r);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VFRCZSD_VsdWsdR(bxInstruction_c *i)
|
|
{
|
|
float64 op = BX_READ_XMM_REG_LO_QWORD(i->src());
|
|
BxPackedXmmRegister r;
|
|
|
|
float_status_t status;
|
|
mxcsr_to_softfloat_status_word(status, MXCSR);
|
|
|
|
r.xmm64u(0) = float64_frc(op, status);
|
|
r.xmm64u(1) = 0;
|
|
|
|
check_exceptionsSSE(status.float_exception_flags);
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), r);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPHADDBW_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
|
|
op.xmm16s(0) = (Bit16s) op.xmmsbyte(0x0) + (Bit16s) op.xmmsbyte(0x1);
|
|
op.xmm16s(1) = (Bit16s) op.xmmsbyte(0x2) + (Bit16s) op.xmmsbyte(0x3);
|
|
op.xmm16s(2) = (Bit16s) op.xmmsbyte(0x4) + (Bit16s) op.xmmsbyte(0x5);
|
|
op.xmm16s(3) = (Bit16s) op.xmmsbyte(0x6) + (Bit16s) op.xmmsbyte(0x7);
|
|
op.xmm16s(4) = (Bit16s) op.xmmsbyte(0x8) + (Bit16s) op.xmmsbyte(0x9);
|
|
op.xmm16s(5) = (Bit16s) op.xmmsbyte(0xA) + (Bit16s) op.xmmsbyte(0xB);
|
|
op.xmm16s(6) = (Bit16s) op.xmmsbyte(0xC) + (Bit16s) op.xmmsbyte(0xD);
|
|
op.xmm16s(7) = (Bit16s) op.xmmsbyte(0xE) + (Bit16s) op.xmmsbyte(0xF);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPHADDBD_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
|
|
op.xmm32s(0) = (Bit32s) op.xmmsbyte(0x0) + (Bit32s) op.xmmsbyte(0x1) +
|
|
(Bit32s) op.xmmsbyte(0x2) + (Bit32s) op.xmmsbyte(0x3);
|
|
op.xmm32s(1) = (Bit32s) op.xmmsbyte(0x4) + (Bit32s) op.xmmsbyte(0x5) +
|
|
(Bit32s) op.xmmsbyte(0x6) + (Bit32s) op.xmmsbyte(0x7);
|
|
op.xmm32s(2) = (Bit32s) op.xmmsbyte(0x8) + (Bit32s) op.xmmsbyte(0x9) +
|
|
(Bit32s) op.xmmsbyte(0xA) + (Bit32s) op.xmmsbyte(0xB);
|
|
op.xmm32s(3) = (Bit32s) op.xmmsbyte(0xC) + (Bit32s) op.xmmsbyte(0xD) +
|
|
(Bit32s) op.xmmsbyte(0xE) + (Bit32s) op.xmmsbyte(0xF);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPHADDBQ_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
|
|
op.xmm64s(0) = (Bit32s) op.xmmsbyte(0x0) + (Bit32s) op.xmmsbyte(0x1) +
|
|
(Bit32s) op.xmmsbyte(0x2) + (Bit32s) op.xmmsbyte(0x3) +
|
|
(Bit32s) op.xmmsbyte(0x4) + (Bit32s) op.xmmsbyte(0x5) +
|
|
(Bit32s) op.xmmsbyte(0x6) + (Bit32s) op.xmmsbyte(0x7);
|
|
op.xmm64s(1) = (Bit32s) op.xmmsbyte(0x8) + (Bit32s) op.xmmsbyte(0x9) +
|
|
(Bit32s) op.xmmsbyte(0xA) + (Bit32s) op.xmmsbyte(0xB) +
|
|
(Bit32s) op.xmmsbyte(0xC) + (Bit32s) op.xmmsbyte(0xD) +
|
|
(Bit32s) op.xmmsbyte(0xE) + (Bit32s) op.xmmsbyte(0xF);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPHADDWD_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
|
|
op.xmm32s(0) = (Bit32s) op.xmm16s(0) + (Bit32s) op.xmm16s(1);
|
|
op.xmm32s(1) = (Bit32s) op.xmm16s(2) + (Bit32s) op.xmm16s(3);
|
|
op.xmm32s(2) = (Bit32s) op.xmm16s(4) + (Bit32s) op.xmm16s(5);
|
|
op.xmm32s(3) = (Bit32s) op.xmm16s(6) + (Bit32s) op.xmm16s(7);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPHADDWQ_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
|
|
op.xmm64s(0) = (Bit32s) op.xmm16s(0) + (Bit32s) op.xmm16s(1) +
|
|
(Bit32s) op.xmm16s(2) + (Bit32s) op.xmm16s(3);
|
|
op.xmm64s(1) = (Bit32s) op.xmm16s(4) + (Bit32s) op.xmm16s(5) +
|
|
(Bit32s) op.xmm16s(6) + (Bit32s) op.xmm16s(7);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPHADDDQ_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
|
|
op.xmm64s(0) = (Bit64s) op.xmm32s(0) + (Bit64s) op.xmm32s(1);
|
|
op.xmm64s(1) = (Bit64s) op.xmm32s(2) + (Bit64s) op.xmm32s(3);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPHADDUBW_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
|
|
op.xmm16u(0) = (Bit16u) op.xmmubyte(0x0) + (Bit16u) op.xmmubyte(0x1);
|
|
op.xmm16u(1) = (Bit16u) op.xmmubyte(0x2) + (Bit16u) op.xmmubyte(0x3);
|
|
op.xmm16u(2) = (Bit16u) op.xmmubyte(0x4) + (Bit16u) op.xmmubyte(0x5);
|
|
op.xmm16u(3) = (Bit16u) op.xmmubyte(0x6) + (Bit16u) op.xmmubyte(0x7);
|
|
op.xmm16u(4) = (Bit16u) op.xmmubyte(0x8) + (Bit16u) op.xmmubyte(0x9);
|
|
op.xmm16u(5) = (Bit16u) op.xmmubyte(0xA) + (Bit16u) op.xmmubyte(0xB);
|
|
op.xmm16u(6) = (Bit16u) op.xmmubyte(0xC) + (Bit16u) op.xmmubyte(0xD);
|
|
op.xmm16u(7) = (Bit16u) op.xmmubyte(0xE) + (Bit16u) op.xmmubyte(0xF);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPHADDUBD_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
|
|
op.xmm32u(0) = (Bit32u) op.xmmubyte(0x0) + (Bit32s) op.xmmubyte(0x1) +
|
|
(Bit32u) op.xmmubyte(0x2) + (Bit32s) op.xmmubyte(0x3);
|
|
op.xmm32u(1) = (Bit32u) op.xmmubyte(0x4) + (Bit32s) op.xmmubyte(0x5) +
|
|
(Bit32u) op.xmmubyte(0x6) + (Bit32s) op.xmmubyte(0x7);
|
|
op.xmm32u(2) = (Bit32u) op.xmmubyte(0x8) + (Bit32s) op.xmmubyte(0x9) +
|
|
(Bit32u) op.xmmubyte(0xA) + (Bit32s) op.xmmubyte(0xB);
|
|
op.xmm32u(3) = (Bit32u) op.xmmubyte(0xC) + (Bit32s) op.xmmubyte(0xD) +
|
|
(Bit32u) op.xmmubyte(0xE) + (Bit32s) op.xmmubyte(0xF);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPHADDUBQ_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
|
|
op.xmm64u(0) = (Bit32u) op.xmmubyte(0x0) + (Bit32u) op.xmmubyte(0x1) +
|
|
(Bit32u) op.xmmubyte(0x2) + (Bit32u) op.xmmubyte(0x3) +
|
|
(Bit32u) op.xmmubyte(0x4) + (Bit32u) op.xmmubyte(0x5) +
|
|
(Bit32u) op.xmmubyte(0x6) + (Bit32u) op.xmmubyte(0x7);
|
|
op.xmm64u(1) = (Bit32u) op.xmmubyte(0x8) + (Bit32u) op.xmmubyte(0x9) +
|
|
(Bit32u) op.xmmubyte(0xA) + (Bit32u) op.xmmubyte(0xB) +
|
|
(Bit32u) op.xmmubyte(0xC) + (Bit32u) op.xmmubyte(0xD) +
|
|
(Bit32u) op.xmmubyte(0xE) + (Bit32u) op.xmmubyte(0xF);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPHADDUWD_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
|
|
op.xmm32u(0) = (Bit32u) op.xmm16u(0) + (Bit32u) op.xmm16u(1);
|
|
op.xmm32u(1) = (Bit32u) op.xmm16u(2) + (Bit32u) op.xmm16u(3);
|
|
op.xmm32u(2) = (Bit32u) op.xmm16u(4) + (Bit32u) op.xmm16u(5);
|
|
op.xmm32u(3) = (Bit32u) op.xmm16u(6) + (Bit32u) op.xmm16u(7);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPHADDUWQ_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
|
|
op.xmm64u(0) = (Bit32u) op.xmm16u(0) + (Bit32u) op.xmm16u(1) +
|
|
(Bit32u) op.xmm16u(2) + (Bit32u) op.xmm16u(3);
|
|
op.xmm64u(1) = (Bit32u) op.xmm16u(4) + (Bit32u) op.xmm16u(5) +
|
|
(Bit32u) op.xmm16u(6) + (Bit32u) op.xmm16u(7);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPHADDUDQ_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
|
|
op.xmm64u(0) = (Bit64u) op.xmm32u(0) + (Bit64u) op.xmm32u(1);
|
|
op.xmm64u(1) = (Bit64u) op.xmm32u(2) + (Bit64u) op.xmm32u(3);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPHSUBBW_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
|
|
op.xmm16s(0) = (Bit16s) op.xmmsbyte(0x0) - (Bit16s) op.xmmsbyte(0x1);
|
|
op.xmm16s(1) = (Bit16s) op.xmmsbyte(0x2) - (Bit16s) op.xmmsbyte(0x3);
|
|
op.xmm16s(2) = (Bit16s) op.xmmsbyte(0x4) - (Bit16s) op.xmmsbyte(0x5);
|
|
op.xmm16s(3) = (Bit16s) op.xmmsbyte(0x6) - (Bit16s) op.xmmsbyte(0x7);
|
|
op.xmm16s(4) = (Bit16s) op.xmmsbyte(0x8) - (Bit16s) op.xmmsbyte(0x9);
|
|
op.xmm16s(5) = (Bit16s) op.xmmsbyte(0xA) - (Bit16s) op.xmmsbyte(0xB);
|
|
op.xmm16s(6) = (Bit16s) op.xmmsbyte(0xC) - (Bit16s) op.xmmsbyte(0xD);
|
|
op.xmm16s(7) = (Bit16s) op.xmmsbyte(0xE) - (Bit16s) op.xmmsbyte(0xF);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPHSUBWD_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
|
|
op.xmm32s(0) = (Bit32s) op.xmm16s(0) - (Bit32s) op.xmm16s(1);
|
|
op.xmm32s(1) = (Bit32s) op.xmm16s(2) - (Bit32s) op.xmm16s(3);
|
|
op.xmm32s(2) = (Bit32s) op.xmm16s(4) - (Bit32s) op.xmm16s(5);
|
|
op.xmm32s(3) = (Bit32s) op.xmm16s(6) - (Bit32s) op.xmm16s(7);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPHSUBDQ_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
|
|
op.xmm64s(0) = (Bit64s) op.xmm32s(0) - (Bit64s) op.xmm32s(1);
|
|
op.xmm64s(1) = (Bit64s) op.xmm32s(2) - (Bit64s) op.xmm32s(3);
|
|
|
|
BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPERMIL2PS_VdqHdqWdqIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedYmmRegister op1 = BX_READ_YMM_REG(i->src1());
|
|
BxPackedYmmRegister op2 = BX_READ_YMM_REG(i->src2());
|
|
BxPackedYmmRegister op3 = BX_READ_YMM_REG(i->src3()), result;
|
|
unsigned len = i->getVL();
|
|
|
|
for (unsigned n=0; n < len; n++) {
|
|
xmm_permil2ps(&result.ymm128(n), &op1.ymm128(n), &op2.ymm128(n), &op3.ymm128(n), i->Ib() & 3);
|
|
}
|
|
|
|
BX_WRITE_YMM_REGZ_VLEN(i->dst(), result, len);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VPERMIL2PD_VdqHdqWdqIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedYmmRegister op1 = BX_READ_YMM_REG(i->src1());
|
|
BxPackedYmmRegister op2 = BX_READ_YMM_REG(i->src2());
|
|
BxPackedYmmRegister op3 = BX_READ_YMM_REG(i->src3()), result;
|
|
unsigned len = i->getVL();
|
|
|
|
for (unsigned n=0; n < len; n++) {
|
|
xmm_permil2pd(&result.ymm128(n), &op1.ymm128(n), &op2.ymm128(n), &op3.ymm128(n), i->Ib() & 3);
|
|
}
|
|
|
|
BX_WRITE_YMM_REGZ_VLEN(i->dst(), result, len);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
#endif
|