277 lines
7.4 KiB
C++
277 lines
7.4 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2013 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::POP_EdR(bxInstruction_c *i)
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{
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BX_WRITE_32BIT_REGZ(i->dst(), pop_32());
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::POP_EdM(bxInstruction_c *i)
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{
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RSP_SPECULATIVE;
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Bit32u val32 = pop_32();
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// Note: there is one little weirdism here. It is possible to use
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// ESP in the modrm addressing. If used, the value of ESP after the
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// pop is used to calculate the address.
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Bit32u eaddr = (Bit32u) BX_CPU_RESOLVE_ADDR_32(i->ResolveModrm, (i));
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write_virtual_dword_32(i->seg(), eaddr, val32);
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RSP_COMMIT;
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::PUSH_EdR(bxInstruction_c *i)
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{
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push_32(BX_READ_32BIT_REG(i->dst()));
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::PUSH_EdM(bxInstruction_c *i)
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{
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Bit32u eaddr = (Bit32u) BX_CPU_RESOLVE_ADDR_32(i->ResolveModrm, (i));
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Bit32u op1_32 = read_virtual_dword_32(i->seg(), eaddr);
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push_32(op1_32);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::PUSH32_Sw(bxInstruction_c *i)
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{
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Bit16u val_16 = BX_CPU_THIS_PTR sregs[i->src()].selector.value;
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) {
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stack_write_word((Bit32u) (ESP-4), val_16);
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ESP -= 4;
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}
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else
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{
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stack_write_word((Bit16u) (SP-4), val_16);
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SP -= 4;
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}
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::POP32_Sw(bxInstruction_c *i)
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{
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Bit16u selector;
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) {
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selector = stack_read_word(ESP);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[i->dst()], selector);
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ESP += 4;
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}
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else {
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selector = stack_read_word(SP);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[i->dst()], selector);
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SP += 4;
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}
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if (i->dst() == BX_SEG_REG_SS) {
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// POP SS inhibits interrupts, debug exceptions and single-step
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// trap exceptions until the execution boundary following the
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// next instruction is reached.
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// Same code as MOV_SwEw()
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inhibit_interrupts(BX_INHIBIT_INTERRUPTS_BY_MOVSS);
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}
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::PUSH_Id(bxInstruction_c *i)
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{
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push_32(i->Id());
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::PUSHA32(bxInstruction_c *i)
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{
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Bit32u temp_ESP = ESP;
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Bit16u temp_SP = SP;
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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{
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stack_write_dword((Bit32u) (temp_ESP - 4), EAX);
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stack_write_dword((Bit32u) (temp_ESP - 8), ECX);
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stack_write_dword((Bit32u) (temp_ESP - 12), EDX);
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stack_write_dword((Bit32u) (temp_ESP - 16), EBX);
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stack_write_dword((Bit32u) (temp_ESP - 20), temp_ESP);
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stack_write_dword((Bit32u) (temp_ESP - 24), EBP);
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stack_write_dword((Bit32u) (temp_ESP - 28), ESI);
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stack_write_dword((Bit32u) (temp_ESP - 32), EDI);
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ESP -= 32;
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}
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else
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{
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stack_write_dword((Bit16u) (temp_SP - 4), EAX);
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stack_write_dword((Bit16u) (temp_SP - 8), ECX);
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stack_write_dword((Bit16u) (temp_SP - 12), EDX);
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stack_write_dword((Bit16u) (temp_SP - 16), EBX);
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stack_write_dword((Bit16u) (temp_SP - 20), temp_ESP);
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stack_write_dword((Bit16u) (temp_SP - 24), EBP);
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stack_write_dword((Bit16u) (temp_SP - 28), ESI);
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stack_write_dword((Bit16u) (temp_SP - 32), EDI);
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SP -= 32;
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}
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::POPA32(bxInstruction_c *i)
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{
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Bit32u edi, esi, ebp, ebx, edx, ecx, eax;
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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{
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Bit32u temp_ESP = ESP;
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edi = stack_read_dword((Bit32u) (temp_ESP + 0));
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esi = stack_read_dword((Bit32u) (temp_ESP + 4));
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ebp = stack_read_dword((Bit32u) (temp_ESP + 8));
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stack_read_dword((Bit32u) (temp_ESP + 12));
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ebx = stack_read_dword((Bit32u) (temp_ESP + 16));
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edx = stack_read_dword((Bit32u) (temp_ESP + 20));
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ecx = stack_read_dword((Bit32u) (temp_ESP + 24));
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eax = stack_read_dword((Bit32u) (temp_ESP + 28));
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ESP += 32;
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}
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else
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{
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Bit16u temp_SP = SP;
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edi = stack_read_dword((Bit16u) (temp_SP + 0));
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esi = stack_read_dword((Bit16u) (temp_SP + 4));
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ebp = stack_read_dword((Bit16u) (temp_SP + 8));
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stack_read_dword((Bit16u) (temp_SP + 12));
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ebx = stack_read_dword((Bit16u) (temp_SP + 16));
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edx = stack_read_dword((Bit16u) (temp_SP + 20));
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ecx = stack_read_dword((Bit16u) (temp_SP + 24));
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eax = stack_read_dword((Bit16u) (temp_SP + 28));
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SP += 32;
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}
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EDI = edi;
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ESI = esi;
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EBP = ebp;
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EBX = ebx;
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EDX = edx;
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ECX = ecx;
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EAX = eax;
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ENTER32_IwIb(bxInstruction_c *i)
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{
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Bit16u imm16 = i->Iw();
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Bit8u level = i->Ib2();
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level &= 0x1F;
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RSP_SPECULATIVE;
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push_32(EBP);
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Bit32u frame_ptr32 = ESP;
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) {
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Bit32u ebp = EBP; // Use temp copy for case of exception.
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if (level > 0) {
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/* do level-1 times */
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while (--level) {
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ebp -= 4;
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Bit32u temp32 = stack_read_dword(ebp);
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push_32(temp32);
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}
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/* push(frame pointer) */
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push_32(frame_ptr32);
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}
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ESP -= imm16;
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// ENTER finishes with memory write check on the final stack pointer
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// the memory is touched but no write actually occurs
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// emulate it by doing RMW read access from SS:ESP
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read_RMW_virtual_dword_32(BX_SEG_REG_SS, ESP);
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}
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else {
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Bit16u bp = BP;
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if (level > 0) {
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/* do level-1 times */
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while (--level) {
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bp -= 4;
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Bit32u temp32 = stack_read_dword(bp);
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push_32(temp32);
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}
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/* push(frame pointer) */
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push_32(frame_ptr32);
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}
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SP -= imm16;
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// ENTER finishes with memory write check on the final stack pointer
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// the memory is touched but no write actually occurs
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// emulate it by doing RMW read access from SS:SP
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read_RMW_virtual_dword_32(BX_SEG_REG_SS, SP);
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}
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EBP = frame_ptr32;
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RSP_COMMIT;
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LEAVE32(bxInstruction_c *i)
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{
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BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
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Bit32u value32;
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) {
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value32 = stack_read_dword(EBP);
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ESP = EBP + 4;
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}
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else {
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value32 = stack_read_dword(BP);
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SP = BP + 4;
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}
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EBP = value32;
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BX_NEXT_INSTR(i);
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}
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