49664f7503
tries to fix it. The shortcuts to register names such as AX and DL are #defines in cpu/cpu.h, and they are defined in terms of BX_CPU_THIS_PTR. When BX_USE_CPU_SMF=1, this works fine. (This is what bochs used for a long time, and nobody used the SMF=0 mode at all.) To make SMP bochs work, I had to get SMF=0 mode working for the CPU so that there could be an array of cpus. When SMF=0 for the CPU, BX_CPU_THIS_PTR is defined to be "this->" which only works within methods of BX_CPU_C. Code outside of BX_CPU_C must reference BX_CPU(num) instead. - to try to enforce the correct use of AL/AX/DL/etc. shortcuts, they are now only #defined when "NEED_CPU_REG_SHORTCUTS" is #defined. This is only done in the cpu/*.cc code.
174 lines
3.3 KiB
C++
174 lines
3.3 KiB
C++
// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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void
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BX_CPU_C::DAS(BxInstruction_t *)
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{
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Bit8u tmpCF, tmpAL;
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/* ??? */
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/* the algorithm for DAS is fashioned after the pseudo code in the
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* Pentium Processor Family Developer's Manual, volume 3. It seems
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* to have changed from earlier processor's manuals. I'm not sure
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* if this is a correction in the algorithm printed, or Intel has
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* changed the handling of instruction. It might not even be
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* correct yet...
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*/
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tmpCF = 0;
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tmpAL = AL;
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/* DAS effect the following flags: A,C,S,Z,P */
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if (((tmpAL & 0x0F) > 0x09) || get_AF()) {
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set_AF(1);
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tmpCF = (AL < 0x06) || get_CF();
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AL = AL - 0x06;
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/*tmpCF = (AL < 0) || CF;*/
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}
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if ( (tmpAL > 0x99) || get_CF() ) {
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AL = AL - 0x60;
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tmpCF = 1;
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}
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set_CF(tmpCF);
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set_SF(AL >> 7);
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set_ZF(AL==0);
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set_PF_base(AL);
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}
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void
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BX_CPU_C::AAA(BxInstruction_t *)
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{
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Bit8u ALcarry;
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ALcarry = AL > 0xf9;
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/* AAA effects the following flags: A,C */
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if ( ((AL & 0x0f) > 9) || get_AF() ) {
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AL = (AL + 6) & 0x0f;
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AH = AH + 1 + ALcarry;
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set_AF(1);
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set_CF(1);
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}
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else {
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set_AF(0);
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set_CF(0);
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AL = AL & 0x0f;
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}
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}
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void
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BX_CPU_C::AAS(BxInstruction_t *)
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{
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Bit8u ALborrow;
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/* AAS affects the following flags: A,C */
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ALborrow = AL < 6;
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if ( ((AL & 0x0F) > 0x09) || get_AF() ) {
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AL = (AL - 6) & 0x0f;
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AH = AH - 1 - ALborrow;
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set_AF(1);
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set_CF(1);
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}
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else {
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set_CF(0);
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set_AF(0);
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AL = AL & 0x0f;
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}
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}
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void
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BX_CPU_C::AAM(BxInstruction_t *i)
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{
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Bit8u al, imm8;
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imm8 = i->Ib;
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al = AL;
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AH = al / imm8;
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AL = al % imm8;
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/* AAM affects the following flags: S,Z,P */
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set_SF((AH & 0x80) > 0);
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set_ZF(AX==0);
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set_PF_base(AL); /* ??? */
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}
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void
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BX_CPU_C::AAD(BxInstruction_t *i)
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{
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Bit8u imm8;
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imm8 = i->Ib;
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AL = AH * imm8 + AL;
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AH = 0;
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/* AAD effects the following flags: S,Z,P */
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set_SF(AL >= 0x80);
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set_ZF(AL == 0);
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set_PF_base(AL);
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}
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void
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BX_CPU_C::DAA(BxInstruction_t *)
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{
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Bit8u al;
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al = AL;
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// DAA affects the following flags: S,Z,A,P,C
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// ???
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if (((al & 0x0F) > 0x09) || get_AF()) {
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al = al + 0x06;
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set_AF(1);
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}
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else
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set_AF(0);
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if ((al > 0x9F) || get_CF()) {
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al = al + 0x60;
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set_CF(1);
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}
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AL = al;
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set_SF(al >> 7);
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set_ZF(al==0);
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set_PF_base(al);
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}
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