Bochs/bochs/cpu/decoder
2023-12-10 20:44:05 +02:00
..
decoder.h define CPU feature's enum together with feature name in one place 2023-10-15 23:56:11 +03:00
disasm.cc fixed compilation of instrumentation examples with debugger OFF 2023-04-06 22:18:01 +03:00
features.h implemented MOVDIR64B instruction and enabled in TigerLake model 2023-12-01 18:03:25 +02:00
fetchdecode32.cc implemented MOVDIR64B instruction and enabled in TigerLake model 2023-12-01 18:03:25 +02:00
fetchdecode64.cc implemented MOVDIR64B instruction and enabled in TigerLake model 2023-12-01 18:03:25 +02:00
fetchdecode_avx.h coding style, cleanups and optimizations 2023-11-19 20:31:05 +02:00
fetchdecode_evex.h remove redundant space in comment 2023-12-10 20:44:05 +02:00
fetchdecode_opmap_0f3a.h fixed compilation for VMX=1 X86_64=1 2023-11-28 10:36:56 +02:00
fetchdecode_opmap_0f38.h implemented MOVDIR64B instruction and enabled in TigerLake model 2023-12-01 18:03:25 +02:00
fetchdecode_opmap.h implemented WAITPKG instruction set (#150) 2023-12-01 18:00:03 +02:00
fetchdecode_x87.h x87: Implemented special behavior for 287-compatibility FSTP opcode: D9D8..D9DF - Behaves the same as FSTP but won't cause a stack underflow exception. 2023-12-07 12:56:02 +02:00
fetchdecode_xop.h remove trailing whitespace from source files 2022-08-23 21:46:04 +03:00
fetchdecode.h optimize handling of allowed_to_run_FPU_MMX instructios common block 2023-11-08 06:48:53 +02:00
ia_opcodes.def x87: Implemented special behavior for 287-compatibility FSTP opcode: D9D8..D9DF - Behaves the same as FSTP but won't cause a stack underflow exception. 2023-12-07 12:56:02 +02:00
ia_opcodes.h add into ia_opcodes.def disasm field for every instruction 2020-03-28 14:23:54 +00:00
instr.h fixed compilation of instrumentation examples with debugger OFF 2023-04-06 22:18:01 +03:00