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c9d8413422
Bochs/bochs/cpu
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Stanislav Shwartsman c9d8413422 allow TLB caching of SPP paging writes 
it is possible that SPP-protected subpage block is allowing write but all others are not.
the TLB entry cannot be cached as writeOK based on SPP subblock check
2022-08-14 21:09:18 +03:00
..
avx dos2unix to all files 2022-07-30 14:31:16 +03:00
cpudb MBE (Mode Based Execution Control) emulation (#22) 2022-07-30 15:26:47 +03:00
decoder dos2unix to all files 2022-07-30 14:31:16 +03:00
fpu dos2unix to all files 2022-07-30 14:31:16 +03:00
3dnow.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
access2.cc Fix two bugs around monitor/mwait 2022-07-13 21:51:15 -05:00
access.cc ! CPUID: Added TigerLake CPU definition (features CET and CLWB support) 2021-01-30 08:35:35 +00:00
access.h keep def of YMM/ZMM register even if AVX or EVEX are not compiled in and let reading/writing them to MEM 2018-04-04 19:31:56 +00:00
aes.cc avoid gcc 7.3 warning 2018-05-27 19:09:59 +00:00
apic.cc use boolean constants true/false instead of 0/1 (#26) 2022-07-30 18:38:22 +03:00
apic.h use boolean constants true/false instead of 0/1 (#26) 2022-07-30 18:38:22 +03:00
arith8.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
arith16.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
arith32.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
arith64.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
bcd.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
bit16.cc ! CPUID: Added TigerLake CPU definition (features CET and CLWB support) 2021-01-30 08:35:35 +00:00
bit32.cc ! CPUID: Added TigerLake CPU definition (features CET and CLWB support) 2021-01-30 08:35:35 +00:00
bit64.cc ! CPUID: Added TigerLake CPU definition (features CET and CLWB support) 2021-01-30 08:35:35 +00:00
bit.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
bmi32.cc dos2unix to all files 2022-07-30 14:31:16 +03:00
bmi64.cc dos2unix to all files 2022-07-30 14:31:16 +03:00
call_far.cc Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071 2019-12-20 07:42:07 +00:00
cet.cc ! CPUID: Added TigerLake CPU definition (features CET and CLWB support) 2021-01-30 08:35:35 +00:00
cpu.cc use boolean constants true/false instead of 0/1 (#26) 2022-07-30 18:38:22 +03:00
cpu.h allow TLB caching of SPP paging writes 2022-08-14 21:09:18 +03:00
cpuid.cc solve code duplication between different cpudb models 2021-02-16 18:57:49 +00:00
cpuid.h MBE (Mode Based Execution Control) emulation (#22) 2022-07-30 15:26:47 +03:00
cpustats.h added few tlb specific cpustat counters 2015-09-28 19:09:32 +00:00
crc32.cc change a bit more defines to const with type 2019-12-26 16:48:33 +00:00
crregs.cc fixed SVM V_TPR handling SF bug #1428 AMD SVM Hyper-V fails 2021-03-11 21:19:45 +00:00
crregs.h list in debug CR4 more already published bits (UINTR) 2022-07-30 19:15:32 +03:00
ctrl_xfer16.cc use boolean constants true/false instead of 0/1 (#26) 2022-07-30 18:38:22 +03:00
ctrl_xfer32.cc use boolean constants true/false instead of 0/1 (#26) 2022-07-30 18:38:22 +03:00
ctrl_xfer64.cc use boolean constants true/false instead of 0/1 (#26) 2022-07-30 18:38:22 +03:00
ctrl_xfer_pro.cc Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071 2019-12-20 07:42:07 +00:00
data_xfer8.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
data_xfer16.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
data_xfer32.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
data_xfer64.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
debugstuff.cc fixed compilation without bochs debugger 2021-01-30 20:31:03 +00:00
descriptor.h convert many consts from #define to enum or const variables (#23) 2022-07-27 23:20:47 +03:00
event.cc Fix that the INIT signal remains pending even after delivery of VM-exit/#VMEXIT(INIT) (#16) 2022-07-24 07:14:01 +03:00
exception.cc use boolean constants true/false instead of 0/1 (#26) 2022-07-30 18:38:22 +03:00
faststring.cc Removed SVN property "executable" from some files. 2021-02-21 09:25:33 +00:00
flag_ctrl_pro.cc ! CPUID: Added TigerLake CPU definition (features CET and CLWB support) 2021-01-30 08:35:35 +00:00
flag_ctrl.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
fpu_emu.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
generic_cpuid.cc solve code duplication between different cpudb models 2021-02-16 18:57:49 +00:00
generic_cpuid.h solve code duplication between different cpudb models 2021-02-16 18:57:49 +00:00
gf2.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
i387.h coding style changes, tab2space, macro2function or macro2const 2019-10-17 19:23:27 +00:00
icache.cc fix compilation with SMP enabled 2021-01-31 14:03:28 +00:00
icache.h ! CPUID: Added TigerLake CPU definition (features CET and CLWB support) 2021-01-30 08:35:35 +00:00
init.cc use boolean constants true/false instead of 0/1 (#26) 2022-07-30 18:38:22 +03:00
io.cc ! CPUID: Added TigerLake CPU definition (features CET and CLWB support) 2021-01-30 08:35:35 +00:00
iret.cc Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071 2019-12-20 07:42:07 +00:00
jmp_far.cc Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071 2019-12-20 07:42:07 +00:00
lazy_flags.h ! CPUID: Added TigerLake CPU definition (features CET and CLWB support) 2021-01-30 08:35:35 +00:00
load.cc dos2unix to all files 2022-07-30 14:31:16 +03:00
logical8.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
logical16.cc more faststring cleanup 2019-10-14 14:54:07 +00:00
logical32.cc more faststring cleanup 2019-10-14 14:54:07 +00:00
logical64.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
Makefile.in Applied two patches from Debian. 2021-09-10 15:33:22 +00:00
mmx.cc fixed behavior of MMX PSRAW/PSRAD instructions when shift count is zero - still has to invalidate x87 tags for dest register 2020-12-15 20:05:54 +00:00
msr.cc Revert "do not ignore MSR=0 even if ignore_bad_msrs is set" 2022-07-31 18:47:13 +03:00
msr.h Protection Keys: Implemented Supervisor-Mode Protection Keys (PKS) 2020-05-29 12:35:30 +00:00
mult8.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
mult16.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
mult32.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
mult64.cc extract Bit128 arithmetic to separate wide_int.cc/wide_int.h compiled independently of long mode emulation 2020-05-19 16:01:23 +00:00
mwait.cc remove siminterface.h from bochs.h and include it only where required 2021-01-30 19:40:18 +00:00
paging.cc allow TLB caching of SPP paging writes 2022-08-14 21:09:18 +03:00
proc_ctrl.cc remove gui.h from bochs.h and include it only where required 2021-01-30 18:47:25 +00:00
protect_ctrl.cc VMX: fixed exit qualification info for VMREAD/VMWRITE instructions 2021-07-03 14:31:14 +00:00
rdrand.cc VMX: fixed exit qualification info for VMREAD/VMWRITE instructions 2021-07-03 14:31:14 +00:00
ret_far.cc Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071 2019-12-20 07:42:07 +00:00
scalar_arith.h dos2unix to all files 2022-07-30 14:31:16 +03:00
segment_ctrl_pro.cc ! CPUID: Added TigerLake CPU definition (features CET and CLWB support) 2021-01-30 08:35:35 +00:00
segment_ctrl.cc VMX: save guest CET state to VMCS on vmexit 2019-12-27 13:02:30 +00:00
sha.cc dos2unix to all files 2022-07-30 14:31:16 +03:00
shift8.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
shift16.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
shift32.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
shift64.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
simd_compare.h Implement AVX512BW and AVX512DQ extensions published in recently published Intel Archtecture Extensions manual rev20. 2014-07-18 11:14:25 +00:00
simd_int.h fixed some MSVC wannings in CPU code 2021-02-08 13:06:44 +00:00
simd_pfp.h Added shape of implementation for last missing VSCALEF* AVX-512 instructons. 2014-03-09 21:42:11 +00:00
smm.cc use boolean constants true/false instead of 0/1 (#26) 2022-07-30 18:38:22 +03:00
smm.h convert many consts from #define to enum or const variables (#23) 2022-07-27 23:20:47 +03:00
soft_int.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
sse_move.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
sse_pfp.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
sse_rcp.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
sse_string.cc use boolean constants true/false instead of 0/1 (#26) 2022-07-30 18:38:22 +03:00
sse.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
stack16.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
stack32.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
stack64.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
stack.cc split Bochs CPU TLB to DTLB and ITLB to avoid aliasing conflicts between them. ~5% speedup measured 2019-12-09 18:37:02 +00:00
stack.h Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071 2019-12-20 07:42:07 +00:00
string.cc remove pc_system.h from bochs.h and include it only where required 2021-01-30 18:29:28 +00:00
svm.cc use boolean constants true/false instead of 0/1 (#26) 2022-07-30 18:38:22 +03:00
svm.h implement MSR PAR handling in AMD SVM 2021-03-21 15:33:18 +00:00
tasking.cc use boolean constants true/false instead of 0/1 (#26) 2022-07-30 18:38:22 +03:00
tlb.h fixed some MSVC wannings in CPU code 2021-02-08 13:06:44 +00:00
todo Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071 2019-12-20 07:42:07 +00:00
vapic.cc use boolean constants true/false instead of 0/1 (#26) 2022-07-30 18:38:22 +03:00
vm8086.cc Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071 2019-12-20 07:42:07 +00:00
vmcs.cc Merge branch 'master' of https://github.com/stlintel/Bochs 2022-07-30 15:43:25 +03:00
vmexit.cc use boolean constants true/false instead of 0/1 (#26) 2022-07-30 18:38:22 +03:00
vmfunc.cc cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
vmx.cc update VMEXIT reasons according to published docs 2022-08-13 23:25:10 +03:00
vmx.h update VMEXIT reasons according to published docs 2022-08-13 23:25:10 +03:00
wide_int.cc extract Bit128 arithmetic to separate wide_int.cc/wide_int.h compiled independently of long mode emulation 2020-05-19 16:01:23 +00:00
wide_int.h extract Bit128 arithmetic to separate wide_int.cc/wide_int.h compiled independently of long mode emulation 2020-05-19 16:01:23 +00:00
xmm.h convert many consts from #define to enum or const variables (#23) 2022-07-27 23:20:47 +03:00
xsave.cc dos2unix to all files 2022-07-30 14:31:16 +03:00