70 lines
2.7 KiB
C++
70 lines
2.7 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: ioapic.h,v 1.18 2006-03-01 22:32:24 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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extern class bx_ioapic_c bx_ioapic;
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#define BX_IOAPIC_NUM_PINS (0x18)
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// use the same version as 82093 IOAPIC (0x00170011)
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#define BX_IOAPIC_VERSION_ID (((BX_IOAPIC_NUM_PINS - 1) << 16) | 0x11)
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class bx_io_redirect_entry_t {
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Bit32u hi, lo;
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public:
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bx_io_redirect_entry_t(): hi(0), lo(0x10000) {}
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Bit8u destination() const { return (Bit8u)((hi >> 24) & APIC_ID_MASK); }
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bx_bool is_masked() const { return (bx_bool)((lo >> 16) & 1); }
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Bit8u trigger_mode() const { return (Bit8u)((lo >> 15) & 1); }
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bx_bool remote_irr() const { return (bx_bool)((lo >> 14) & 1); }
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Bit8u pin_polarity() const { return (Bit8u)((lo >> 13) & 1); }
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bx_bool delivery_status() const { return (bx_bool)((lo >> 12) & 1); }
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Bit8u destination_mode() const { return (Bit8u)((lo >> 11) & 1); }
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Bit8u delivery_mode() const { return (Bit8u)((lo >> 8) & 7); }
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Bit8u vector() const { return (Bit8u)(lo & 0xff); }
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void set_delivery_status() { lo |= (1<<12); }
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void clear_delivery_status() { lo &= ~(1<<12); }
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void set_remote_irr() { lo |= (1<<14); }
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void clear_remote_irr() { lo &= ~(1<<14); }
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Bit32u get_lo_part () const { return lo; }
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Bit32u get_hi_part () const { return hi; }
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void set_lo_part (Bit32u val_lo_part) {
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// keep high 32 bits of value, replace low 32, ignore R/O bits
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lo = val_lo_part & 0xffffafff;
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}
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void set_hi_part (Bit32u val_hi_part) {
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// keep low 32 bits of value, replace high 32
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hi = val_hi_part;
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}
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void sprintf_self (char *buf);
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};
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class bx_ioapic_c : public bx_generic_apic_c
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{
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Bit32u ioregsel; // selects between various registers
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Bit32u intin;
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// interrupt request bitmask, not visible from the outside. Bits in the
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// irr are set when trigger_irq is called, and cleared when the interrupt
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// is delivered to the processor. If an interrupt is masked, the irr
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// will still be set but delivery will not occur until it is unmasked.
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// It's not clear if this is how the real device works.
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Bit32u irr;
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public:
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bx_io_redirect_entry_t ioredtbl[BX_IOAPIC_NUM_PINS]; // table of redirections
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bx_ioapic_c ();
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~bx_ioapic_c ();
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virtual void init();
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virtual void reset(unsigned type) {}
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virtual void read_aligned(bx_phy_address address, Bit32u *data, unsigned len);
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virtual void write(bx_phy_address address, Bit32u *value, unsigned len);
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void set_irq_level(Bit8u int_in, bx_bool level);
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void receive_eoi(Bit8u vector);
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void service_ioapic(void);
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virtual bx_apic_type_t get_type() { return APIC_TYPE_IOAPIC; }
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};
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