ad072e2bc6
- new functions raise_irq() and lower_irq() - all trigger_irq() / untrigger_irq() calls are replaced by the new functions - REMARK: timer IRQ handling is not correct but it works - TODO: IOAPIC IRQ handling needs to be changed
622 lines
17 KiB
C++
622 lines
17 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: cmos.cc,v 1.16 2002-01-29 17:20:11 vruppert Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2002 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#include "bochs.h"
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#define LOG_THIS bx_cmos.
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bx_cmos_c bx_cmos;
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#if BX_USE_CMOS_SMF
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#define this (&bx_cmos)
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#endif
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// check that BX_NUM_CMOS_REGS is 64 or 128
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#if (BX_NUM_CMOS_REGS == 64)
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#elif (BX_NUM_CMOS_REGS == 128)
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#else
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#error "Invalid BX_NUM_CMOS_REGS value in config.h"
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#endif
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bx_cmos_c::bx_cmos_c(void)
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{
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put("CMOS");
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settype(CMOSLOG);
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}
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bx_cmos_c::~bx_cmos_c(void)
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{
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BX_DEBUG(("Exit."));
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}
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void
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bx_cmos_c::init(bx_devices_c *d)
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{
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unsigned i;
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BX_DEBUG(("Init $Id: cmos.cc,v 1.16 2002-01-29 17:20:11 vruppert Exp $"));
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// CMOS RAM & RTC
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BX_CMOS_THIS devices = d;
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BX_CMOS_THIS devices->register_io_read_handler(this,
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read_handler, 0x0070,
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"CMOS RAM");
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BX_CMOS_THIS devices->register_io_read_handler(this,
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read_handler,
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0x0071,
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"CMOS RAM");
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BX_CMOS_THIS devices->register_io_write_handler(this,
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write_handler,
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0x0070, "CMOS RAM");
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BX_CMOS_THIS devices->register_io_write_handler(this,
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write_handler,
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0x0071, "CMOS RAM");
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BX_CMOS_THIS devices->register_irq(8, "CMOS RTC");
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BX_CMOS_THIS s.periodic_timer_index =
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bx_pc_system.register_timer(this, periodic_timer_handler,
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1000000, 1,0); // continuous, not-active
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BX_CMOS_THIS s.one_second_timer_index =
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bx_pc_system.register_timer(this, one_second_timer_handler,
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1000000, 1,0); // continuous, not-active
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for (i=0; i<BX_NUM_CMOS_REGS; i++) {
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BX_CMOS_THIS s.reg[i] = 0;
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}
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#if BX_USE_SPECIFIED_TIME0 == 0
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// ??? this will not be correct for using an image file.
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// perhaps take values in CMOS and work backwards to find
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// s.timeval from values read in.
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BX_CMOS_THIS s.timeval = time(NULL);
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#else
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BX_CMOS_THIS s.timeval = BX_USE_SPECIFIED_TIME0;
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#endif
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if (bx_options.cmos.Otime0->get () == 1)
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BX_CMOS_THIS s.timeval = time(NULL);
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else if (bx_options.cmos.Otime0->get () != 0)
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BX_CMOS_THIS s.timeval = bx_options.cmos.Otime0->get ();
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char *tmptime;
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while( (tmptime = strdup(ctime(&(BX_CMOS_THIS s.timeval)))) == NULL) {
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BX_PANIC(("Out of memory."));
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}
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tmptime[strlen(tmptime)-1]='\0';
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BX_INFO(("Setting initial clock to: %s", tmptime));
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update_clock();
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// load CMOS from image file if requested.
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if (bx_options.cmos.OcmosImage->get ()) {
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// CMOS image file requested
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int fd, ret;
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struct stat stat_buf;
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fd = open(bx_options.cmos.Opath->getptr (), O_RDONLY
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#ifdef O_BINARY
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| O_BINARY
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#endif
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);
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if (fd < 0) {
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BX_PANIC(("trying to open cmos image file '%s'",
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bx_options.cmos.Opath->getptr ()));
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}
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ret = fstat(fd, &stat_buf);
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if (ret) {
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BX_PANIC(("CMOS: could not fstat() image file."));
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}
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if (stat_buf.st_size != BX_NUM_CMOS_REGS) {
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BX_PANIC(("CMOS: image file not same size as BX_NUM_CMOS_REGS."));
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}
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ret = ::read(fd, (bx_ptr_t) BX_CMOS_THIS s.reg, BX_NUM_CMOS_REGS);
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if (ret != BX_NUM_CMOS_REGS) {
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BX_PANIC(("CMOS: error reading cmos file."));
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}
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close(fd);
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BX_INFO(("successfuly read from image file '%s'.",
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bx_options.cmos.Opath->getptr ()));
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}
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else {
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// CMOS values generated
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BX_CMOS_THIS s.reg[0x0a] = 0x26;
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BX_CMOS_THIS s.reg[0x0b] = 0x02;
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BX_CMOS_THIS s.reg[0x0c] = 0x00;
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BX_CMOS_THIS s.reg[0x0d] = 0x80;
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#if BX_SUPPORT_FPU == 1
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BX_CMOS_THIS s.reg[0x14] = 0x02;
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#endif
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}
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}
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void
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bx_cmos_c::reset(void)
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{
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BX_CMOS_THIS s.cmos_mem_address = 0;
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// RESET affects the following registers:
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// CRA: no effects
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// CRB: bits 4,5,6 forced to 0
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// CRC: bits 4,5,6,7 forced to 0
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// CRD: no effects
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BX_CMOS_THIS s.reg[0x0b] &= 0x8f;
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BX_CMOS_THIS s.reg[0x0c] = 0;
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// One second timer for updating clock & alarm functions
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bx_pc_system.activate_timer(BX_CMOS_THIS s.one_second_timer_index,
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1000000, 1);
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// handle periodic interrupt rate select
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BX_CMOS_THIS CRA_change();
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}
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void
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bx_cmos_c::CRA_change(void)
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{
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unsigned nibble;
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// Periodic Interrupt timer
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nibble = BX_CMOS_THIS s.reg[0x0a] & 0x0f;
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if (nibble == 0) {
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// No Periodic Interrupt Rate when 0, deactivate timer
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bx_pc_system.deactivate_timer(BX_CMOS_THIS s.periodic_timer_index);
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BX_CMOS_THIS s.periodic_interval_usec = (Bit32u) -1; // max value
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}
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else {
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// values 0001b and 0010b are the same as 1000b and 1001b
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if (nibble <= 2)
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nibble += 7;
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BX_CMOS_THIS s.periodic_interval_usec = (unsigned) (1000000.0L /
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(32768.0L / (1 << (nibble - 1))));
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// if Periodic Interrupt Enable bit set, activate timer
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if ( BX_CMOS_THIS s.reg[0x0b] & 0x40 )
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bx_pc_system.activate_timer(BX_CMOS_THIS s.periodic_timer_index,
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BX_CMOS_THIS s.periodic_interval_usec, 1);
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else
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bx_pc_system.deactivate_timer(BX_CMOS_THIS s.periodic_timer_index);
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}
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}
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// static IO port read callback handler
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// redirects to non-static class handler to avoid virtual functions
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Bit32u
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bx_cmos_c::read_handler(void *this_ptr, Bit32u address, unsigned io_len)
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{
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#if !BX_USE_CMOS_SMF
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bx_cmos_c *class_ptr = (bx_cmos_c *) this_ptr;
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return( class_ptr->read(address, io_len) );
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}
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Bit32u
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bx_cmos_c::read(Bit32u address, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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#endif
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Bit8u ret8;
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if (io_len > 1)
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BX_PANIC(("io read from address %08x len=%u",
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(unsigned) address, (unsigned) io_len));
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if (bx_dbg.cmos)
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BX_INFO(("CMOS read of CMOS register 0x%x",
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(unsigned) BX_CMOS_THIS s.cmos_mem_address));
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switch (address) {
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case 0x0071:
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if (BX_CMOS_THIS s.cmos_mem_address >= BX_NUM_CMOS_REGS) {
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BX_PANIC(("unsupported cmos io read, register(0x%02x)!",
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(unsigned) BX_CMOS_THIS s.cmos_mem_address));
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}
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ret8 = BX_CMOS_THIS s.reg[BX_CMOS_THIS s.cmos_mem_address];
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// all bits of Register C are cleared after a read occurs.
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if (BX_CMOS_THIS s.cmos_mem_address == 0x0c) {
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BX_CMOS_THIS s.reg[0x0c] = 0x00;
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BX_CMOS_THIS devices->pic->lower_irq(8);
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}
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return(ret8);
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break;
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default:
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BX_PANIC(("unsupported cmos read, address=%0x%x!",
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(unsigned) address));
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return(0);
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break;
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}
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}
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// static IO port write callback handler
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// redirects to non-static class handler to avoid virtual functions
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void
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bx_cmos_c::write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
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{
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#if !BX_USE_CMOS_SMF
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bx_cmos_c *class_ptr = (bx_cmos_c *) this_ptr;
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class_ptr->write(address, value, io_len);
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}
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void
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bx_cmos_c::write(Bit32u address, Bit32u value, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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#endif // !BX_USE_CMOS_SMF
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if (io_len > 1)
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BX_PANIC(("io write to address %08x len=%u",
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(unsigned) address, (unsigned) io_len));
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if (bx_dbg.cmos)
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BX_INFO(("CMOS write to address: 0x%x = 0x%x",
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(unsigned) address, (unsigned) value));
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switch (address) {
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case 0x0070:
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#if (BX_NUM_CMOS_REGS == 64)
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BX_CMOS_THIS s.cmos_mem_address = value & 0x3F;
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#else
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BX_CMOS_THIS s.cmos_mem_address = value & 0x7F;
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#endif
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break;
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case 0x0071:
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if (BX_CMOS_THIS s.cmos_mem_address >= BX_NUM_CMOS_REGS) {
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BX_PANIC(("unsupported cmos io write, register(0x%02x)=%02x!",
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(unsigned) BX_CMOS_THIS s.cmos_mem_address, (unsigned) value));
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return;
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}
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switch (BX_CMOS_THIS s.cmos_mem_address) {
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case 0x00: // seconds
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case 0x01: // seconds alarm
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case 0x02: // minutes
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case 0x03: // minutes alarm
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case 0x04: // hours
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case 0x05: // hours alarm
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case 0x06: // day of the week
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case 0x07: // day of the month
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case 0x08: // month
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case 0x09: // year
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//BX_INFO(("write reg %02xh: value = %02xh",
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// (unsigned) BX_CMOS_THIS s.cmos_mem_address, (unsigned) value);
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BX_CMOS_THIS s.reg[BX_CMOS_THIS s.cmos_mem_address] = value;
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return;
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break;
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case 0x0a: // Control Register A
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// bit 7: Update in Progress (read-only)
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// 1 = signifies time registers will be updated within 244us
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// 0 = time registers will not occur before 244us
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// note: this bit reads 0 when CRB bit 7 is 1
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// bit 6..4: Divider Chain Control
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// 000 oscillator disabled
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// 001 oscillator disabled
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// 010 Normal operation
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// 011 TEST
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// 100 TEST
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// 101 TEST
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// 110 Divider Chain RESET
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// 111 Divider Chain RESET
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// bit 3..0: Periodic Interrupt Rate Select
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// 0000 None
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// 0001 3.90625 ms
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// 0010 7.8125 ms
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// 0011 122.070 us
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// 0100 244.141 us
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// 0101 488.281 us
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// 0110 976.562 us
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// 0111 1.953125 ms
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// 1000 3.90625 ms
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// 1001 7.8125 ms
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// 1010 15.625 ms
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// 1011 31.25 ms
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// 1100 62.5 ms
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// 1101 125 ms
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// 1110 250 ms
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// 1111 500 ms
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unsigned dcc;
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dcc = (value >> 4) & 0x07;
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if (dcc != 0x02) {
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BX_PANIC(("CRA: divider chain control 0x%x", dcc));
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}
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BX_CMOS_THIS s.reg[0x0a] = value & 0x7f;
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BX_CMOS_THIS CRA_change();
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return;
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break;
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case 0x0b: // Control Register B
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// bit 0: Daylight Savings Enable
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// 1 = enable daylight savings
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// 0 = disable daylight savings
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// bit 1: 24/12 houre mode
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// 1 = 24 hour format
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// 0 = 12 hour format
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// bit 2: Data Mode
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// 1 = binary format
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// 0 = BCD format
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// bit 3: "square wave enable"
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// Not supported and always read as 0
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// bit 4: Update Ended Interrupt Enable
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// 1 = enable generation of update ended interrupt
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// 0 = disable
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// bit 5: Alarm Interrupt Enable
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// 1 = enable generation of alarm interrupt
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// 0 = disable
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// bit 6: Periodic Interrupt Enable
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// 1 = enable generation of periodic interrupt
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// 0 = disable
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// bit 7: Set mode
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// 1 = user copy of time is "frozen" allowing time registers
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// to be accessed without regard for an occurance of an update
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// 0 = time updates occur normally
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// can not handle binary or 12-hour mode yet.
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if (value & 0x04)
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BX_PANIC(("write status reg B, binary format enabled."));
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if ( !(value & 0x02) )
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BX_PANIC(("write status reg B, 12 hour mode enabled."));
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value &= 0xf7; // bit3 always 0
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// Note: setting bit 7 clears bit 4
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if (value & 0x80)
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value &= 0xef;
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unsigned prev_CRB;
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prev_CRB = BX_CMOS_THIS s.reg[0x0b];
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BX_CMOS_THIS s.reg[0x0b] = value;
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if ( (prev_CRB & 0x40) != (value & 0x40) ) {
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// Periodic Interrupt Enabled changed
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if (prev_CRB & 0x40) {
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// transition from 1 to 0, deactivate timer
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bx_pc_system.deactivate_timer(
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BX_CMOS_THIS s.periodic_timer_index);
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}
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else {
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// transition from 0 to 1
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// if rate select is not 0, activate timer
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if ( (BX_CMOS_THIS s.reg[0x0a] & 0x0f) != 0 ) {
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bx_pc_system.activate_timer(
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BX_CMOS_THIS s.periodic_timer_index,
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BX_CMOS_THIS s.periodic_interval_usec, 1);
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}
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}
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}
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return;
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break;
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case 0x0c: // Control Register C
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case 0x0d: // Control Register D
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BX_ERROR(("write to control register 0x%x (read-only)",
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BX_CMOS_THIS s.cmos_mem_address));
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break;
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case 0x0e: // diagnostic status
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BX_DEBUG(("write register 0Eh: %02x", (unsigned) value));;
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break;
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case 0x0f: // shutdown status
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switch (value) {
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case 0x00: /* proceed with normal POST (soft reset) */
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BX_DEBUG(("Reg 0F set to 0: shutdown action = normal POST"));;
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break;
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case 0x02: /* shutdown after memory test */
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BX_DEBUG(("Reg 0Fh: request to change shutdown action"
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" to shutdown after memory test"));
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break;
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case 0x03:
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BX_DEBUG(("Reg 0Fh(03) : Shutdown after memory test !"));;
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break;
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case 0x04: /* jump to disk bootstrap routine */
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BX_DEBUG(("Reg 0Fh: request to change shutdown action "
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"to jump to disk bootstrap routine."));
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break;
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case 0x06:
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BX_DEBUG(("Reg 0Fh(06) : Shutdown after memory test !"));;
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break;
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case 0x09: /* return to BIOS extended memory block move
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(interrupt 15h, func 87h was in progress) */
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BX_DEBUG(("Reg 0Fh: request to change shutdown action "
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"to return to BIOS extended memory block move."));
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break;
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case 0x0a: /* jump to DWORD pointer at 40:67 */
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BX_DEBUG(("Reg 0Fh: request to change shutdown action"
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" to jump to DWORD at 40:67"));
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break;
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default:
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BX_PANIC(("unsupported cmos io write to reg F, case %x!",
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(unsigned) value));
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break;
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}
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break;
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default:
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BX_DEBUG(("write reg %02xh: value = %02xh",
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(unsigned) BX_CMOS_THIS s.cmos_mem_address, (unsigned) value));
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break;
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}
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BX_CMOS_THIS s.reg[BX_CMOS_THIS s.cmos_mem_address] = value;
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break;
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}
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}
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void
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bx_cmos_c::checksum_cmos(void)
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{
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unsigned i;
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Bit16u sum;
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sum = 0;
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for (i=0x10; i<=0x2d; i++) {
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sum += BX_CMOS_THIS s.reg[i];
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}
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BX_CMOS_THIS s.reg[0x2e] = (sum >> 8) & 0xff; /* checksum high */
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BX_CMOS_THIS s.reg[0x2f] = (sum & 0xff); /* checksum low */
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}
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void
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bx_cmos_c::periodic_timer_handler(void *this_ptr)
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{
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bx_cmos_c *class_ptr = (bx_cmos_c *) this_ptr;
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class_ptr->periodic_timer();
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}
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void
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bx_cmos_c::periodic_timer()
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{
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// if periodic interrupts are enabled, trip IRQ 8, and
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// update status register C
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if (BX_CMOS_THIS s.reg[0x0b] & 0x40) {
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BX_CMOS_THIS s.reg[0x0c] |= 0xc0; // Interrupt Request, Periodic Int
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BX_CMOS_THIS devices->pic->raise_irq(8);
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}
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}
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void
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bx_cmos_c::one_second_timer_handler(void *this_ptr)
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{
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bx_cmos_c *class_ptr = (bx_cmos_c *) this_ptr;
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class_ptr->one_second_timer();
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}
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void
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bx_cmos_c::one_second_timer()
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{
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// update internal time/date buffer
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BX_CMOS_THIS s.timeval++;
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// Dont update CMOS user copy of time/date if CRB bit7 is 1
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// Nothing else do to
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if (BX_CMOS_THIS s.reg[0x0b] & 0x80)
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return;
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update_clock();
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// if update interrupts are enabled, trip IRQ 8, and
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// update status register C
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if (BX_CMOS_THIS s.reg[0x0b] & 0x10) {
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BX_CMOS_THIS s.reg[0x0c] |= 0x90; // Interrupt Request, Update Ended
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BX_CMOS_THIS devices->pic->raise_irq(8);
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}
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// compare CMOS user copy of time/date to alarm time/date here
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if (BX_CMOS_THIS s.reg[0x0b] & 0x20) {
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// Alarm interrupts enabled
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Boolean alarm_match = 1;
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if ( (BX_CMOS_THIS s.reg[0x01] & 0xc0) != 0xc0 ) {
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// seconds alarm not in dont care mode
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if (BX_CMOS_THIS s.reg[0x00] != BX_CMOS_THIS s.reg[0x01])
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alarm_match = 0;
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}
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if ( (BX_CMOS_THIS s.reg[0x03] & 0xc0) != 0xc0 ) {
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// minutes alarm not in dont care mode
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if (BX_CMOS_THIS s.reg[0x02] != BX_CMOS_THIS s.reg[0x03])
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alarm_match = 0;
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}
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if ( (BX_CMOS_THIS s.reg[0x05] & 0xc0) != 0xc0 ) {
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// hours alarm not in dont care mode
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if (BX_CMOS_THIS s.reg[0x04] != BX_CMOS_THIS s.reg[0x05])
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alarm_match = 0;
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}
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if (alarm_match) {
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BX_CMOS_THIS s.reg[0x0c] |= 0xa0; // Interrupt Request, Alarm Int
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BX_CMOS_THIS devices->pic->raise_irq(8);
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}
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}
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}
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void
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bx_cmos_c::update_clock()
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{
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struct tm *time_calendar;
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unsigned year, month, day, century;
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Bit8u val_bcd;
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time_calendar = localtime(& BX_CMOS_THIS s.timeval);
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// update seconds
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val_bcd =
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((time_calendar->tm_sec / 10) << 4) |
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(time_calendar->tm_sec % 10);
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BX_CMOS_THIS s.reg[0x00] = val_bcd;
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// update minutes
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val_bcd =
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((time_calendar->tm_min / 10) << 4) |
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(time_calendar->tm_min % 10);
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BX_CMOS_THIS s.reg[0x02] = val_bcd;
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// update hours
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val_bcd =
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((time_calendar->tm_hour / 10) << 4) |
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(time_calendar->tm_hour % 10);
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BX_CMOS_THIS s.reg[0x04] = val_bcd;
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// update day of the week
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day = time_calendar->tm_wday + 1; // 0..6 to 1..7
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BX_CMOS_THIS s.reg[0x06] = ((day / 10) << 4) | (day % 10);
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// update day of the month
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day = time_calendar->tm_mday;
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BX_CMOS_THIS s.reg[0x07] = ((day / 10) << 4) | (day % 10);
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// update month
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month = time_calendar->tm_mon + 1;
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BX_CMOS_THIS s.reg[0x08] = ((month / 10) << 4) | (month % 10);
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// update year
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year = time_calendar->tm_year % 100;
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BX_CMOS_THIS s.reg[0x09] = ((year / 10) << 4) | (year % 10);
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// update century
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century = (time_calendar->tm_year / 100) + 19;
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BX_CMOS_THIS s.reg[0x32] = ((century / 10) << 4) | (century % 10);
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}
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