7fdc7303c2
Some devices already had one. Some I had to add an empty one. I did a little cleaning of init() methods to make them more uniform but generally I left them alone. - I also put these exact diffs into a patch "patch.iodev-add-reset" in case I want to revert these changes for some reason, for example if they break an old patch. It should be deleted after a while.
135 lines
3.2 KiB
C++
135 lines
3.2 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: pit82c54.h,v 1.11 2002-08-27 19:54:46 bdenney Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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/*
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* Emulator of an Intel 8254/82C54 Programmable Interval Timer.
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* Greg Alexander <yakovlev@usa.com>
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*
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* This code is not yet linked into Bochs, but has been included so
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* that you can experiment with it. (bbd)
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*/
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#ifndef _PIT_82C54_H_
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#define _PIT_82C54_H_ 1
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#include "bochs.h"
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class pit_82C54 : public logfunctions {
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public:
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//Please do not use these. They are public because they have to be
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// to compile on some platforms. They are not to be used by other
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// classes.
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enum rw_status {
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LSByte=0,
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MSByte=1,
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LSByte_multiple=2,
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MSByte_multiple=3
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};
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private:
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enum {
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MAX_COUNTER=2,
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MAX_ADDRESS=3,
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CONTROL_ADDRESS=3,
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MAX_MODE=5
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};
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enum real_RW_status {
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LSB_real=1,
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MSB_real=2,
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BOTH_real=3
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};
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enum problem_type {
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UNL_2P_READ=1
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};
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struct counter_type {
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//Chip IOs;
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bool GATE; //GATE Input value at end of cycle
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bool OUTpin; //OUT output this cycle
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//Architected state;
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Bit32u count; //Counter value this cycle
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Bit16u outlatch; //Output latch this cycle
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Bit16u inlatch; //Input latch this cycle
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Bit8u status_latch;
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//Status Register data;
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Bit8u rw_mode; //2-bit R/W mode from command word register.
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Bit8u mode; //3-bit mode from command word register.
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bool bcd_mode; //1-bit BCD vs. Binary setting.
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bool null_count; //Null count bit of status register.
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//Latch status data;
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bool count_LSB_latched;
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bool count_MSB_latched;
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bool status_latched;
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//Miscelaneous State;
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Bit32u count_binary; //Value of the count in binary.
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bool triggerGATE; //Whether we saw GATE rise this cycle.
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rw_status write_state; //Read state this cycle
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rw_status read_state; //Read state this cycle
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bool count_written; //Whether a count written since programmed
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bool first_pass; //Whether or not this is the first loaded count.
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bool state_bit_1; //Miscelaneous state bits.
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bool state_bit_2;
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Bit32u next_change_time; //Next time something besides count changes.
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//0 means never.
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};
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counter_type counter[3];
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Bit8u controlword;
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int seen_problems;
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void latch_counter(counter_type & thisctr);
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void set_OUT (counter_type & thisctr, bool data);
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void set_count (counter_type & thisctr, Bit32u data);
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void set_count_to_binary (counter_type & thisctr);
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void set_binary_to_count (counter_type & thisctr);
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void decrement (counter_type & thisctr);
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void decrement_multiple(counter_type & thisctr, Bit32u cycles);
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void clock(Bit8u cnum);
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void print_counter(counter_type & thisctr);
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public:
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void init (void);
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void reset (unsigned type);
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pit_82C54 (void);
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void clock_all(Bit32u cycles);
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void clock_multiple(Bit8u cnum, Bit32u cycles);
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Bit8u read(Bit8u address);
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void write(Bit8u address, Bit8u data);
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void set_GATE(Bit8u cnum, bool data);
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bool read_GATE(Bit8u cnum);
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bool read_OUT(Bit8u cnum);
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Bit32u get_clock_event_time(Bit8u cnum);
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Bit32u get_next_event_time(void);
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void print_cnum(Bit8u cnum);
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};
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#endif
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