438 lines
17 KiB
C
438 lines
17 KiB
C
/*---------------------------------------------------------------------------+
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| fpu_entry.c |
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| $Id: fpu_entry.c,v 1.8 2003-04-22 20:21:33 sshwarts Exp $
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| The entry functions for wm-FPU-emu |
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| |
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| Copyright (C) 1992,1993,1994,1996,1997 |
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| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia |
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| E-mail billm@suburbia.net |
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| |
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| See the files "README" and "COPYING" for further copyright and warranty |
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| information. |
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+---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------+
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| Note: |
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| The file contains code which accesses user memory. |
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| Emulator static data may change when user memory is accessed, due to |
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| other processes using the emulator while swapping is in progress. |
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+---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------+
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| math_emulate(), restore_i387_soft() and save_i387_soft() are the only |
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| entry points for wm-FPU-emu. |
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+---------------------------------------------------------------------------*/
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#include "fpu_system.h"
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#include "fpu_emu.h"
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#include "exception.h"
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#include "control_w.h"
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#include "status_w.h"
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#include <linux/signal.h>
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#include <asm/desc.h>
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#define __BAD__ FPU_illegal /* Illegal on an 80486, causes SIGILL */
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#ifndef NO_UNDOC_CODE /* Un-documented FPU op-codes supported by default. */
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/* WARNING: These codes are not documented by Intel in their 80486 manual
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and may not work on FPU clones or later Intel FPUs. */
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/* Changes to support the un-doc codes provided by Linus Torvalds. */
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#define _d9_d8_ fstp_i /* unofficial code (19) */
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#define _dc_d0_ fcom_st /* unofficial code (14) */
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#define _dc_d8_ fcompst /* unofficial code (1c) */
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#define _dd_c8_ fxch_i /* unofficial code (0d) */
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#define _de_d0_ fcompst /* unofficial code (16) */
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#define _df_c0_ ffreep /* unofficial code (07) ffree + pop */
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#define _df_c8_ fxch_i /* unofficial code (0f) */
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#define _df_d0_ fstp_i /* unofficial code (17) */
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#define _df_d8_ fstp_i /* unofficial code (1f) */
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static FUNC const st_instr_table[64] = {
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fadd__, fld_i_, __BAD__, __BAD__, fadd_i, ffree_, faddp_, _df_c0_,
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fmul__, fxch_i, __BAD__, __BAD__, fmul_i, _dd_c8_, fmulp_, _df_c8_,
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fcom_st, fp_nop, __BAD__, __BAD__, _dc_d0_, fst_i_, _de_d0_, _df_d0_,
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fcompst, _d9_d8_, __BAD__, __BAD__, _dc_d8_, fstp_i, fcompp, _df_d8_,
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fsub__, FPU_etc, __BAD__, finit_, fsubri, fucom_, fsubrp, fstsw_,
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fsubr_, fconst, fucompp, __BAD__, fsub_i, fucomp, fsubp_, __BAD__,
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fdiv__, FPU_triga, __BAD__, __BAD__, fdivri, __BAD__, fdivrp, __BAD__,
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fdivr_, FPU_trigb, __BAD__, __BAD__, fdiv_i, __BAD__, fdivp_, __BAD__,
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};
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#else /* Support only documented FPU op-codes */
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static FUNC const st_instr_table[64] = {
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fadd__, fld_i_, __BAD__, __BAD__, fadd_i, ffree_, faddp_, __BAD__,
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fmul__, fxch_i, __BAD__, __BAD__, fmul_i, __BAD__, fmulp_, __BAD__,
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fcom_st, fp_nop, __BAD__, __BAD__, __BAD__, fst_i_, __BAD__, __BAD__,
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fcompst, __BAD__, __BAD__, __BAD__, __BAD__, fstp_i, fcompp, __BAD__,
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fsub__, FPU_etc, __BAD__, finit_, fsubri, fucom_, fsubrp, fstsw_,
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fsubr_, fconst, fucompp, __BAD__, fsub_i, fucomp, fsubp_, __BAD__,
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fdiv__, FPU_triga, __BAD__, __BAD__, fdivri, __BAD__, fdivrp, __BAD__,
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fdivr_, FPU_trigb, __BAD__, __BAD__, fdiv_i, __BAD__, fdivp_, __BAD__,
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};
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#endif /* NO_UNDOC_CODE */
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#define _NONE_ 0 /* Take no special action */
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#define _REG0_ 1 /* Need to check for not empty st(0) */
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#define _REGI_ 2 /* Need to check for not empty st(0) and st(rm) */
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#define _REGi_ 0 /* Uses st(rm) */
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#define _PUSH_ 3 /* Need to check for space to push onto stack */
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#define _null_ 4 /* Function illegal or not implemented */
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#define _REGIi 5 /* Uses st(0) and st(rm), result to st(rm) */
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#define _REGIp 6 /* Uses st(0) and st(rm), result to st(rm) then pop */
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#define _REGIc 0 /* Compare st(0) and st(rm) */
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#define _REGIn 0 /* Uses st(0) and st(rm), but handle checks later */
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#ifndef NO_UNDOC_CODE
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/* Un-documented FPU op-codes supported by default. (see above) */
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static u_char const type_table[64] = {
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_REGI_, _NONE_, _null_, _null_, _REGIi, _REGi_, _REGIp, _REGi_,
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_REGI_, _REGIn, _null_, _null_, _REGIi, _REGI_, _REGIp, _REGI_,
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_REGIc, _NONE_, _null_, _null_, _REGIc, _REG0_, _REGIc, _REG0_,
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_REGIc, _REG0_, _null_, _null_, _REGIc, _REG0_, _REGIc, _REG0_,
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_REGI_, _NONE_, _null_, _NONE_, _REGIi, _REGIc, _REGIp, _NONE_,
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_REGI_, _NONE_, _REGIc, _null_, _REGIi, _REGIc, _REGIp, _null_,
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_REGI_, _NONE_, _null_, _null_, _REGIi, _null_, _REGIp, _null_,
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_REGI_, _NONE_, _null_, _null_, _REGIi, _null_, _REGIp, _null_
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};
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#else /* Support only documented FPU op-codes */
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static u_char const type_table[64] = {
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_REGI_, _NONE_, _null_, _null_, _REGIi, _REGi_, _REGIp, _null_,
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_REGI_, _REGIn, _null_, _null_, _REGIi, _null_, _REGIp, _null_,
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_REGIc, _NONE_, _null_, _null_, _null_, _REG0_, _null_, _null_,
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_REGIc, _null_, _null_, _null_, _null_, _REG0_, _REGIc, _null_,
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_REGI_, _NONE_, _null_, _NONE_, _REGIi, _REGIc, _REGIp, _NONE_,
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_REGI_, _NONE_, _REGIc, _null_, _REGIi, _REGIc, _REGIp, _null_,
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_REGI_, _NONE_, _null_, _null_, _REGIi, _null_, _REGIp, _null_,
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_REGI_, _NONE_, _null_, _null_, _REGIi, _null_, _REGIp, _null_
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};
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#endif /* NO_UNDOC_CODE */
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/* Note, this is a version of fpu_entry.c, modified to interface
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* to a CPU simulator, rather than a kernel.
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*
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* Ported by Kevin Lawton Sep 20, 1999
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*/
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asmlinkage void
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math_emulate(fpu_addr_modes addr_modes,
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u_char FPU_modrm,
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u_char byte1,
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void *data_address,
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struct address data_sel_off,
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struct address entry_sel_off)
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{
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u16 code;
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int unmasked;
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FPU_REG loaded_data;
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FPU_REG *st0_ptr;
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u_char loaded_tag, st0_tag;
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// assuming byte is 0xd8..0xdf or 0xdb==FWAIT
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// lock is not a valid prefix for FPU instructions, +++
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// let the cpu handle it to generate a SIGILL.
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no_ip_update = 0;
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if ( byte1 == FWAIT_OPCODE ) {
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if (partial_status & SW_Summary)
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goto do_the_FPU_interrupt;
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else
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goto FPU_fwait_done;
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}
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if (partial_status & SW_Summary) {
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/* Ignore the error for now if the current instruction is a no-wait
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control instruction */
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/* The 80486 manual contradicts itself on this topic,
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but a real 80486 uses the following instructions:
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fninit, fnstenv, fnsave, fnstsw, fnstenv, fnclex.
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*/
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code = (FPU_modrm << 8) | byte1;
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if ( ! ( (((code & 0xf803) == 0xe003) || /* fnclex, fninit, fnstsw */
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(((code & 0x3003) == 0x3001) && /* fnsave, fnstcw, fnstenv,
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fnstsw */
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((code & 0xc000) != 0xc000))) ) ) {
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/*
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* We need to simulate the action of the kernel to FPU
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* interrupts here.
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*/
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do_the_FPU_interrupt:
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math_abort(FPU_info, SIGFPE);
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}
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}
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entry_sel_off.opcode = (byte1 << 8) | FPU_modrm;
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FPU_rm = FPU_modrm & 7;
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if ( FPU_modrm < 0300 ) {
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/* All of these instructions use the mod/rm byte to get a data address */
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if ( !(byte1 & 1) ) {
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u16 status1 = partial_status;
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st0_ptr = &st(0);
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st0_tag = FPU_gettag0();
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/* Stack underflow has priority */
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if ( NOT_EMPTY_ST0 ) {
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#ifndef USE_WITH_CPU_SIM
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/* memory access limits checked in FPU_verify_area */
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if ( addr_modes.default_mode & PROTECTED )
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{
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/* This table works for 16 and 32 bit protected mode */
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if ( access_limit < data_sizes_16[(byte1 >> 1) & 3] )
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math_abort(FPU_info, SIGSEGV);
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}
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#endif
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unmasked = 0; /* Do this here to stop compiler warnings. */
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switch ( (byte1 >> 1) & 3 )
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{
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case 0:
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unmasked = FPU_load_single((float *)data_address,
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&loaded_data);
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loaded_tag = unmasked & 0xff;
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unmasked &= ~0xff;
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break;
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case 1:
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loaded_tag = FPU_load_int32((s32 *)data_address, &loaded_data); // bbd: was (u32 *)
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break;
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case 2:
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unmasked = FPU_load_double((double *)data_address,
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&loaded_data);
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loaded_tag = unmasked & 0xff;
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unmasked &= ~0xff;
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break;
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case 3:
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default: /* Used here to suppress gcc warnings. */
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loaded_tag = FPU_load_int16((s16 *)data_address, &loaded_data);
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break;
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}
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/* No more access to user memory, it is safe
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to use static data now */
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/* NaN operands have the next priority. */
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/* We have to delay looking at st(0) until after
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loading the data, because that data might contain an SNaN */
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if ( ((st0_tag == TAG_Special) && isNaN(st0_ptr)) ||
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((loaded_tag == TAG_Special) && isNaN(&loaded_data)) )
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{
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/* Restore the status word; we might have loaded a
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denormal. */
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partial_status = status1;
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if ( (FPU_modrm & 0x30) == 0x10 )
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{
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/* fcom or fcomp */
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EXCEPTION(EX_Invalid);
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setcc(SW_C3 | SW_C2 | SW_C0);
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if ( (FPU_modrm & 0x08) && (control_word & CW_Invalid) )
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FPU_pop(); /* fcomp, masked, so we pop. */
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}
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else
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{
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if ( loaded_tag == TAG_Special )
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loaded_tag = FPU_Special(&loaded_data);
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#ifdef PECULIAR_486
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/* This is not really needed, but gives behaviour
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identical to an 80486 */
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if ( (FPU_modrm & 0x28) == 0x20 )
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/* fdiv or fsub */
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real_2op_NaN(&loaded_data, loaded_tag, 0, &loaded_data);
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else
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#endif /* PECULIAR_486 */
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/* fadd, fdivr, fmul, or fsubr */
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real_2op_NaN(&loaded_data, loaded_tag, 0, st0_ptr);
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}
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goto reg_mem_instr_done;
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}
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if ( unmasked && !((FPU_modrm & 0x30) == 0x10) )
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{
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/* Is not a comparison instruction. */
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if ( (FPU_modrm & 0x38) == 0x38 )
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{
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/* fdivr */
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if ( (st0_tag == TAG_Zero) &&
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((loaded_tag == TAG_Valid)
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|| (loaded_tag == TAG_Special
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&& isdenormal(&loaded_data))) )
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{
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if ( FPU_divide_by_zero(0, getsign(&loaded_data))
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< 0 )
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{
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/* We use the fact here that the unmasked
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exception in the loaded data was for a
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denormal operand */
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/* Restore the state of the denormal op bit */
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partial_status &= ~SW_Denorm_Op;
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partial_status |= status1 & SW_Denorm_Op;
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}
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else
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setsign(st0_ptr, getsign(&loaded_data));
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}
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}
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goto reg_mem_instr_done;
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}
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switch ( (FPU_modrm >> 3) & 7 )
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{
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case 0: /* fadd */
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clear_C1();
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FPU_add(&loaded_data, loaded_tag, 0, control_word);
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break;
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case 1: /* fmul */
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clear_C1();
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FPU_mul(&loaded_data, loaded_tag, 0, control_word);
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break;
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case 2: /* fcom */
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FPU_compare_st_data(&loaded_data, loaded_tag);
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break;
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case 3: /* fcomp */
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// bbd: used to typecase to int first, but this corrupted the
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// pointer on 64 bit machines.
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if ( !FPU_compare_st_data(&loaded_data, loaded_tag)
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&& !unmasked )
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FPU_pop();
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break;
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case 4: /* fsub */
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clear_C1();
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FPU_sub(LOADED|loaded_tag, &loaded_data, control_word);
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break;
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case 5: /* fsubr */
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clear_C1();
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FPU_sub(REV|LOADED|loaded_tag, &loaded_data, control_word);
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break;
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case 6: /* fdiv */
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clear_C1();
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FPU_div(LOADED|loaded_tag, &loaded_data, control_word);
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break;
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case 7: /* fdivr */
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clear_C1();
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if ( st0_tag == TAG_Zero )
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partial_status = status1; /* Undo any denorm tag,
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zero-divide has priority. */
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FPU_div(REV|LOADED|loaded_tag, &loaded_data, control_word);
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break;
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}
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}
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else
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{
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if ( (FPU_modrm & 0x30) == 0x10 )
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{
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/* The instruction is fcom or fcomp */
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EXCEPTION(EX_StackUnder);
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setcc(SW_C3 | SW_C2 | SW_C0);
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if ( (FPU_modrm & 0x08) && (control_word & CW_Invalid) )
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FPU_pop(); /* fcomp */
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}
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else
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FPU_stack_underflow();
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}
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reg_mem_instr_done:
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operand_address = data_sel_off;
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}
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else {
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if ( !(no_ip_update =
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FPU_load_store(((FPU_modrm & 0x38) | (byte1 & 6)) >> 1,
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addr_modes, data_address)) )
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{
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operand_address = data_sel_off;
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}
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}
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}
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else {
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/* None of these instructions access user memory */
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u_char instr_index = (FPU_modrm & 0x38) | (byte1 & 7);
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#ifdef PECULIAR_486
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/* This is supposed to be undefined, but a real 80486 seems
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to do this: */
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operand_address.offset = 0;
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operand_address.selector = FPU_DS;
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#endif /* PECULIAR_486 */
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st0_ptr = &st(0);
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st0_tag = FPU_gettag0();
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switch ( type_table[(int) instr_index] )
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{
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case _NONE_: /* also _REGIc: _REGIn */
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break;
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case _REG0_:
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if ( !NOT_EMPTY_ST0 )
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{
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FPU_stack_underflow();
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goto FPU_instruction_done;
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}
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break;
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case _REGIi:
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if ( !NOT_EMPTY_ST0 || !NOT_EMPTY(FPU_rm) )
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{
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FPU_stack_underflow_i(FPU_rm);
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goto FPU_instruction_done;
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}
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break;
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case _REGIp:
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if ( !NOT_EMPTY_ST0 || !NOT_EMPTY(FPU_rm) )
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{
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FPU_stack_underflow_pop(FPU_rm);
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goto FPU_instruction_done;
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}
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break;
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case _REGI_:
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if ( !NOT_EMPTY_ST0 || !NOT_EMPTY(FPU_rm) )
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{
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FPU_stack_underflow();
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goto FPU_instruction_done;
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}
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break;
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case _PUSH_: /* Only used by the fld st(i) instruction */
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break;
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case _null_:
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FPU_illegal();
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goto FPU_instruction_done;
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default:
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EXCEPTION(EX_INTERNAL|0x111);
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goto FPU_instruction_done;
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}
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(*st_instr_table[(int) instr_index])();
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FPU_instruction_done:
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;
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}
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if ( ! no_ip_update )
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instruction_address = entry_sel_off;
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FPU_fwait_done:
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#ifdef DEBUG
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FPU_printall();
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#endif /* DEBUG */
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#ifdef BX_NO_BLANK_LABELS
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if(0);
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#endif
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}
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