5873b26a82
bochs.h already not include iodev.h which reduces compilation dependences for almost all cpu and fpu files, now cpu files will not be recompiled if iodev includes was changed
298 lines
8.4 KiB
C++
298 lines
8.4 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: pci2isa.cc,v 1.12 2004-06-19 15:20:13 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2002 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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//
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// i440FX Support - PCI-to-ISA bridge (PIIX3)
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//
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// Define BX_PLUGGABLE in files that can be compiled into plugins. For
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// platforms that require a special tag on exported symbols, BX_PLUGGABLE
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// is used to know when we are exporting symbols and when we are importing.
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#define BX_PLUGGABLE
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#include "iodev.h"
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#if BX_PCI_SUPPORT
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#define LOG_THIS thePci2IsaBridge->
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bx_pci2isa_c *thePci2IsaBridge = NULL;
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int
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libpci2isa_LTX_plugin_init(plugin_t *plugin, plugintype_t type, int argc, char *argv[])
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{
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thePci2IsaBridge = new bx_pci2isa_c ();
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bx_devices.pluginPci2IsaBridge = thePci2IsaBridge;
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BX_REGISTER_DEVICE_DEVMODEL(plugin, type, thePci2IsaBridge, BX_PLUGIN_PCI2ISA);
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return(0); // Success
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}
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void
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libpci2isa_LTX_plugin_fini(void)
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{
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}
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bx_pci2isa_c::bx_pci2isa_c(void)
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{
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put("P2I");
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settype(PCI2ISALOG);
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}
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bx_pci2isa_c::~bx_pci2isa_c(void)
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{
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// nothing for now
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BX_DEBUG(("Exit."));
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}
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void
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bx_pci2isa_c::init(void)
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{
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// called once when bochs initializes
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DEV_register_pci_handlers(this, pci_read_handler, pci_write_handler,
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BX_PCI_DEVICE(1,0), "PIIX3 PCI-to-ISA bridge");
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DEV_register_iowrite_handler(this, write_handler, 0x00B2, "PIIX3 PCI-to-ISA bridge", 1);
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DEV_register_iowrite_handler(this, write_handler, 0x00B3, "PIIX3 PCI-to-ISA bridge", 1);
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DEV_register_iowrite_handler(this, write_handler, 0x04D0, "PIIX3 PCI-to-ISA bridge", 1);
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DEV_register_iowrite_handler(this, write_handler, 0x04D1, "PIIX3 PCI-to-ISA bridge", 1);
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DEV_register_iowrite_handler(this, write_handler, 0x0CF9, "PIIX3 PCI-to-ISA bridge", 1);
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DEV_register_ioread_handler(this, read_handler, 0x00B2, "PIIX3 PCI-to-ISA bridge", 1);
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DEV_register_ioread_handler(this, read_handler, 0x00B3, "PIIX3 PCI-to-ISA bridge", 1);
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DEV_register_ioread_handler(this, read_handler, 0x04D0, "PIIX3 PCI-to-ISA bridge", 1);
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DEV_register_ioread_handler(this, read_handler, 0x04D1, "PIIX3 PCI-to-ISA bridge", 1);
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DEV_register_ioread_handler(this, read_handler, 0x0CF9, "PIIX3 PCI-to-ISA bridge", 1);
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for (unsigned i=0; i<256; i++)
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BX_P2I_THIS s.pci_conf[i] = 0x0;
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// readonly registers
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BX_P2I_THIS s.pci_conf[0x00] = 0x86;
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BX_P2I_THIS s.pci_conf[0x01] = 0x80;
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BX_P2I_THIS s.pci_conf[0x02] = 0x00;
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BX_P2I_THIS s.pci_conf[0x03] = 0x70;
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BX_P2I_THIS s.pci_conf[0x0a] = 0x01;
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BX_P2I_THIS s.pci_conf[0x0b] = 0x06;
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BX_P2I_THIS s.pci_conf[0x0e] = 0x80;
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}
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void
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bx_pci2isa_c::reset(unsigned type)
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{
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BX_P2I_THIS s.pci_conf[0x04] = 0x07;
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BX_P2I_THIS s.pci_conf[0x05] = 0x00;
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BX_P2I_THIS s.pci_conf[0x06] = 0x00;
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BX_P2I_THIS s.pci_conf[0x07] = 0x02;
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BX_P2I_THIS s.pci_conf[0x4c] = 0x4d;
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BX_P2I_THIS s.pci_conf[0x4e] = 0x03;
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BX_P2I_THIS s.pci_conf[0x4f] = 0x00;
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BX_P2I_THIS s.pci_conf[0x60] = 0x80;
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BX_P2I_THIS s.pci_conf[0x61] = 0x80;
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BX_P2I_THIS s.pci_conf[0x62] = 0x80;
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BX_P2I_THIS s.pci_conf[0x63] = 0x80;
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BX_P2I_THIS s.pci_conf[0x69] = 0x02;
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BX_P2I_THIS s.pci_conf[0x70] = 0x80;
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BX_P2I_THIS s.pci_conf[0x76] = 0x0c;
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BX_P2I_THIS s.pci_conf[0x77] = 0x0c;
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BX_P2I_THIS s.pci_conf[0x78] = 0x02;
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BX_P2I_THIS s.pci_conf[0x79] = 0x00;
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BX_P2I_THIS s.pci_conf[0x80] = 0x00;
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BX_P2I_THIS s.pci_conf[0x82] = 0x00;
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BX_P2I_THIS s.pci_conf[0xa0] = 0x08;
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BX_P2I_THIS s.pci_conf[0xa0] = 0x08;
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BX_P2I_THIS s.pci_conf[0xa2] = 0x00;
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BX_P2I_THIS s.pci_conf[0xa3] = 0x00;
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BX_P2I_THIS s.pci_conf[0xa4] = 0x00;
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BX_P2I_THIS s.pci_conf[0xa5] = 0x00;
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BX_P2I_THIS s.pci_conf[0xa6] = 0x00;
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BX_P2I_THIS s.pci_conf[0xa7] = 0x00;
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BX_P2I_THIS s.pci_conf[0xa8] = 0x0f;
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BX_P2I_THIS s.pci_conf[0xaa] = 0x00;
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BX_P2I_THIS s.pci_conf[0xab] = 0x00;
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BX_P2I_THIS s.pci_conf[0xac] = 0x00;
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BX_P2I_THIS s.pci_conf[0xae] = 0x00;
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BX_P2I_THIS s.elcr1 = 0x00;
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BX_P2I_THIS s.elcr2 = 0x00;
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}
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// static IO port read callback handler
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// redirects to non-static class handler to avoid virtual functions
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Bit32u
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bx_pci2isa_c::read_handler(void *this_ptr, Bit32u address, unsigned io_len)
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{
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#if !BX_USE_P2I_SMF
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bx_pci2isa_c *class_ptr = (bx_pci2isa_c *) this_ptr;
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return( class_ptr->read(address, io_len) );
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}
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Bit32u
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bx_pci2isa_c::read(Bit32u address, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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#endif // !BX_USE_P2I_SMF
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switch (address) {
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case 0x00b2:
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BX_ERROR(("read: APM command register not supported yet"));
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break;
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case 0x00b3:
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BX_ERROR(("read: APM status register not supported yet"));
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break;
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case 0x04d0:
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return(BX_P2I_THIS s.elcr1);
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break;
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case 0x04d1:
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return(BX_P2I_THIS s.elcr2);
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break;
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case 0x0cf9:
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BX_ERROR(("read: CPU reset register not supported yet"));
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break;
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}
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return(0xffffffff);
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}
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// static IO port write callback handler
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// redirects to non-static class handler to avoid virtual functions
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void
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bx_pci2isa_c::write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
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{
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#if !BX_USE_P2I_SMF
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bx_pci2isa_c *class_ptr = (bx_pci2isa_c *) this_ptr;
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class_ptr->write(address, value, io_len);
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}
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void
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bx_pci2isa_c::write(Bit32u address, Bit32u value, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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#endif // !BX_USE_P2I_SMF
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switch (address) {
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case 0x00b2:
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BX_ERROR(("write: APM command register not supported yet"));
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break;
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case 0x00b3:
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BX_ERROR(("write: APM status register not supported yet"));
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break;
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case 0x04d0:
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BX_P2I_THIS s.elcr1 = (value & 0xf8);
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BX_ERROR(("write: ELCR1 changes have no effect yet"));
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break;
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case 0x04d1:
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BX_P2I_THIS s.elcr2 = (value & 0xde);
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BX_ERROR(("write: ELCR2 changes have no effect yet"));
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break;
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case 0x0cf9:
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BX_ERROR(("write: CPU reset register not supported yet"));
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break;
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}
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}
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// static pci configuration space read callback handler
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// redirects to non-static class handler to avoid virtual functions
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Bit32u
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bx_pci2isa_c::pci_read_handler(void *this_ptr, Bit8u address, unsigned io_len)
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{
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#if !BX_USE_P2I_SMF
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bx_pci2isa_c *class_ptr = (bx_pci2isa_c *) this_ptr;
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return( class_ptr->pci_read(address, io_len) );
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}
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Bit32u
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bx_pci2isa_c::pci_read(Bit8u address, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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#endif // !BX_USE_P2I_SMF
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Bit32u value = 0;
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if (io_len <= 4) {
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for (unsigned i=0; i<io_len; i++) {
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value |= (BX_P2I_THIS s.pci_conf[address+i] << (i*8));
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}
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BX_DEBUG(("PIIX3 PCI-to-ISA read register 0x%02x value 0x%08x", address, value));
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return value;
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}
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else
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return(0xffffffff);
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}
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// static pci configuration space write callback handler
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// redirects to non-static class handler to avoid virtual functions
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void
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bx_pci2isa_c::pci_write_handler(void *this_ptr, Bit8u address, Bit32u value, unsigned io_len)
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{
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#if !BX_USE_P2I_SMF
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bx_pci2isa_c *class_ptr = (bx_pci2isa_c *) this_ptr;
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class_ptr->pci_write(address, value, io_len);
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}
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void
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bx_pci2isa_c::pci_write(Bit8u address, Bit32u value, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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#endif // !BX_USE_P2I_SMF
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Bit8u value8;
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if (io_len <= 4) {
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for (unsigned i=0; i<io_len; i++) {
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value8 = (value >> (i*8)) & 0xFF;
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switch (address+i) {
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case 0x06:
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break;
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default:
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BX_P2I_THIS s.pci_conf[address+i] = value8;
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BX_DEBUG(("PIIX3 PCI-to-ISA write register 0x%02x value 0x%02x", address,
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value8));
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}
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}
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}
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}
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#endif /* BX_PCI_SUPPORT */
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