f90e5f4f44
Only missing items (to be added soon): - Supervisor Shadow Stack EPT Control is not implemented yet - SMM placing for SSP Currently have to be added manually to some CPUID model, for example to ICL-U To enable configure with --enable-cet
303 lines
9.9 KiB
C++
303 lines
9.9 KiB
C++
////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2005-2019 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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void BX_CPP_AttrRegparmN(2)
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BX_CPU_C::return_protected(bxInstruction_c *i, Bit16u pop_bytes)
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{
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Bit16u raw_cs_selector, raw_ss_selector;
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bx_selector_t cs_selector, ss_selector;
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bx_descriptor_t cs_descriptor, ss_descriptor;
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Bit32u stack_param_offset;
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bx_address return_RIP, return_RSP, temp_RSP;
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Bit32u dword1, dword2;
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/* + 6+N*2: SS | +12+N*4: SS | +24+N*8 SS */
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/* + 4+N*2: SP | + 8+N*4: ESP | +16+N*8 RSP */
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/* parm N | + parm N | + parm N */
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/* parm 3 | + parm 3 | + parm 3 */
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/* parm 2 | + parm 2 | + parm 2 */
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/* + 4: parm 1 | + 8: parm 1 | +16: parm 1 */
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/* + 2: CS | + 4: CS | + 8: CS */
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/* + 0: IP | + 0: EIP | + 0: RIP */
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#if BX_SUPPORT_X86_64
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if (long64_mode()) temp_RSP = RSP;
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else
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#endif
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{
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) temp_RSP = ESP;
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else temp_RSP = SP;
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}
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#if BX_SUPPORT_X86_64
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if (i->os64L()) {
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raw_cs_selector = (Bit16u) stack_read_qword(temp_RSP + 8);
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return_RIP = stack_read_qword(temp_RSP);
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stack_param_offset = 16;
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}
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else
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#endif
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if (i->os32L()) {
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raw_cs_selector = (Bit16u) stack_read_dword(temp_RSP + 4);
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return_RIP = stack_read_dword(temp_RSP);
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stack_param_offset = 8;
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}
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else {
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raw_cs_selector = stack_read_word(temp_RSP + 2);
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return_RIP = stack_read_word(temp_RSP);
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stack_param_offset = 4;
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}
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// selector must be non-null else #GP(0)
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if ((raw_cs_selector & 0xfffc) == 0) {
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BX_ERROR(("return_protected: CS selector null"));
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exception(BX_GP_EXCEPTION, 0);
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}
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parse_selector(raw_cs_selector, &cs_selector);
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// selector index must be within its descriptor table limits,
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// else #GP(selector)
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fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
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// descriptor AR byte must indicate code segment, else #GP(selector)
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parse_descriptor(dword1, dword2, &cs_descriptor);
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// return selector RPL must be >= CPL, else #GP(return selector)
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if (cs_selector.rpl < CPL) {
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BX_ERROR(("return_protected: CS.rpl < CPL"));
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exception(BX_GP_EXCEPTION, raw_cs_selector & 0xfffc);
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}
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// check code-segment descriptor
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check_cs(&cs_descriptor, raw_cs_selector, 0, cs_selector.rpl);
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// if return selector RPL == CPL then
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// RETURN TO SAME PRIVILEGE LEVEL
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if (cs_selector.rpl == CPL)
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{
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BX_DEBUG(("return_protected: return to SAME PRIVILEGE LEVEL"));
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#if BX_SUPPORT_CET
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if (ShadowStackEnabled(CPL)) {
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SSP = shadow_stack_restore(raw_cs_selector, cs_descriptor, return_RIP);
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}
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#endif
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branch_far(&cs_selector, &cs_descriptor, return_RIP, CPL);
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#if BX_SUPPORT_X86_64
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if (long64_mode())
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RSP += stack_param_offset + pop_bytes;
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else
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#endif
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{
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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RSP = ESP + stack_param_offset + pop_bytes;
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else
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SP += stack_param_offset + pop_bytes;
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}
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}
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/* RETURN TO OUTER PRIVILEGE LEVEL */
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else {
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/* + 6+N*2: SS | +12+N*4: SS | +24+N*8 SS */
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/* + 4+N*2: SP | + 8+N*4: ESP | +16+N*8 RSP */
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/* parm N | + parm N | + parm N */
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/* parm 3 | + parm 3 | + parm 3 */
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/* parm 2 | + parm 2 | + parm 2 */
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/* + 4: parm 1 | + 8: parm 1 | +16: parm 1 */
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/* + 2: CS | + 4: CS | + 8: CS */
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/* + 0: IP | + 0: EIP | + 0: RIP */
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BX_DEBUG(("return_protected: return to OUTER PRIVILEGE LEVEL"));
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#if BX_SUPPORT_X86_64
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if (i->os64L()) {
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raw_ss_selector = stack_read_word(temp_RSP + 24 + pop_bytes);
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return_RSP = stack_read_qword(temp_RSP + 16 + pop_bytes);
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}
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else
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#endif
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if (i->os32L()) {
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raw_ss_selector = stack_read_word(temp_RSP + 12 + pop_bytes);
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return_RSP = stack_read_dword(temp_RSP + 8 + pop_bytes);
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}
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else {
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raw_ss_selector = stack_read_word(temp_RSP + 6 + pop_bytes);
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return_RSP = stack_read_word(temp_RSP + 4 + pop_bytes);
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}
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/* selector index must be within its descriptor table limits,
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* else #GP(selector) */
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parse_selector(raw_ss_selector, &ss_selector);
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if ((raw_ss_selector & 0xfffc) == 0) {
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#if BX_SUPPORT_X86_64
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if (long_mode()) {
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if (! IS_LONG64_SEGMENT(cs_descriptor) || (cs_selector.rpl == 3)) {
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BX_ERROR(("return_protected: SS selector null"));
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exception(BX_GP_EXCEPTION, 0);
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}
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}
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else // not in long or compatibility mode
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#endif
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{
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BX_ERROR(("return_protected: SS selector null"));
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exception(BX_GP_EXCEPTION, 0);
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}
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}
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else {
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fetch_raw_descriptor(&ss_selector, &dword1, &dword2, BX_GP_EXCEPTION);
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parse_descriptor(dword1, dword2, &ss_descriptor);
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/* selector RPL must = RPL of the return CS selector,
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* else #GP(selector) */
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if (ss_selector.rpl != cs_selector.rpl) {
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BX_ERROR(("return_protected: ss.rpl != cs.rpl"));
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exception(BX_GP_EXCEPTION, raw_ss_selector & 0xfffc);
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}
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/* descriptor AR byte must indicate a writable data segment,
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* else #GP(selector) */
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if (ss_descriptor.valid==0 || ss_descriptor.segment==0 ||
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IS_CODE_SEGMENT(ss_descriptor.type) ||
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!IS_DATA_SEGMENT_WRITEABLE(ss_descriptor.type))
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{
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BX_ERROR(("return_protected: SS.AR byte not writable data"));
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exception(BX_GP_EXCEPTION, raw_ss_selector & 0xfffc);
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}
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/* descriptor dpl must = RPL of the return CS selector,
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* else #GP(selector) */
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if (ss_descriptor.dpl != cs_selector.rpl) {
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BX_ERROR(("return_protected: SS.dpl != cs.rpl"));
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exception(BX_GP_EXCEPTION, raw_ss_selector & 0xfffc);
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}
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/* segment must be present else #SS(selector) */
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if (! IS_PRESENT(ss_descriptor)) {
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BX_ERROR(("return_protected: ss.present == 0"));
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exception(BX_SS_EXCEPTION, raw_ss_selector & 0xfffc);
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}
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}
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#if BX_SUPPORT_CET
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unsigned prev_cpl = CPL;
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bx_address new_SSP = BX_CPU_THIS_PTR msr.ia32_pl_ssp[3];
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if (ShadowStackEnabled(CPL)) {
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if (SSP & 0x7) {
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BX_ERROR(("return_protected: SSP is not 8-byte aligned"));
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exception(BX_CP_EXCEPTION, BX_CP_FAR_RET_IRET);
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}
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if (cs_selector.rpl != 3) {
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new_SSP = shadow_stack_restore(raw_cs_selector, cs_descriptor, return_RIP);
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}
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}
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#endif
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branch_far(&cs_selector, &cs_descriptor, return_RIP, cs_selector.rpl);
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if ((raw_ss_selector & 0xfffc) != 0) {
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// load SS:RSP from stack
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// load the SS-cache with SS descriptor
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load_ss(&ss_selector, &ss_descriptor, cs_selector.rpl);
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}
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#if BX_SUPPORT_X86_64
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else {
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// we are in 64-bit mode (checked above)
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load_null_selector(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], raw_ss_selector);
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}
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if (long64_mode())
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RSP = return_RSP + pop_bytes;
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else
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#endif
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{
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if (ss_descriptor.u.segment.d_b)
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RSP = (Bit32u)(return_RSP + pop_bytes);
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else
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SP = (Bit16u)(return_RSP + pop_bytes);
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}
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#if BX_SUPPORT_CET
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bx_address old_SSP = SSP;
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if (ShadowStackEnabled(CPL)) {
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if (!long64_mode() && GET32H(new_SSP) != 0) {
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BX_ERROR(("return_protected: 64-bit SSP in legacy mode"));
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exception(BX_GP_EXCEPTION, 0);
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}
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SSP = new_SSP;
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}
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if (ShadowStackEnabled(prev_cpl)) {
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shadow_stack_atomic_clear_busy(old_SSP, prev_cpl);
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}
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#endif
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/* check ES, DS, FS, GS for validity */
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validate_seg_regs();
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}
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}
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#if BX_SUPPORT_CET
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bx_address BX_CPP_AttrRegparmN(3)
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BX_CPU_C::shadow_stack_restore(Bit16u raw_cs_selector, const bx_descriptor_t &cs_descriptor, bx_address return_rip)
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{
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bx_address return_lip = return_rip;
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if (! long_mode() || ! cs_descriptor.u.segment.l)
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return_lip = (Bit32u) (return_lip + cs_descriptor.u.segment.base);
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if (SSP & 0x7) {
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BX_ERROR(("return_protected: SSP must be 8-byte aligned"));
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exception(BX_CP_EXCEPTION, BX_CP_FAR_RET_IRET);
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}
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Bit64u prevSSP = shadow_stack_pop_64();
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Bit64u shadowLIP = shadow_stack_pop_64();
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Bit64u shadowCS = shadow_stack_pop_64();
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if (raw_cs_selector != shadowCS) {
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BX_ERROR(("shadow_stack_restore: CS mismatch"));
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exception(BX_CP_EXCEPTION, BX_CP_FAR_RET_IRET);
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}
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if (return_lip != shadowLIP) {
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BX_ERROR(("shadow_stack_restore: LIP mismatch"));
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exception(BX_CP_EXCEPTION, BX_CP_FAR_RET_IRET);
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}
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if (prevSSP & 0x3) {
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BX_ERROR(("shadow_stack_restore: prevSSP must be 4-byte aligned"));
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exception(BX_CP_EXCEPTION, BX_CP_FAR_RET_IRET);
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}
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if (!long64_mode() && (prevSSP>>32)!=0) {
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BX_ERROR(("shadow_stack_restore: prevSSP must be 32-bit in 32-bit mode"));
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exception(BX_GP_EXCEPTION, 0);
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}
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return prevSSP;
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}
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#endif
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