f90e5f4f44
Only missing items (to be added soon): - Supervisor Shadow Stack EPT Control is not implemented yet - SMM placing for SSP Currently have to be added manually to some CPUID model, for example to ICL-U To enable configure with --enable-cet
665 lines
23 KiB
C++
665 lines
23 KiB
C++
////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2005-2019 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::call_protected(bxInstruction_c *i, Bit16u cs_raw, bx_address disp)
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{
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bx_selector_t cs_selector;
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Bit32u dword1, dword2;
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bx_descriptor_t cs_descriptor;
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/* new cs selector must not be null, else #GP(0) */
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if ((cs_raw & 0xfffc) == 0) {
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BX_DEBUG(("call_protected: CS selector null"));
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exception(BX_GP_EXCEPTION, 0);
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}
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parse_selector(cs_raw, &cs_selector);
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// check new CS selector index within its descriptor limits,
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// else #GP(new CS selector)
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fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
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parse_descriptor(dword1, dword2, &cs_descriptor);
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// examine AR byte of selected descriptor for various legal values
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if (cs_descriptor.valid==0) {
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BX_ERROR(("call_protected: invalid CS descriptor"));
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exception(BX_GP_EXCEPTION, cs_raw & 0xfffc);
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}
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if (cs_descriptor.segment) // normal segment
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{
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check_cs(&cs_descriptor, cs_raw, BX_SELECTOR_RPL(cs_raw), CPL);
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#if BX_SUPPORT_CET
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bx_address temp_LIP = get_laddr(BX_SEG_REG_CS, RIP);
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Bit16u old_CS = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
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#endif
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#if BX_SUPPORT_X86_64
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if (long_mode() && cs_descriptor.u.segment.l) {
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Bit64u temp_rsp = RSP;
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// moving to long mode, push return address onto 64-bit stack
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if (i->os64L()) {
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write_new_stack_qword(temp_rsp - 8, cs_descriptor.dpl,
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
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write_new_stack_qword(temp_rsp - 16, cs_descriptor.dpl, RIP);
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temp_rsp -= 16;
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}
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else if (i->os32L()) {
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write_new_stack_dword(temp_rsp - 4, cs_descriptor.dpl,
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
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write_new_stack_dword(temp_rsp - 8, cs_descriptor.dpl, EIP);
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temp_rsp -= 8;
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}
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else {
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write_new_stack_word(temp_rsp - 2, cs_descriptor.dpl,
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
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write_new_stack_word(temp_rsp - 4, cs_descriptor.dpl, IP);
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temp_rsp -= 4;
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}
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// load code segment descriptor into CS cache
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// load CS with new code segment selector
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// set RPL of CS to CPL
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branch_far(&cs_selector, &cs_descriptor, disp, CPL);
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RSP = temp_rsp;
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}
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else
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#endif
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{
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Bit32u temp_RSP;
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// moving to legacy mode, push return address onto 32-bit stack
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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temp_RSP = ESP;
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else
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temp_RSP = SP;
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#if BX_SUPPORT_X86_64
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if (i->os64L()) {
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write_new_stack_qword(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS],
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temp_RSP - 8, cs_descriptor.dpl,
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
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write_new_stack_qword(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS],
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temp_RSP - 16, cs_descriptor.dpl, RIP);
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temp_RSP -= 16;
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}
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else
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#endif
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if (i->os32L()) {
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write_new_stack_dword(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS],
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temp_RSP - 4, cs_descriptor.dpl,
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
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write_new_stack_dword(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS],
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temp_RSP - 8, cs_descriptor.dpl, EIP);
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temp_RSP -= 8;
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}
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else {
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write_new_stack_word(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS],
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temp_RSP - 2, cs_descriptor.dpl,
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
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write_new_stack_word(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS],
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temp_RSP - 4, cs_descriptor.dpl, IP);
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temp_RSP -= 4;
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}
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// load code segment descriptor into CS cache
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// load CS with new code segment selector
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// set RPL of CS to CPL
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branch_far(&cs_selector, &cs_descriptor, disp, CPL);
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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ESP = (Bit32u) temp_RSP;
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else
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SP = (Bit16u) temp_RSP;
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}
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#if BX_SUPPORT_CET
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if (ShadowStackEnabled(CPL)) {
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call_far_shadow_stack_push(old_CS, temp_LIP, SSP);
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}
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track_indirect(CPL);
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#endif
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return;
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}
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else { // gate & special segment
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bx_descriptor_t gate_descriptor = cs_descriptor;
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bx_selector_t gate_selector = cs_selector;
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// descriptor DPL must be >= CPL else #GP(gate selector)
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if (gate_descriptor.dpl < CPL) {
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BX_ERROR(("call_protected: descriptor.dpl < CPL"));
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exception(BX_GP_EXCEPTION, cs_raw & 0xfffc);
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}
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// descriptor DPL must be >= gate selector RPL else #GP(gate selector)
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if (gate_descriptor.dpl < gate_selector.rpl) {
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BX_ERROR(("call_protected: descriptor.dpl < selector.rpl"));
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exception(BX_GP_EXCEPTION, cs_raw & 0xfffc);
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}
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#if BX_SUPPORT_X86_64
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if (long_mode()) {
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// call gate type is higher priority than non-present bit check
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if (gate_descriptor.type != BX_386_CALL_GATE) {
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BX_ERROR(("call_protected: gate type %u unsupported in long mode", (unsigned) gate_descriptor.type));
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exception(BX_GP_EXCEPTION, cs_raw & 0xfffc);
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}
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// gate descriptor must be present else #NP(gate selector)
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if (! IS_PRESENT(gate_descriptor)) {
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BX_ERROR(("call_protected: call gate not present"));
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exception(BX_NP_EXCEPTION, cs_raw & 0xfffc);
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}
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call_gate64(&gate_selector);
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return;
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}
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#endif
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switch (gate_descriptor.type) {
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case BX_SYS_SEGMENT_AVAIL_286_TSS:
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case BX_SYS_SEGMENT_AVAIL_386_TSS:
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if (gate_descriptor.type==BX_SYS_SEGMENT_AVAIL_286_TSS)
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BX_DEBUG(("call_protected: 16bit available TSS"));
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else
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BX_DEBUG(("call_protected: 32bit available TSS"));
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if (gate_descriptor.valid==0 || gate_selector.ti) {
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BX_ERROR(("call_protected: call bad TSS selector !"));
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exception(BX_GP_EXCEPTION, cs_raw & 0xfffc);
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}
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// TSS must be present, else #NP(TSS selector)
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if (! IS_PRESENT(gate_descriptor)) {
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BX_ERROR(("call_protected: call not present TSS !"));
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exception(BX_NP_EXCEPTION, cs_raw & 0xfffc);
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}
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// SWITCH_TASKS _without_ nesting to TSS
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task_switch(i, &gate_selector, &gate_descriptor,
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BX_TASK_FROM_CALL, dword1, dword2);
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return;
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case BX_TASK_GATE:
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task_gate(i, &gate_selector, &gate_descriptor, BX_TASK_FROM_CALL);
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return;
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case BX_286_CALL_GATE:
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case BX_386_CALL_GATE:
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// gate descriptor must be present else #NP(gate selector)
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if (! IS_PRESENT(gate_descriptor)) {
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BX_ERROR(("call_protected: gate not present"));
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exception(BX_NP_EXCEPTION, cs_raw & 0xfffc);
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}
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call_gate(&gate_descriptor);
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return;
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default: // can't get here
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BX_ERROR(("call_protected(): gate.type(%u) unsupported", (unsigned) gate_descriptor.type));
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exception(BX_GP_EXCEPTION, cs_raw & 0xfffc);
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}
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}
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::call_gate(bx_descriptor_t *gate_descriptor)
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{
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bx_selector_t cs_selector;
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Bit32u dword1, dword2;
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bx_descriptor_t cs_descriptor;
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// examine code segment selector in call gate descriptor
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BX_DEBUG(("call_gate: call gate"));
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Bit16u dest_selector = gate_descriptor->u.gate.dest_selector;
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Bit32u new_EIP = gate_descriptor->u.gate.dest_offset;
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// selector must not be null else #GP(0)
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if ((dest_selector & 0xfffc) == 0) {
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BX_ERROR(("call_gate: selector in gate null"));
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exception(BX_GP_EXCEPTION, 0);
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}
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parse_selector(dest_selector, &cs_selector);
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// selector must be within its descriptor table limits,
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// else #GP(code segment selector)
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fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
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parse_descriptor(dword1, dword2, &cs_descriptor);
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// AR byte of selected descriptor must indicate code segment,
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// else #GP(code segment selector)
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// DPL of selected descriptor must be <= CPL,
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// else #GP(code segment selector)
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if (cs_descriptor.valid==0 || cs_descriptor.segment==0 ||
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IS_DATA_SEGMENT(cs_descriptor.type) || cs_descriptor.dpl > CPL)
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{
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BX_ERROR(("call_gate: selected descriptor is not code"));
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exception(BX_GP_EXCEPTION, dest_selector & 0xfffc);
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}
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// code segment must be present else #NP(selector)
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if (! IS_PRESENT(cs_descriptor)) {
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BX_ERROR(("call_gate: code segment not present !"));
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exception(BX_NP_EXCEPTION, dest_selector & 0xfffc);
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}
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// CALL GATE TO MORE PRIVILEGE
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// if non-conforming code segment and DPL < CPL then
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if (IS_CODE_SEGMENT_NON_CONFORMING(cs_descriptor.type) && (cs_descriptor.dpl < CPL))
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{
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Bit16u SS_for_cpl_x;
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Bit32u ESP_for_cpl_x;
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bx_selector_t ss_selector;
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bx_descriptor_t ss_descriptor;
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Bit16u return_SS, return_CS;
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Bit32u return_ESP, return_EIP;
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BX_DEBUG(("CALL GATE TO MORE PRIVILEGE LEVEL"));
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// get new SS selector for new privilege level from TSS
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get_SS_ESP_from_TSS(cs_descriptor.dpl, &SS_for_cpl_x, &ESP_for_cpl_x);
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// check selector & descriptor for new SS:
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// selector must not be null, else #TS(0)
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if ((SS_for_cpl_x & 0xfffc) == 0) {
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BX_ERROR(("call_gate: new SS null"));
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exception(BX_TS_EXCEPTION, 0);
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}
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// selector index must be within its descriptor table limits,
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// else #TS(SS selector)
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parse_selector(SS_for_cpl_x, &ss_selector);
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fetch_raw_descriptor(&ss_selector, &dword1, &dword2, BX_TS_EXCEPTION);
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parse_descriptor(dword1, dword2, &ss_descriptor);
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// selector's RPL must equal DPL of code segment,
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// else #TS(SS selector)
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if (ss_selector.rpl != cs_descriptor.dpl) {
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BX_ERROR(("call_gate: SS selector.rpl != CS descr.dpl"));
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exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc);
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}
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// stack segment DPL must equal DPL of code segment,
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// else #TS(SS selector)
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if (ss_descriptor.dpl != cs_descriptor.dpl) {
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BX_ERROR(("call_gate: SS descr.rpl != CS descr.dpl"));
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exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc);
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}
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// descriptor must indicate writable data segment,
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// else #TS(SS selector)
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if (ss_descriptor.valid==0 || ss_descriptor.segment==0 ||
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IS_CODE_SEGMENT(ss_descriptor.type) || !IS_DATA_SEGMENT_WRITEABLE(ss_descriptor.type))
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{
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BX_ERROR(("call_gate: ss descriptor is not writable data seg"));
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exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc);
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}
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// segment must be present, else #SS(SS selector)
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if (! IS_PRESENT(ss_descriptor)) {
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BX_ERROR(("call_gate: ss descriptor not present"));
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exception(BX_SS_EXCEPTION, SS_for_cpl_x & 0xfffc);
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}
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// get word count from call gate, mask to 5 bits
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unsigned param_count = gate_descriptor->u.gate.param_count & 0x1f;
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// save return SS:eSP to be pushed on new stack
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return_SS = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value;
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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return_ESP = ESP;
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else
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return_ESP = SP;
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// save return CS:eIP to be pushed on new stack
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return_CS = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b)
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return_EIP = EIP;
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else
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return_EIP = IP;
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// Prepare new stack segment
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bx_segment_reg_t new_stack;
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new_stack.selector = ss_selector;
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new_stack.cache = ss_descriptor;
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new_stack.selector.rpl = cs_descriptor.dpl;
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// add cpl to the selector value
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new_stack.selector.value = (0xfffc & new_stack.selector.value) |
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new_stack.selector.rpl;
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/* load new SS:SP value from TSS */
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if (ss_descriptor.u.segment.d_b) {
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Bit32u temp_ESP = ESP_for_cpl_x;
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// push pointer of old stack onto new stack
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if (gate_descriptor->type==BX_386_CALL_GATE) {
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write_new_stack_dword(&new_stack, temp_ESP-4, cs_descriptor.dpl, return_SS);
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write_new_stack_dword(&new_stack, temp_ESP-8, cs_descriptor.dpl, return_ESP);
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temp_ESP -= 8;
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for (unsigned n=param_count; n>0; n--) {
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temp_ESP -= 4;
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Bit32u param = stack_read_dword(return_ESP + (n-1)*4);
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write_new_stack_dword(&new_stack, temp_ESP, cs_descriptor.dpl, param);
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}
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// push return address onto new stack
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write_new_stack_dword(&new_stack, temp_ESP-4, cs_descriptor.dpl, return_CS);
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write_new_stack_dword(&new_stack, temp_ESP-8, cs_descriptor.dpl, return_EIP);
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temp_ESP -= 8;
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}
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else {
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write_new_stack_word(&new_stack, temp_ESP-2, cs_descriptor.dpl, return_SS);
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write_new_stack_word(&new_stack, temp_ESP-4, cs_descriptor.dpl, (Bit16u) return_ESP);
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temp_ESP -= 4;
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for (unsigned n=param_count; n>0; n--) {
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temp_ESP -= 2;
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Bit16u param = stack_read_word(return_ESP + (n-1)*2);
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write_new_stack_word(&new_stack, temp_ESP, cs_descriptor.dpl, param);
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}
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// push return address onto new stack
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write_new_stack_word(&new_stack, temp_ESP-2, cs_descriptor.dpl, return_CS);
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write_new_stack_word(&new_stack, temp_ESP-4, cs_descriptor.dpl, (Bit16u) return_EIP);
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temp_ESP -= 4;
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}
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ESP = temp_ESP;
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}
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else {
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Bit16u temp_SP = (Bit16u) ESP_for_cpl_x;
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// push pointer of old stack onto new stack
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if (gate_descriptor->type==BX_386_CALL_GATE) {
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write_new_stack_dword(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, return_SS);
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write_new_stack_dword(&new_stack, (Bit16u)(temp_SP-8), cs_descriptor.dpl, return_ESP);
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temp_SP -= 8;
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for (unsigned n=param_count; n>0; n--) {
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temp_SP -= 4;
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Bit32u param = stack_read_dword(return_ESP + (n-1)*4);
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write_new_stack_dword(&new_stack, temp_SP, cs_descriptor.dpl, param);
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}
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// push return address onto new stack
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write_new_stack_dword(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, return_CS);
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write_new_stack_dword(&new_stack, (Bit16u)(temp_SP-8), cs_descriptor.dpl, return_EIP);
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temp_SP -= 8;
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}
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else {
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write_new_stack_word(&new_stack, (Bit16u)(temp_SP-2), cs_descriptor.dpl, return_SS);
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write_new_stack_word(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, (Bit16u) return_ESP);
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temp_SP -= 4;
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for (unsigned n=param_count; n>0; n--) {
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temp_SP -= 2;
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Bit16u param = stack_read_word(return_ESP + (n-1)*2);
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write_new_stack_word(&new_stack, temp_SP, cs_descriptor.dpl, param);
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}
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// push return address onto new stack
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write_new_stack_word(&new_stack, (Bit16u)(temp_SP-2), cs_descriptor.dpl, return_CS);
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write_new_stack_word(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, (Bit16u) return_EIP);
|
|
temp_SP -= 4;
|
|
}
|
|
|
|
SP = temp_SP;
|
|
}
|
|
|
|
// new eIP must be in code segment limit else #GP(0)
|
|
if (new_EIP > cs_descriptor.u.segment.limit_scaled) {
|
|
BX_ERROR(("call_gate: EIP not within CS limits"));
|
|
exception(BX_GP_EXCEPTION, 0);
|
|
}
|
|
|
|
#if BX_SUPPORT_CET
|
|
bx_address temp_LIP = get_laddr(BX_SEG_REG_CS, return_EIP);
|
|
unsigned old_SS_DPL = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.dpl;
|
|
unsigned old_CPL = CPL;
|
|
#endif
|
|
|
|
/* load SS descriptor */
|
|
load_ss(&ss_selector, &ss_descriptor, cs_descriptor.dpl);
|
|
|
|
/* load new CS:IP value from gate */
|
|
/* load CS descriptor */
|
|
/* set CPL to stack segment DPL */
|
|
/* set RPL of CS to CPL */
|
|
load_cs(&cs_selector, &cs_descriptor, cs_descriptor.dpl);
|
|
|
|
EIP = new_EIP;
|
|
|
|
#if BX_SUPPORT_CET
|
|
if (ShadowStackEnabled(old_CPL)) {
|
|
if (old_CPL == 3)
|
|
BX_CPU_THIS_PTR msr.ia32_pl_ssp[3] = SSP;
|
|
}
|
|
|
|
if(ShadowStackEnabled(CPL)) {
|
|
bx_address old_SSP = SSP;
|
|
shadow_stack_switch(BX_CPU_THIS_PTR msr.ia32_pl_ssp[CPL]);
|
|
if (old_SS_DPL != 3)
|
|
call_far_shadow_stack_push(return_CS, temp_LIP, old_SSP);
|
|
}
|
|
track_indirect(CPL);
|
|
#endif
|
|
}
|
|
else // CALL GATE TO SAME PRIVILEGE
|
|
{
|
|
BX_DEBUG(("CALL GATE TO SAME PRIVILEGE"));
|
|
|
|
if (gate_descriptor->type == BX_386_CALL_GATE) {
|
|
// call gate 32bit, push return address onto stack
|
|
push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
|
|
push_32(EIP);
|
|
}
|
|
else {
|
|
// call gate 16bit, push return address onto stack
|
|
push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
|
|
push_16(IP);
|
|
}
|
|
|
|
#if BX_SUPPORT_CET
|
|
Bit32u temp_LIP = get_segment_base(BX_SEG_REG_CS) + ((gate_descriptor->type == BX_386_CALL_GATE) ? EIP : IP);
|
|
Bit16u old_CS = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
|
|
#endif
|
|
|
|
// load CS:EIP from gate
|
|
// load code segment descriptor into CS register
|
|
// set RPL of CS to CPL
|
|
branch_far(&cs_selector, &cs_descriptor, new_EIP, CPL);
|
|
|
|
#if BX_SUPPORT_CET
|
|
if (ShadowStackEnabled(CPL)) {
|
|
call_far_shadow_stack_push(old_CS, temp_LIP, SSP);
|
|
}
|
|
track_indirect(CPL);
|
|
#endif
|
|
}
|
|
}
|
|
|
|
#if BX_SUPPORT_X86_64
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::call_gate64(bx_selector_t *gate_selector)
|
|
{
|
|
bx_selector_t cs_selector;
|
|
Bit32u dword1, dword2, dword3;
|
|
bx_descriptor_t cs_descriptor;
|
|
bx_descriptor_t gate_descriptor;
|
|
|
|
// examine code segment selector in call gate descriptor
|
|
BX_DEBUG(("call_gate64: CALL 64bit call gate"));
|
|
|
|
fetch_raw_descriptor_64(gate_selector, &dword1, &dword2, &dword3, BX_GP_EXCEPTION);
|
|
parse_descriptor(dword1, dword2, &gate_descriptor);
|
|
|
|
Bit16u dest_selector = gate_descriptor.u.gate.dest_selector;
|
|
// selector must not be null else #GP(0)
|
|
if ((dest_selector & 0xfffc) == 0) {
|
|
BX_ERROR(("call_gate64: selector in gate null"));
|
|
exception(BX_GP_EXCEPTION, 0);
|
|
}
|
|
|
|
parse_selector(dest_selector, &cs_selector);
|
|
// selector must be within its descriptor table limits,
|
|
// else #GP(code segment selector)
|
|
fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
|
|
parse_descriptor(dword1, dword2, &cs_descriptor);
|
|
|
|
// find the RIP in the gate_descriptor
|
|
Bit64u new_RIP = gate_descriptor.u.gate.dest_offset;
|
|
new_RIP |= ((Bit64u)dword3 << 32);
|
|
|
|
// AR byte of selected descriptor must indicate code segment,
|
|
// else #GP(code segment selector)
|
|
// DPL of selected descriptor must be <= CPL,
|
|
// else #GP(code segment selector)
|
|
if (cs_descriptor.valid==0 || cs_descriptor.segment==0 ||
|
|
IS_DATA_SEGMENT(cs_descriptor.type) ||
|
|
cs_descriptor.dpl > CPL)
|
|
{
|
|
BX_ERROR(("call_gate64: selected descriptor is not code"));
|
|
exception(BX_GP_EXCEPTION, dest_selector & 0xfffc);
|
|
}
|
|
|
|
// In long mode, only 64-bit call gates are allowed, and they must point
|
|
// to 64-bit code segments, else #GP(selector)
|
|
if (! IS_LONG64_SEGMENT(cs_descriptor) || cs_descriptor.u.segment.d_b)
|
|
{
|
|
BX_ERROR(("call_gate64: not 64-bit code segment in call gate 64"));
|
|
exception(BX_GP_EXCEPTION, dest_selector & 0xfffc);
|
|
}
|
|
|
|
// code segment must be present else #NP(selector)
|
|
if (! IS_PRESENT(cs_descriptor)) {
|
|
BX_ERROR(("call_gate64: code segment not present !"));
|
|
exception(BX_NP_EXCEPTION, dest_selector & 0xfffc);
|
|
}
|
|
|
|
Bit64u old_CS = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
|
|
Bit64u old_RIP = RIP;
|
|
|
|
#if BX_SUPPORT_CET
|
|
bx_address temp_LIP = get_laddr(BX_SEG_REG_CS, RIP);
|
|
unsigned old_SS_DPL = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.dpl;
|
|
unsigned old_CPL = CPL;
|
|
#endif
|
|
|
|
// CALL GATE TO MORE PRIVILEGE
|
|
// if non-conforming code segment and DPL < CPL then
|
|
if (IS_CODE_SEGMENT_NON_CONFORMING(cs_descriptor.type) && (cs_descriptor.dpl < CPL))
|
|
{
|
|
BX_DEBUG(("CALL GATE64 TO MORE PRIVILEGE LEVEL"));
|
|
|
|
// get new RSP for new privilege level from TSS
|
|
Bit64u RSP_for_cpl_x = get_RSP_from_TSS(cs_descriptor.dpl);
|
|
Bit64u old_SS = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value;
|
|
Bit64u old_RSP = RSP;
|
|
|
|
// push old stack long pointer onto new stack
|
|
write_new_stack_qword(RSP_for_cpl_x - 8, cs_descriptor.dpl, old_SS);
|
|
write_new_stack_qword(RSP_for_cpl_x - 16, cs_descriptor.dpl, old_RSP);
|
|
// push long pointer to return address onto new stack
|
|
write_new_stack_qword(RSP_for_cpl_x - 24, cs_descriptor.dpl, old_CS);
|
|
write_new_stack_qword(RSP_for_cpl_x - 32, cs_descriptor.dpl, old_RIP);
|
|
RSP_for_cpl_x -= 32;
|
|
|
|
// load CS:RIP (guaranteed to be in 64 bit mode)
|
|
branch_far(&cs_selector, &cs_descriptor, new_RIP, cs_descriptor.dpl);
|
|
|
|
// set up null SS descriptor
|
|
load_null_selector(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], cs_descriptor.dpl);
|
|
|
|
RSP = RSP_for_cpl_x;
|
|
|
|
#if BX_SUPPORT_CET
|
|
if(ShadowStackEnabled(old_CPL)) {
|
|
if (old_CPL == 3)
|
|
BX_CPU_THIS_PTR msr.ia32_pl_ssp[3] = SSP;
|
|
}
|
|
if(ShadowStackEnabled(CPL)) {
|
|
bx_address old_SSP = SSP;
|
|
shadow_stack_switch(BX_CPU_THIS_PTR msr.ia32_pl_ssp[CPL]);
|
|
if (old_SS_DPL != 3)
|
|
call_far_shadow_stack_push(old_CS, temp_LIP, old_SSP);
|
|
}
|
|
track_indirect(CPL);
|
|
#endif
|
|
}
|
|
else
|
|
{
|
|
BX_DEBUG(("CALL GATE64 TO SAME PRIVILEGE"));
|
|
|
|
// push to 64-bit stack, switch to long64 guaranteed
|
|
write_new_stack_qword(RSP - 8, CPL, old_CS);
|
|
write_new_stack_qword(RSP - 16, CPL, old_RIP);
|
|
|
|
// load CS:RIP (guaranteed to be in 64 bit mode)
|
|
branch_far(&cs_selector, &cs_descriptor, new_RIP, CPL);
|
|
|
|
RSP -= 16;
|
|
|
|
#if BX_SUPPORT_CET
|
|
if (ShadowStackEnabled(CPL)) {
|
|
call_far_shadow_stack_push(old_CS, temp_LIP, SSP);
|
|
}
|
|
track_indirect(CPL);
|
|
#endif
|
|
}
|
|
}
|
|
|
|
#if BX_SUPPORT_CET
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::shadow_stack_switch(bx_address new_SSP)
|
|
{
|
|
SSP = new_SSP;
|
|
|
|
if (SSP & 0x7) {
|
|
BX_ERROR(("shadow_stack_switch: SSP is not aligned to 8 byte boundary"));
|
|
exception(BX_GP_EXCEPTION, 0);
|
|
}
|
|
if (!long64_mode() && GET32H(SSP) != 0) {
|
|
BX_ERROR(("shadow_stack_switch: 64-bit SSP not in 64-bit mode"));
|
|
exception(BX_GP_EXCEPTION, 0);
|
|
}
|
|
if (!shadow_stack_atomic_set_busy(SSP, CPL)) {
|
|
BX_ERROR(("shadow_stack_switch: failure to set busy bit"));
|
|
exception(BX_GP_EXCEPTION, 0);
|
|
}
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::call_far_shadow_stack_push(Bit16u cs, bx_address lip, bx_address old_ssp)
|
|
{
|
|
if (SSP & 0x7) {
|
|
shadow_stack_write_dword(SSP-4, CPL, 0);
|
|
SSP &= ~BX_CONST64(0x7);
|
|
}
|
|
|
|
shadow_stack_push_64(cs);
|
|
shadow_stack_push_64(lip);
|
|
shadow_stack_push_64(old_ssp);
|
|
}
|
|
#endif
|
|
|
|
#endif
|