f90e5f4f44
Only missing items (to be added soon): - Supervisor Shadow Stack EPT Control is not implemented yet - SMM placing for SSP Currently have to be added manually to some CPUID model, for example to ICL-U To enable configure with --enable-cet
509 lines
16 KiB
C++
509 lines
16 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2005-2019 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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bx_address bx_asize_mask[] = {
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0xffff, // as16 (asize = '00)
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0xffffffff, // as32 (asize = '01)
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#if BX_SUPPORT_X86_64
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BX_CONST64(0xffffffffffffffff), // as64 (asize = '10)
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BX_CONST64(0xffffffffffffffff) // as64 (asize = '11)
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#endif
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};
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#if BX_SUPPORT_EVEX
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#define BX_MAX_MEM_ACCESS_LENGTH 64
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#else
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#if BX_SUPPORT_AVX
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#define BX_MAX_MEM_ACCESS_LENGTH 32
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#else
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#define BX_MAX_MEM_ACCESS_LENGTH 16
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#endif
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#endif
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bx_bool BX_CPP_AttrRegparmN(4)
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BX_CPU_C::write_virtual_checks(bx_segment_reg_t *seg, Bit32u offset, unsigned length, bx_bool align)
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{
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Bit32u upper_limit;
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length--;
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if (align) {
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Bit32u laddr = (Bit32u)(seg->cache.u.segment.base + offset);
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if (laddr & length) {
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BX_DEBUG(("write_virtual_checks(): #GP misaligned access"));
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exception(BX_GP_EXCEPTION, 0);
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}
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}
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if (seg->cache.valid==0) {
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BX_DEBUG(("write_virtual_checks(): segment descriptor not valid"));
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return 0;
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}
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if (seg->cache.p == 0) { /* not present */
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BX_ERROR(("write_virtual_checks(): segment not present"));
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return 0;
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}
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switch (seg->cache.type) {
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case 0: case 1: // read only
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case 4: case 5: // read only, expand down
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case 8: case 9: // execute only
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case 10: case 11: // execute/read
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case 12: case 13: // execute only, conforming
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case 14: case 15: // execute/read-only, conforming
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BX_ERROR(("write_virtual_checks(): no write access to seg"));
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return 0;
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case 2: case 3: /* read/write */
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if (seg->cache.u.segment.limit_scaled == 0xffffffff && seg->cache.u.segment.base == 0) {
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seg->cache.valid |= SegAccessROK | SegAccessWOK | SegAccessROK4G | SegAccessWOK4G;
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break;
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}
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if (offset > (seg->cache.u.segment.limit_scaled - length)
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|| length > seg->cache.u.segment.limit_scaled)
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{
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BX_ERROR(("write_virtual_checks(): write beyond limit, r/w"));
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return 0;
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}
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if (seg->cache.u.segment.limit_scaled >= (BX_MAX_MEM_ACCESS_LENGTH-1)) {
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// Mark cache as being OK type for succeeding read/writes. The limit
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// checks still needs to be done though, but is more simple. We
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// could probably also optimize that out with a flag for the case
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// when limit is the maximum 32bit value. Limit should accomodate
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// at least a dword, since we subtract from it in the simple
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// limit check in other functions, and we don't want the value to roll.
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// Only normal segments (not expand down) are handled this way.
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seg->cache.valid |= SegAccessROK | SegAccessWOK;
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}
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break;
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case 6: case 7: /* read/write, expand down */
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if (seg->cache.u.segment.d_b)
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upper_limit = 0xffffffff;
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else
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upper_limit = 0x0000ffff;
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if (offset <= seg->cache.u.segment.limit_scaled ||
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offset > upper_limit || (upper_limit - offset) < length)
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{
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BX_ERROR(("write_virtual_checks(): write beyond limit, r/w expand down"));
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return 0;
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}
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break;
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default:
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BX_PANIC(("write_virtual_checks(): unknown descriptor type=%d", seg->cache.type));
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}
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return 1;
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}
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bx_bool BX_CPP_AttrRegparmN(4)
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BX_CPU_C::read_virtual_checks(bx_segment_reg_t *seg, Bit32u offset, unsigned length, bx_bool align)
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{
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Bit32u upper_limit;
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length--;
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if (align) {
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Bit32u laddr = (Bit32u)(seg->cache.u.segment.base + offset);
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if (laddr & length) {
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BX_DEBUG(("read_virtual_checks(): #GP misaligned access"));
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exception(BX_GP_EXCEPTION, 0);
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}
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}
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if (seg->cache.valid==0) {
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BX_DEBUG(("read_virtual_checks(): segment descriptor not valid"));
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return 0;
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}
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if (seg->cache.p == 0) { /* not present */
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BX_ERROR(("read_virtual_checks(): segment not present"));
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return 0;
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}
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switch (seg->cache.type) {
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case 0: case 1: /* read only */
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case 2: case 3: /* read/write */
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case 10: case 11: /* execute/read */
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case 14: case 15: /* execute/read-only, conforming */
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if (seg->cache.u.segment.limit_scaled == 0xffffffff && seg->cache.u.segment.base == 0) {
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seg->cache.valid |= SegAccessROK | SegAccessROK4G;
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break;
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}
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if (offset > (seg->cache.u.segment.limit_scaled - length)
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|| length > seg->cache.u.segment.limit_scaled)
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{
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BX_ERROR(("read_virtual_checks(): read beyond limit"));
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return 0;
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}
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if (seg->cache.u.segment.limit_scaled >= (BX_MAX_MEM_ACCESS_LENGTH-1)) {
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// Mark cache as being OK type for succeeding reads. See notes for
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// write checks; similar code.
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seg->cache.valid |= SegAccessROK;
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}
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break;
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case 4: case 5: /* read only, expand down */
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case 6: case 7: /* read/write, expand down */
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if (seg->cache.u.segment.d_b)
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upper_limit = 0xffffffff;
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else
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upper_limit = 0x0000ffff;
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if (offset <= seg->cache.u.segment.limit_scaled ||
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offset > upper_limit || (upper_limit - offset) < length)
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{
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BX_ERROR(("read_virtual_checks(): read beyond limit expand down"));
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return 0;
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}
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break;
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case 8: case 9: /* execute only */
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case 12: case 13: /* execute only, conforming */
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/* can't read or write an execute-only segment */
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BX_ERROR(("read_virtual_checks(): execute only"));
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return 0;
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default:
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BX_PANIC(("read_virtual_checks(): unknown descriptor type=%d", seg->cache.type));
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}
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return 1;
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}
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bx_bool BX_CPP_AttrRegparmN(3)
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BX_CPU_C::execute_virtual_checks(bx_segment_reg_t *seg, Bit32u offset, unsigned length)
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{
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Bit32u upper_limit;
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if (seg->cache.valid==0) {
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BX_DEBUG(("execute_virtual_checks(): segment descriptor not valid"));
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return 0;
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}
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if (seg->cache.p == 0) { /* not present */
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BX_ERROR(("execute_virtual_checks(): segment not present"));
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return 0;
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}
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length--;
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switch (seg->cache.type) {
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case 0: case 1: /* read only */
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case 2: case 3: /* read/write */
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case 10: case 11: /* execute/read */
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case 14: case 15: /* execute/read-only, conforming */
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if (seg->cache.u.segment.limit_scaled == 0xffffffff && seg->cache.u.segment.base == 0) {
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seg->cache.valid |= SegAccessROK | SegAccessROK4G;
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break;
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}
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if (offset > (seg->cache.u.segment.limit_scaled - length)
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|| length > seg->cache.u.segment.limit_scaled)
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{
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BX_ERROR(("execute_virtual_checks(): read beyond limit"));
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return 0;
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}
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if (seg->cache.u.segment.limit_scaled >= (BX_MAX_MEM_ACCESS_LENGTH-1)) {
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// Mark cache as being OK type for succeeding reads. See notes for
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// write checks; similar code.
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seg->cache.valid |= SegAccessROK;
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}
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break;
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case 8: case 9: /* execute only */
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case 12: case 13: /* execute only, conforming */
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if (offset > (seg->cache.u.segment.limit_scaled - length)
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|| length > seg->cache.u.segment.limit_scaled)
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{
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BX_ERROR(("execute_virtual_checks(): read beyond limit execute only"));
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return 0;
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}
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break;
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case 4: case 5: /* read only, expand down */
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case 6: case 7: /* read/write, expand down */
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if (seg->cache.u.segment.d_b)
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upper_limit = 0xffffffff;
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else
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upper_limit = 0x0000ffff;
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if (offset <= seg->cache.u.segment.limit_scaled ||
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offset > upper_limit || (upper_limit - offset) < length)
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{
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BX_ERROR(("execute_virtual_checks(): read beyond limit expand down"));
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return 0;
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}
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break;
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default:
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BX_PANIC(("execute_virtual_checks(): unknown descriptor type=%d", seg->cache.type));
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}
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return 1;
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}
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const char *BX_CPU_C::strseg(bx_segment_reg_t *seg)
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{
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if (seg == &BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES]) return("ES");
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else if (seg == &BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS]) return("CS");
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else if (seg == &BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS]) return("SS");
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else if (seg == &BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS]) return("DS");
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else if (seg == &BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS]) return("FS");
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else if (seg == &BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS]) return("GS");
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else {
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BX_PANIC(("undefined segment passed to strseg()!"));
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return("??");
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}
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}
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int BX_CPU_C::int_number(unsigned s)
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{
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if (s == BX_SEG_REG_SS)
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return BX_SS_EXCEPTION;
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else
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return BX_GP_EXCEPTION;
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}
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Bit8u BX_CPP_AttrRegparmN(1)
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BX_CPU_C::system_read_byte(bx_address laddr)
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{
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Bit8u data;
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bx_address lpf = LPFOf(laddr);
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bx_TLB_entry *tlbEntry = BX_DTLB_ENTRY_OF(laddr, 0);
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if (tlbEntry->lpf == lpf) {
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// See if the TLB entry privilege level allows us read access
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// from this CPL.
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if (tlbEntry->accessBits & 0x01) {
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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Bit32u pageOffset = PAGE_OFFSET(laddr);
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Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
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data = *hostAddr;
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BX_NOTIFY_LIN_MEMORY_ACCESS(laddr, (tlbEntry->ppf | pageOffset), 1, tlbEntry->get_memtype(), BX_READ, (Bit8u*) &data);
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return data;
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}
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}
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if (access_read_linear(laddr, 1, 0, BX_READ, 0x0, (void *) &data) < 0)
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exception(BX_GP_EXCEPTION, 0);
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return data;
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}
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Bit16u BX_CPP_AttrRegparmN(1)
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BX_CPU_C::system_read_word(bx_address laddr)
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{
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Bit16u data;
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bx_address lpf = LPFOf(laddr);
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bx_TLB_entry *tlbEntry = BX_DTLB_ENTRY_OF(laddr, 1);
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if (tlbEntry->lpf == lpf) {
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// See if the TLB entry privilege level allows us read access
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// from this CPL.
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if (tlbEntry->accessBits & 0x01) {
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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Bit32u pageOffset = PAGE_OFFSET(laddr);
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Bit16u *hostAddr = (Bit16u*) (hostPageAddr | pageOffset);
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data = ReadHostWordFromLittleEndian(hostAddr);
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BX_NOTIFY_LIN_MEMORY_ACCESS(laddr, (tlbEntry->ppf | pageOffset), 2, tlbEntry->get_memtype(), BX_READ, (Bit8u*) &data);
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return data;
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}
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}
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if (access_read_linear(laddr, 2, 0, BX_READ, 0x0, (void *) &data) < 0)
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exception(BX_GP_EXCEPTION, 0);
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return data;
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}
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Bit32u BX_CPP_AttrRegparmN(1)
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BX_CPU_C::system_read_dword(bx_address laddr)
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{
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Bit32u data;
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bx_address lpf = LPFOf(laddr);
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bx_TLB_entry *tlbEntry = BX_DTLB_ENTRY_OF(laddr, 3);
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if (tlbEntry->lpf == lpf) {
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// See if the TLB entry privilege level allows us read access
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// from this CPL.
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if (tlbEntry->accessBits & 0x01) {
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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Bit32u pageOffset = PAGE_OFFSET(laddr);
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Bit32u *hostAddr = (Bit32u*) (hostPageAddr | pageOffset);
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data = ReadHostDWordFromLittleEndian(hostAddr);
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BX_NOTIFY_LIN_MEMORY_ACCESS(laddr, (tlbEntry->ppf | pageOffset), 4, tlbEntry->get_memtype(), BX_READ, (Bit8u*) &data);
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return data;
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}
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}
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if (access_read_linear(laddr, 4, 0, BX_READ, 0x0, (void *) &data) < 0)
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exception(BX_GP_EXCEPTION, 0);
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return data;
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}
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Bit64u BX_CPP_AttrRegparmN(1)
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BX_CPU_C::system_read_qword(bx_address laddr)
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{
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Bit64u data;
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bx_address lpf = LPFOf(laddr);
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bx_TLB_entry *tlbEntry = BX_DTLB_ENTRY_OF(laddr, 7);
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if (tlbEntry->lpf == lpf) {
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// See if the TLB entry privilege level allows us read access
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// from this CPL.
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if (tlbEntry->accessBits & 0x01) {
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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Bit32u pageOffset = PAGE_OFFSET(laddr);
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Bit64u *hostAddr = (Bit64u*) (hostPageAddr | pageOffset);
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data = ReadHostQWordFromLittleEndian(hostAddr);
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BX_NOTIFY_LIN_MEMORY_ACCESS(laddr, (tlbEntry->ppf | pageOffset), 8, tlbEntry->get_memtype(), BX_READ, (Bit8u*) &data);
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return data;
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}
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}
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if (access_read_linear(laddr, 8, 0, BX_READ, 0x0, (void *) &data) < 0)
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exception(BX_GP_EXCEPTION, 0);
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return data;
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}
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void BX_CPP_AttrRegparmN(2)
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BX_CPU_C::system_write_byte(bx_address laddr, Bit8u data)
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{
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bx_address lpf = LPFOf(laddr);
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bx_TLB_entry *tlbEntry = BX_DTLB_ENTRY_OF(laddr, 0);
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if (tlbEntry->lpf == lpf) {
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// See if the TLB entry privilege level allows us write access
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// from this CPL.
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if (isWriteOK(tlbEntry, 0)) {
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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Bit32u pageOffset = PAGE_OFFSET(laddr);
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bx_phy_address pAddr = tlbEntry->ppf | pageOffset;
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BX_NOTIFY_LIN_MEMORY_ACCESS(laddr, pAddr, 1, tlbEntry->get_memtype(), BX_WRITE, (Bit8u*) &data);
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Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
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pageWriteStampTable.decWriteStamp(pAddr, 1);
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*hostAddr = data;
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return;
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}
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}
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if (access_write_linear(laddr, 1, 0, BX_WRITE, 0x0, (void *) &data) < 0)
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exception(BX_GP_EXCEPTION, 0);
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}
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void BX_CPP_AttrRegparmN(2)
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BX_CPU_C::system_write_word(bx_address laddr, Bit16u data)
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{
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bx_address lpf = LPFOf(laddr);
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bx_TLB_entry *tlbEntry = BX_DTLB_ENTRY_OF(laddr, 1);
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if (tlbEntry->lpf == lpf) {
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// See if the TLB entry privilege level allows us write access
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// from this CPL.
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if (isWriteOK(tlbEntry, 0)) {
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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Bit32u pageOffset = PAGE_OFFSET(laddr);
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bx_phy_address pAddr = tlbEntry->ppf | pageOffset;
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BX_NOTIFY_LIN_MEMORY_ACCESS(laddr, pAddr, 2, tlbEntry->get_memtype(), BX_WRITE, (Bit8u*) &data);
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Bit16u *hostAddr = (Bit16u*) (hostPageAddr | pageOffset);
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pageWriteStampTable.decWriteStamp(pAddr, 2);
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WriteHostWordToLittleEndian(hostAddr, data);
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return;
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}
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}
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if (access_write_linear(laddr, 2, 0, BX_WRITE, 0x0, (void *) &data) < 0)
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exception(BX_GP_EXCEPTION, 0);
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}
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void BX_CPP_AttrRegparmN(2)
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BX_CPU_C::system_write_dword(bx_address laddr, Bit32u data)
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{
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bx_address lpf = LPFOf(laddr);
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bx_TLB_entry *tlbEntry = BX_DTLB_ENTRY_OF(laddr, 3);
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if (tlbEntry->lpf == lpf) {
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// See if the TLB entry privilege level allows us write access
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// from this CPL.
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if (isWriteOK(tlbEntry, 0)) {
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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Bit32u pageOffset = PAGE_OFFSET(laddr);
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bx_phy_address pAddr = tlbEntry->ppf | pageOffset;
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BX_NOTIFY_LIN_MEMORY_ACCESS(laddr, pAddr, 4, tlbEntry->get_memtype(), BX_WRITE, (Bit8u*) &data);
|
|
Bit32u *hostAddr = (Bit32u*) (hostPageAddr | pageOffset);
|
|
pageWriteStampTable.decWriteStamp(pAddr, 4);
|
|
WriteHostDWordToLittleEndian(hostAddr, data);
|
|
return;
|
|
}
|
|
}
|
|
|
|
if (access_write_linear(laddr, 4, 0, BX_WRITE, 0x0, (void *) &data) < 0)
|
|
exception(BX_GP_EXCEPTION, 0);
|
|
}
|
|
|
|
Bit8u* BX_CPP_AttrRegparmN(2)
|
|
BX_CPU_C::v2h_read_byte(bx_address laddr, bx_bool user)
|
|
{
|
|
bx_address lpf = LPFOf(laddr);
|
|
bx_TLB_entry *tlbEntry = BX_DTLB_ENTRY_OF(laddr, 0);
|
|
if (tlbEntry->lpf == lpf) {
|
|
// See if the TLB entry privilege level allows us read access
|
|
// from this CPL.
|
|
if (isReadOK(tlbEntry, user)) {
|
|
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
|
|
Bit32u pageOffset = PAGE_OFFSET(laddr);
|
|
Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
|
|
return hostAddr;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
Bit8u* BX_CPP_AttrRegparmN(2)
|
|
BX_CPU_C::v2h_write_byte(bx_address laddr, bx_bool user)
|
|
{
|
|
bx_address lpf = LPFOf(laddr);
|
|
bx_TLB_entry *tlbEntry = BX_DTLB_ENTRY_OF(laddr, 0);
|
|
if (tlbEntry->lpf == lpf)
|
|
{
|
|
// See if the TLB entry privilege level allows us write access
|
|
// from this CPL.
|
|
if (isWriteOK(tlbEntry, user)) {
|
|
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
|
|
Bit32u pageOffset = PAGE_OFFSET(laddr);
|
|
Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
|
|
pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
|
|
return hostAddr;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|