347 lines
8.1 KiB
C++
347 lines
8.1 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2012 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_EwGwM(bxInstruction_c *i)
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{
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Bit16u op1_16, op2_16;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
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op2_16 = BX_READ_16BIT_REG(i->nnn());
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op1_16 ^= op2_16;
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write_RMW_virtual_word(op1_16);
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_GwEwR(bxInstruction_c *i)
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{
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Bit16u op1_16, op2_16;
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op1_16 = BX_READ_16BIT_REG(i->nnn());
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op2_16 = BX_READ_16BIT_REG(i->rm());
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op1_16 ^= op2_16;
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BX_WRITE_16BIT_REG(i->nnn(), op1_16);
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_GwEwM(bxInstruction_c *i)
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{
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Bit16u op1_16, op2_16;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op1_16 = BX_READ_16BIT_REG(i->nnn());
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op2_16 = read_virtual_word(i->seg(), eaddr);
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op1_16 ^= op2_16;
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BX_WRITE_16BIT_REG(i->nnn(), op1_16);
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_AXIw(bxInstruction_c *i)
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{
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Bit16u op_16 = AX ^ i->Iw();
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AX = op_16;
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SET_FLAGS_OSZAPC_LOGIC_16(op_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_EwIwM(bxInstruction_c *i)
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{
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Bit16u op1_16;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
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op1_16 ^= i->Iw();
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write_RMW_virtual_word(op1_16);
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_EwIwR(bxInstruction_c *i)
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{
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Bit16u op1_16 = BX_READ_16BIT_REG(i->rm());
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op1_16 ^= i->Iw();
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BX_WRITE_16BIT_REG(i->rm(), op1_16);
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_EwIwM(bxInstruction_c *i)
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{
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Bit16u op1_16;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
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op1_16 |= i->Iw();
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write_RMW_virtual_word(op1_16);
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_EwIwR(bxInstruction_c *i)
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{
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Bit16u op1_16 = BX_READ_16BIT_REG(i->rm());
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op1_16 |= i->Iw();
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BX_WRITE_16BIT_REG(i->rm(), op1_16);
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NOT_EwM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit16u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
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op1_16 = ~op1_16;
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write_RMW_virtual_word(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NOT_EwR(bxInstruction_c *i)
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{
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Bit16u op1_16 = BX_READ_16BIT_REG(i->rm());
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op1_16 = ~op1_16;
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BX_WRITE_16BIT_REG(i->rm(), op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_EwGwM(bxInstruction_c *i)
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{
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Bit16u op1_16, op2_16;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
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op2_16 = BX_READ_16BIT_REG(i->nnn());
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op1_16 |= op2_16;
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write_RMW_virtual_word(op1_16);
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_GwEwR(bxInstruction_c *i)
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{
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Bit16u op1_16, op2_16;
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op1_16 = BX_READ_16BIT_REG(i->nnn());
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op2_16 = BX_READ_16BIT_REG(i->rm());
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op1_16 |= op2_16;
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BX_WRITE_16BIT_REG(i->nnn(), op1_16);
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_GwEwM(bxInstruction_c *i)
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{
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Bit16u op1_16, op2_16;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op1_16 = BX_READ_16BIT_REG(i->nnn());
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op2_16 = read_virtual_word(i->seg(), eaddr);
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op1_16 |= op2_16;
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BX_WRITE_16BIT_REG(i->nnn(), op1_16);
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_AXIw(bxInstruction_c *i)
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{
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Bit16u op_16 = AX | i->Iw();
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AX = op_16;
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SET_FLAGS_OSZAPC_LOGIC_16(op_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_EwGwM(bxInstruction_c *i)
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{
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Bit16u op1_16, op2_16;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
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op2_16 = BX_READ_16BIT_REG(i->nnn());
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op1_16 &= op2_16;
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write_RMW_virtual_word(op1_16);
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_GwEwR(bxInstruction_c *i)
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{
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Bit16u op1_16, op2_16;
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op1_16 = BX_READ_16BIT_REG(i->nnn());
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op2_16 = BX_READ_16BIT_REG(i->rm());
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op1_16 &= op2_16;
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BX_WRITE_16BIT_REG(i->nnn(), op1_16);
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_GwEwM(bxInstruction_c *i)
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{
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Bit16u op1_16, op2_16;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op1_16 = BX_READ_16BIT_REG(i->nnn());
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op2_16 = read_virtual_word(i->seg(), eaddr);
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op1_16 &= op2_16;
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BX_WRITE_16BIT_REG(i->nnn(), op1_16);
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_AXIw(bxInstruction_c *i)
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{
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Bit16u op_16 = AX & i->Iw();
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AX = op_16;
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SET_FLAGS_OSZAPC_LOGIC_16(op_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_EwIwM(bxInstruction_c *i)
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{
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Bit16u op1_16;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
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op1_16 &= i->Iw();
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write_RMW_virtual_word(op1_16);
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_EwIwR(bxInstruction_c *i)
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{
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Bit16u op1_16 = BX_READ_16BIT_REG(i->rm());
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op1_16 &= i->Iw();
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BX_WRITE_16BIT_REG(i->rm(), op1_16);
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_EwGwR(bxInstruction_c *i)
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{
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Bit16u op1_16, op2_16;
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op1_16 = BX_READ_16BIT_REG(i->rm());
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op2_16 = BX_READ_16BIT_REG(i->nnn());
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op1_16 &= op2_16;
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_EwGwM(bxInstruction_c *i)
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{
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Bit16u op1_16, op2_16;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op1_16 = read_virtual_word(i->seg(), eaddr);
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op2_16 = BX_READ_16BIT_REG(i->nnn());
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op1_16 &= op2_16;
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_AXIw(bxInstruction_c *i)
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{
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Bit16u op_16 = AX & i->Iw();
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SET_FLAGS_OSZAPC_LOGIC_16(op_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_EwIwR(bxInstruction_c *i)
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{
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Bit16u op1_16 = BX_READ_16BIT_REG(i->rm());
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op1_16 &= i->Iw();
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_EwIwM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit16u op1_16 = read_virtual_word(i->seg(), eaddr);
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op1_16 &= i->Iw();
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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BX_NEXT_INSTR(i);
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}
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