cc694377b9
Bochs instruction emulation handlers won't refer to direct fields of instructions like MODRM.NNN or MODRM.RM anymore. Use generic source/destination indications like SRC1, SRC2 and DST. All handlers are modified to support new notation. In addition fetchDecode module was modified to assign sources to instructions properly. Immediate benefits: - Removal of several duplicated handlers (FMA3 duplicated with FMA4 is a trivial example) - Simpler to understand fetch-decode code Future benefits: - Integration of disassembler into Bochs CPU module, ability to disasm bx_instruction_c instance (planned) Huge patch. Almost all source files wre modified.
252 lines
7.1 KiB
C++
252 lines
7.1 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2011-2012 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_AVX
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bx_address BX_CPP_AttrRegparmN(2) BX_CPU_C::BxResolveGatherD(bxInstruction_c *i, unsigned element)
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{
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Bit32s index = BX_READ_AVX_REG(i->sibIndex()).avx32s(element);
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if (i->as64L())
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return (BX_READ_64BIT_REG(i->sibBase()) + (((Bit64s) index) << i->sibScale()) + i->displ32s());
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else
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return (Bit32u) (BX_READ_32BIT_REG(i->sibBase()) + (index << i->sibScale()) + i->displ32s());
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}
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bx_address BX_CPP_AttrRegparmN(2) BX_CPU_C::BxResolveGatherQ(bxInstruction_c *i, unsigned element)
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{
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Bit64s index = BX_READ_AVX_REG(i->sibIndex()).avx64s(element);
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if (i->as64L())
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return (BX_READ_64BIT_REG(i->sibBase()) + (index << i->sibScale()) + i->displ32s());
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else
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return (Bit32u) (BX_READ_32BIT_REG(i->sibBase()) + (index << i->sibScale()) + i->displ32s());
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VGATHERDPS_VpsHps(bxInstruction_c *i)
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{
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if (! i->as32L()) {
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BX_ERROR(("VGATHERDPS_VpsHps: Gather with 16-bit address size"));
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exception(BX_UD_EXCEPTION, 0);
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}
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if (i->sibIndex() == BX_NIL_REGISTER) {
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BX_ERROR(("VGATHERDPS_VpsHps: incorrect source operands"));
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exception(BX_UD_EXCEPTION, 0);
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}
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if (i->sibIndex() == i->src2() || i->sibIndex() == i->dst() || i->src2() == i->dst()) {
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BX_ERROR(("VGATHERDPS_VpsHps: incorrect source operands"));
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exception(BX_UD_EXCEPTION, 0);
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}
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BxPackedAvxRegister *mask = &BX_AVX_REG(i->src2()), *dest = &BX_AVX_REG(i->dst());
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// index size = 32, element_size = 32, max vector size = 256
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// num_elements:
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// 128 bit => 4
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// 256 bit => 8
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unsigned n, num_elements = 4 * i->getVL();
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for (n=0; n < num_elements; n++) {
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if (mask->avx32u(n) & 0x80000000)
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mask->avx32u(n) = 0xffffffff;
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else
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mask->avx32u(n) = 0;
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}
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for (n=0; n < 8; n++)
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{
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if (n >= num_elements) {
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mask->avx32u(n) = 0;
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dest->avx32u(n) = 0;
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continue;
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}
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if (mask->avx32u(n)) {
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dest->avx32u(n) = read_virtual_dword(i->seg(), BxResolveGatherD(i, n));
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}
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mask->avx32u(n) = 0;
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}
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VGATHERQPS_VpsHps(bxInstruction_c *i)
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{
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if (! i->as32L()) {
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BX_ERROR(("VGATHERQPS_VpsHps: Gather with 16-bit address size"));
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exception(BX_UD_EXCEPTION, 0);
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}
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if (i->sibIndex() == BX_NIL_REGISTER) {
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BX_ERROR(("VGATHERQPS_VpsHps: incorrect source operands"));
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exception(BX_UD_EXCEPTION, 0);
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}
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if (i->sibIndex() == i->src2() || i->sibIndex() == i->dst() || i->src2() == i->dst()) {
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BX_ERROR(("VGATHERQPS_VpsHps: incorrect source operands"));
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exception(BX_UD_EXCEPTION, 0);
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}
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// index size = 64, element_size = 32, max vector size = 256
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// num_elements:
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// 128 bit => 2
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// 256 bit => 4
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BxPackedAvxRegister *mask = &BX_AVX_REG(i->src2()), *dest = &BX_AVX_REG(i->dst());
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unsigned n, num_elements = 2 * i->getVL();
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for (n=0; n < num_elements; n++) {
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if (mask->avx32u(n) & 0x80000000)
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mask->avx32u(n) = 0xffffffff;
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else
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mask->avx32u(n) = 0;
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}
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for (n=0; n < 4; n++)
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{
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if (n >= num_elements) {
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mask->avx32u(n) = 0;
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dest->avx32u(n) = 0;
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continue;
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}
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if (mask->avx32u(n)) {
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dest->avx32u(n) = read_virtual_dword(i->seg(), BxResolveGatherQ(i, n));
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}
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mask->avx32u(n) = 0;
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}
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BX_CLEAR_AVX_HIGH(i->dst());
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BX_CLEAR_AVX_HIGH(i->src2());
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VGATHERDPD_VpdHpd(bxInstruction_c *i)
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{
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if (! i->as32L()) {
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BX_ERROR(("VGATHERDPD_VpdHpd: Gather with 16-bit address size"));
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exception(BX_UD_EXCEPTION, 0);
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}
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if (i->sibIndex() == BX_NIL_REGISTER) {
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BX_ERROR(("VGATHERDPD_VpdHpd: incorrect source operands"));
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exception(BX_UD_EXCEPTION, 0);
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}
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if (i->sibIndex() == i->src2() || i->sibIndex() == i->dst() || i->src2() == i->dst()) {
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BX_ERROR(("VGATHERDPD_VpdHpd: incorrect source operands"));
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exception(BX_UD_EXCEPTION, 0);
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}
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// index size = 32, element_size = 64, max vector size = 256
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// num_elements:
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// 128 bit => 2
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// 256 bit => 4
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BxPackedAvxRegister *mask = &BX_AVX_REG(i->src2()), *dest = &BX_AVX_REG(i->dst());
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unsigned n, num_elements = 2 * i->getVL();
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for (n=0; n < num_elements; n++) {
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if (mask->avx64u(n) & BX_CONST64(0x8000000000000000))
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mask->avx64u(n) = BX_CONST64(0xffffffffffffffff);
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else
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mask->avx64u(n) = 0;
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}
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for (unsigned n=0; n < 4; n++)
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{
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if (n >= num_elements) {
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mask->avx64u(n) = 0;
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dest->avx64u(n) = 0;
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continue;
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}
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if (mask->avx64u(n)) {
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dest->avx64u(n) = read_virtual_qword(i->seg(), BxResolveGatherD(i, n));
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}
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mask->avx64u(n) = 0;
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}
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VGATHERQPD_VpdHpd(bxInstruction_c *i)
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{
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if (! i->as32L()) {
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BX_ERROR(("VGATHERQPD_VpdHpd: Gather with 16-bit address size"));
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exception(BX_UD_EXCEPTION, 0);
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}
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if (i->sibIndex() == BX_NIL_REGISTER) {
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BX_ERROR(("VGATHERQPD_VpdHpd: incorrect source operands"));
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exception(BX_UD_EXCEPTION, 0);
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}
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if (i->sibIndex() == i->src2() || i->sibIndex() == i->dst() || i->src2() == i->dst()) {
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BX_ERROR(("VGATHERQPD_VpdHpd: incorrect source operands"));
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exception(BX_UD_EXCEPTION, 0);
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}
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// index size = 64, element_size = 64, max vector size = 256
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// num_elements:
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// 128 bit => 2
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// 256 bit => 4
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BxPackedAvxRegister *mask = &BX_AVX_REG(i->src2()), *dest = &BX_AVX_REG(i->dst());
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unsigned n, num_elements = 2 * i->getVL();
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for (n=0; n < num_elements; n++) {
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if (mask->avx64u(n) & BX_CONST64(0x8000000000000000))
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mask->avx64u(n) = BX_CONST64(0xffffffffffffffff);
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else
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mask->avx64u(n) = 0;
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}
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for (n=0; n < 4; n++)
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{
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if (n >= num_elements) {
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mask->avx64u(n) = 0;
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dest->avx64u(n) = 0;
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continue;
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}
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if (mask->avx64u(n)) {
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dest->avx64u(n) = read_virtual_qword(i->seg(), BxResolveGatherQ(i, n));
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}
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mask->avx64u(n) = 0;
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}
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BX_NEXT_INSTR(i);
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}
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#endif
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