6dba96d10a
- Added support for setting memory write handler to NULL (ROM case). - Added new PCI device method after_restore_pci_state(). It currently handles the PCI ROM case only (could be extended).
272 lines
10 KiB
C++
272 lines
10 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2017 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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// Peter Grehan (grehan@iprg.nokia.com) coded all of this
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// NE2000/ether stuff.
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//
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// An implementation of an ne2000 ISA ethernet adapter. This part uses
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// a National Semiconductor DS-8390 ethernet MAC chip, with some h/w
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// to provide a windowed memory region for the chip and a MAC address.
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//
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#ifndef BX_IODEV_NE2K
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#define BX_IODEV_NE2K
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#if BX_USE_NE2K_SMF
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# define BX_NE2K_SMF static
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# define BX_NE2K_THIS theNE2kDevice->
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# define BX_NE2K_THIS_PTR theNE2kDevice
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#else
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# define BX_NE2K_SMF
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# define BX_NE2K_THIS this->
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# define BX_NE2K_THIS_PTR this
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#endif
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#define BX_NE2K_MEMSIZ (32*1024)
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#define BX_NE2K_MEMSTART (16*1024)
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#define BX_NE2K_MEMEND (BX_NE2K_MEMSTART + BX_NE2K_MEMSIZ)
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class eth_pktmover_c;
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typedef struct {
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//
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// ne2k register state
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//
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// Page 0
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//
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// Command Register - 00h read/write
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struct {
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bx_bool stop; // STP - Software Reset command
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bx_bool start; // START - start the NIC
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bx_bool tx_packet; // TXP - initiate packet transmission
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Bit8u rdma_cmd; // RD0,RD1,RD2 - Remote DMA command
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Bit8u pgsel; // PS0,PS1 - Page select
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} CR;
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// Interrupt Status Register - 07h read/write
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struct {
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bx_bool pkt_rx; // PRX - packet received with no errors
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bx_bool pkt_tx; // PTX - packet transmitted with no errors
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bx_bool rx_err; // RXE - packet received with 1 or more errors
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bx_bool tx_err; // TXE - packet tx'd " " " " "
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bx_bool overwrite; // OVW - rx buffer resources exhausted
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bx_bool cnt_oflow; // CNT - network tally counter MSB's set
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bx_bool rdma_done; // RDC - remote DMA complete
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bx_bool reset; // RST - reset status
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} ISR;
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// Interrupt Mask Register - 0fh write
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struct {
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bx_bool rx_inte; // PRXE - packet rx interrupt enable
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bx_bool tx_inte; // PTXE - packet tx interrput enable
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bx_bool rxerr_inte; // RXEE - rx error interrupt enable
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bx_bool txerr_inte; // TXEE - tx error interrupt enable
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bx_bool overw_inte; // OVWE - overwrite warn int enable
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bx_bool cofl_inte; // CNTE - counter o'flow int enable
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bx_bool rdma_inte; // RDCE - remote DMA complete int enable
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bx_bool reserved; // D7 - reserved
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} IMR;
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// Data Configuration Register - 0eh write
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struct {
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bx_bool wdsize; // WTS - 8/16-bit select
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bx_bool endian; // BOS - byte-order select
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bx_bool longaddr; // LAS - long-address select
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bx_bool loop; // LS - loopback select
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bx_bool auto_rx; // AR - auto-remove rx packets with remote DMA
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Bit8u fifo_size; // FT0,FT1 - fifo threshold
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} DCR;
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// Transmit Configuration Register - 0dh write
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struct {
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bx_bool crc_disable; // CRC - inhibit tx CRC
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Bit8u loop_cntl; // LB0,LB1 - loopback control
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bx_bool ext_stoptx; // ATD - allow tx disable by external mcast
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bx_bool coll_prio; // OFST - backoff algorithm select
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Bit8u reserved; // D5,D6,D7 - reserved
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} TCR;
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// Transmit Status Register - 04h read
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struct {
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bx_bool tx_ok; // PTX - tx complete without error
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bx_bool reserved; // D1 - reserved
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bx_bool collided; // COL - tx collided >= 1 times
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bx_bool aborted; // ABT - aborted due to excessive collisions
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bx_bool no_carrier; // CRS - carrier-sense lost
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bx_bool fifo_ur; // FU - FIFO underrun
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bx_bool cd_hbeat; // CDH - no tx cd-heartbeat from transceiver
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bx_bool ow_coll; // OWC - out-of-window collision
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} TSR;
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// Receive Configuration Register - 0ch write
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struct {
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bx_bool errors_ok; // SEP - accept pkts with rx errors
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bx_bool runts_ok; // AR - accept < 64-byte runts
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bx_bool broadcast; // AB - accept eth broadcast address
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bx_bool multicast; // AM - check mcast hash array
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bx_bool promisc; // PRO - accept all packets
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bx_bool monitor; // MON - check pkts, but don't rx
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Bit8u reserved; // D6,D7 - reserved
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} RCR;
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// Receive Status Register - 0ch read
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struct {
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bx_bool rx_ok; // PRX - rx complete without error
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bx_bool bad_crc; // CRC - Bad CRC detected
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bx_bool bad_falign; // FAE - frame alignment error
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bx_bool fifo_or; // FO - FIFO overrun
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bx_bool rx_missed; // MPA - missed packet error
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bx_bool rx_mbit; // PHY - unicast or mcast/bcast address match
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bx_bool rx_disabled; // DIS - set when in monitor mode
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bx_bool deferred; // DFR - collision active
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} RSR;
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Bit16u local_dma; // 01,02h read ; current local DMA addr
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Bit8u page_start; // 01h write ; page start register
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Bit8u page_stop; // 02h write ; page stop register
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Bit8u bound_ptr; // 03h read/write ; boundary pointer
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Bit8u tx_page_start; // 04h write ; transmit page start register
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Bit8u num_coll; // 05h read ; number-of-collisions register
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Bit16u tx_bytes; // 05,06h write ; transmit byte-count register
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Bit8u fifo; // 06h read ; FIFO
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Bit16u remote_dma; // 08,09h read ; current remote DMA addr
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Bit16u remote_start; // 08,09h write ; remote start address register
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Bit16u remote_bytes; // 0a,0bh write ; remote byte-count register
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Bit8u tallycnt_0; // 0dh read ; tally counter 0 (frame align errors)
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Bit8u tallycnt_1; // 0eh read ; tally counter 1 (CRC errors)
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Bit8u tallycnt_2; // 0fh read ; tally counter 2 (missed pkt errors)
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//
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// Page 1
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//
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// Command Register 00h (repeated)
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//
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Bit8u physaddr[6]; // 01-06h read/write ; MAC address
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Bit8u curr_page; // 07h read/write ; current page register
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Bit8u mchash[8]; // 08-0fh read/write ; multicast hash array
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//
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// Page 2 - diagnostic use only
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//
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// Command Register 00h (repeated)
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//
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// Page Start Register 01h read (repeated)
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// Page Stop Register 02h read (repeated)
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// Current Local DMA Address 01,02h write (repeated)
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// Transmit Page start address 04h read (repeated)
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// Receive Configuration Register 0ch read (repeated)
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// Transmit Configuration Register 0dh read (repeated)
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// Data Configuration Register 0eh read (repeated)
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// Interrupt Mask Register 0fh read (repeated)
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//
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Bit8u rempkt_ptr; // 03h read/write ; remote next-packet pointer
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Bit8u localpkt_ptr; // 05h read/write ; local next-packet pointer
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Bit16u address_cnt; // 06,07h read/write ; address counter
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//
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// Page 3 - should never be modified.
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//
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// Novell ASIC state
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Bit8u macaddr[32]; // ASIC ROM'd MAC address, even bytes
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Bit8u mem[BX_NE2K_MEMSIZ]; // on-chip packet memory
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// ne2k internal state
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Bit32u base_address;
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int base_irq;
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int tx_timer_index;
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bx_bool tx_timer_active;
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int statusbar_id;
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// pci stuff
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bx_bool pci_enabled;
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#if BX_SUPPORT_PCI
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Bit8u devfunc;
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#endif
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} bx_ne2k_t;
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class bx_ne2k_c
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#if BX_SUPPORT_PCI
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: public bx_pci_device_c
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#else
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: public bx_devmodel_c
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#endif
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{
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public:
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bx_ne2k_c();
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virtual ~bx_ne2k_c();
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virtual void init(void);
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virtual void reset(unsigned type);
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virtual void register_state(void);
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#if BX_SUPPORT_PCI
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virtual void after_restore_state(void);
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#endif
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#if BX_DEBUGGER
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virtual void debug_dump(int argc, char **argv);
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#endif
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#if BX_SUPPORT_PCI
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virtual void pci_write_handler(Bit8u address, Bit32u value, unsigned io_len);
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#endif
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private:
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bx_ne2k_t s;
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eth_pktmover_c *ethdev;
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BX_NE2K_SMF Bit32u read_cr(void);
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BX_NE2K_SMF void write_cr(Bit32u value);
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BX_NE2K_SMF void set_irq_level(bx_bool level);
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BX_NE2K_SMF Bit32u chipmem_read(Bit32u address, unsigned io_len) BX_CPP_AttrRegparmN(2);
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BX_NE2K_SMF Bit32u asic_read(Bit32u offset, unsigned io_len) BX_CPP_AttrRegparmN(2);
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BX_NE2K_SMF Bit32u page0_read(Bit32u offset, unsigned io_len);
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BX_NE2K_SMF Bit32u page1_read(Bit32u offset, unsigned io_len);
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BX_NE2K_SMF Bit32u page2_read(Bit32u offset, unsigned io_len);
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BX_NE2K_SMF Bit32u page3_read(Bit32u offset, unsigned io_len);
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BX_NE2K_SMF void chipmem_write(Bit32u address, Bit32u value, unsigned io_len) BX_CPP_AttrRegparmN(3);
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BX_NE2K_SMF void asic_write(Bit32u address, Bit32u value, unsigned io_len);
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BX_NE2K_SMF void page0_write(Bit32u address, Bit32u value, unsigned io_len);
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BX_NE2K_SMF void page1_write(Bit32u address, Bit32u value, unsigned io_len);
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BX_NE2K_SMF void page2_write(Bit32u address, Bit32u value, unsigned io_len);
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BX_NE2K_SMF void page3_write(Bit32u address, Bit32u value, unsigned io_len);
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static void tx_timer_handler(void *);
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BX_NE2K_SMF void tx_timer(void);
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static Bit32u rx_status_handler(void *arg);
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BX_NE2K_SMF Bit32u rx_status(void);
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static void rx_handler(void *arg, const void *buf, unsigned len);
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BX_NE2K_SMF unsigned mcast_index(const void *dst);
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BX_NE2K_SMF void rx_frame(const void *buf, unsigned io_len);
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#if BX_SUPPORT_PCI
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BX_NE2K_SMF bx_bool mem_read_handler(bx_phy_address addr, unsigned len, void *data, void *param);
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#endif
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static Bit32u read_handler(void *this_ptr, Bit32u address, unsigned io_len);
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static void write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len);
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#if !BX_USE_NE2K_SMF
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Bit32u read(Bit32u address, unsigned io_len);
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void write(Bit32u address, Bit32u value, unsigned io_len);
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#endif
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#if BX_DEBUGGER
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void print_info(int page, int reg, int nodups);
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#endif
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};
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#endif
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