b84f0bd0f2
there to offer a way to substitute more efficient code to do the RMW cases. At the moment, they just map to the normal functions. Sorry, restored the previous version ...
393 lines
7.9 KiB
C++
393 lines
7.9 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: shift8.cc,v 1.14 2002-10-25 18:26:29 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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void
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BX_CPU_C::ROL_Eb(bxInstruction_c *i)
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{
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Bit8u op1_8, result_8;
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unsigned count;
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if (i->b1() == 0xc0)
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count = i->Ib();
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else if (i->b1() == 0xd0)
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count = 1;
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else // 0xd2
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count = CL;
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count &= 0x07; // use only lowest 3 bits
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/* op1 is a register or memory reference */
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if (i->modC0()) {
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op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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/* pointer, segment address pair */
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1_8);
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}
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if (count) {
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result_8 = (op1_8 << count) | (op1_8 >> (8 - count));
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/* now write result back to destination */
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if (i->modC0()) {
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
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}
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else {
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Write_RMW_virtual_byte(result_8);
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}
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/* set eflags:
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* ROL count affects the following flags: C
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*/
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set_CF(result_8 & 0x01);
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if (count == 1)
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set_OF(((op1_8 ^ result_8) & 0x80) > 0);
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}
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}
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void
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BX_CPU_C::ROR_Eb(bxInstruction_c *i)
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{
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Bit8u op1_8, result_8;
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Bit8u result_b7;
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unsigned count;
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if (i->b1() == 0xc0)
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count = i->Ib();
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else if (i->b1() == 0xd0)
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count = 1;
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else // 0xd2
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count = CL;
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count &= 0x07; /* use only bottom 3 bits */
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/* op1 is a register or memory reference */
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if (i->modC0()) {
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op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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/* pointer, segment address pair */
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1_8);
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}
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if (count) {
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result_8 = (op1_8 >> count) | (op1_8 << (8 - count));
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/* now write result back to destination */
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if (i->modC0()) {
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
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}
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else {
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Write_RMW_virtual_byte(result_8);
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}
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/* set eflags:
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* ROR count affects the following flags: C
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*/
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result_b7 = result_8 & 0x80;
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set_CF(result_b7 != 0);
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if (count == 1)
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set_OF(((op1_8 ^ result_8) & 0x80) > 0);
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}
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}
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void
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BX_CPU_C::RCL_Eb(bxInstruction_c *i)
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{
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Bit8u op1_8, result_8;
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unsigned count;
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if (i->b1() == 0xc0)
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count = i->Ib();
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else if (i->b1() == 0xd0)
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count = 1;
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else // 0xd2
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count = CL;
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count = (count & 0x1F) % 9;
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/* op1 is a register or memory reference */
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if (i->modC0()) {
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op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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/* pointer, segment address pair */
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1_8);
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}
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if (count) {
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result_8 = (op1_8 << count) |
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(getB_CF() << (count - 1)) |
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(op1_8 >> (9 - count));
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/* now write result back to destination */
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if (i->modC0()) {
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
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}
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else {
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Write_RMW_virtual_byte(result_8);
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}
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/* set eflags:
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* RCL count affects the following flags: C
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*/
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if (count == 1)
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set_OF(((op1_8 ^ result_8) & 0x80) > 0);
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set_CF((op1_8 >> (8 - count)) & 0x01);
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}
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}
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void
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BX_CPU_C::RCR_Eb(bxInstruction_c *i)
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{
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Bit8u op1_8, result_8;
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unsigned count;
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if (i->b1() == 0xc0)
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count = i->Ib();
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else if (i->b1() == 0xd0)
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count = 1;
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else // 0xd2
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count = CL;
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count = ( count & 0x1F ) % 9;
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/* op1 is a register or memory reference */
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if (i->modC0()) {
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op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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/* pointer, segment address pair */
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1_8);
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}
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if (count) {
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result_8 = (op1_8 >> count) |
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(getB_CF() << (8 - count)) |
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(op1_8 << (9 - count));
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/* now write result back to destination */
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if (i->modC0()) {
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
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}
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else {
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Write_RMW_virtual_byte(result_8);
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}
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/* set eflags:
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* RCR count affects the following flags: C
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*/
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set_CF((op1_8 >> (count - 1)) & 0x01);
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if (count == 1)
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set_OF(((op1_8 ^ result_8) & 0x80) > 0);
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}
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}
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void
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BX_CPU_C::SHL_Eb(bxInstruction_c *i)
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{
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Bit8u op1_8, result_8;
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unsigned count;
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if (i->b1() == 0xc0)
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count = i->Ib();
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else if (i->b1() == 0xd0)
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count = 1;
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else // 0xd2
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count = CL;
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count &= 0x1F;
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/* op1 is a register or memory reference */
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if (i->modC0()) {
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op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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/* pointer, segment address pair */
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1_8);
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}
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if (!count) return;
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result_8 = (op1_8 << count);
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/* now write result back to destination */
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if (i->modC0()) {
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
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}
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else {
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Write_RMW_virtual_byte(result_8);
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}
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SET_FLAGS_OSZAPC_8(op1_8, count, result_8, BX_INSTR_SHL8);
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}
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void
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BX_CPU_C::SHR_Eb(bxInstruction_c *i)
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{
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Bit8u op1_8, result_8;
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unsigned count;
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if (i->b1() == 0xc0)
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count = i->Ib();
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else if (i->b1() == 0xd0)
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count = 1;
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else // 0xd2
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count = CL;
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count &= 0x1F;
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/* op1 is a register or memory reference */
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if (i->modC0()) {
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op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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/* pointer, segment address pair */
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1_8);
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}
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if (!count) return;
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result_8 = (op1_8 >> count);
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/* now write result back to destination */
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if (i->modC0()) {
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
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}
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else {
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Write_RMW_virtual_byte(result_8);
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}
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SET_FLAGS_OSZAPC_8(op1_8, count, result_8, BX_INSTR_SHR8);
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}
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void
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BX_CPU_C::SAR_Eb(bxInstruction_c *i)
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{
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Bit8u op1_8, result_8;
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unsigned count;
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if (i->b1() == 0xc0)
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count = i->Ib();
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else if (i->b1() == 0xd0)
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count = 1;
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else // 0xd2
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count = CL;
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count &= 0x1F;
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/* op1 is a register or memory reference */
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if (i->modC0()) {
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op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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}
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else {
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/* pointer, segment address pair */
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1_8);
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}
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if (!count) return;
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if (count < 8) {
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if (op1_8 & 0x80) {
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result_8 = (op1_8 >> count) | (0xff << (8 - count));
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}
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else {
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result_8 = (op1_8 >> count);
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}
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}
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else {
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if (op1_8 & 0x80) {
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result_8 = 0xff;
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}
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else {
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result_8 = 0;
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}
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}
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/* now write result back to destination */
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if (i->modC0()) {
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
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}
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else {
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Write_RMW_virtual_byte(result_8);
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}
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/* set eflags:
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* SAR count affects the following flags: S,Z,P,C
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*/
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if (count < 8) {
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set_CF((op1_8 >> (count - 1)) & 0x01);
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}
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else {
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if (op1_8 & 0x80) {
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set_CF(1);
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}
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else {
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set_CF(0);
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}
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}
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set_ZF(result_8 == 0);
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set_SF(result_8 >> 7);
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if (count == 1)
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set_OF(0);
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set_PF_base(result_8);
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}
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