722 lines
20 KiB
C++
722 lines
20 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: io.cc,v 1.30 2006-03-26 19:39:37 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#include "iodev/iodev.h"
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#if BX_SUPPORT_X86_64==0
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// Make life easier for merging cpu64 and cpu32 code.
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#define RDI EDI
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#define RSI ESI
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#define RAX EAX
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#endif
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void BX_CPU_C::INSB_YbDX(bxInstruction_c *i)
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{
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Bit8u value8=0;
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if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR get_VM () || (CPL>BX_CPU_THIS_PTR get_IOPL ()))) {
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if ( !BX_CPU_THIS_PTR allow_io(DX, 1) ) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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#if BX_SUPPORT_X86_64
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if (i->as64L()) {
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// Write a zero to memory, to trigger any segment or page
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// faults before reading from IO port.
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write_virtual_byte(BX_SEG_REG_ES, RDI, &value8);
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value8 = BX_INP(DX, 1);
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/* no seg override possible */
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write_virtual_byte(BX_SEG_REG_ES, RDI, &value8);
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if (BX_CPU_THIS_PTR get_DF ())
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RDI--;
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else
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RDI++;
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}
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else
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#endif
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if (i->as32L()) {
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// Write a zero to memory, to trigger any segment or page
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// faults before reading from IO port.
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write_virtual_byte(BX_SEG_REG_ES, EDI, &value8);
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value8 = BX_INP(DX, 1);
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/* no seg override possible */
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write_virtual_byte(BX_SEG_REG_ES, EDI, &value8);
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if (BX_CPU_THIS_PTR get_DF ()) {
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RDI = EDI - 1;
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}
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else {
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RDI = EDI + 1;
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}
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}
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else {
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// Write a zero to memory, to trigger any segment or page
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// faults before reading from IO port.
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write_virtual_byte(BX_SEG_REG_ES, DI, &value8);
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value8 = BX_INP(DX, 1);
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/* no seg override possible */
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write_virtual_byte(BX_SEG_REG_ES, DI, &value8);
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if (BX_CPU_THIS_PTR get_DF ())
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DI--;
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else
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DI++;
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}
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}
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void BX_CPU_C::INSW_YvDX(bxInstruction_c *i)
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// input word/doubleword from port to string
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{
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bx_address edi;
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unsigned int incr;
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#if BX_SUPPORT_X86_64
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if (i->as64L()) // This was coded as if (i->as_64) ???
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edi = RDI;
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else
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#endif
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if (i->as32L())
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edi = EDI;
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else
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edi = DI;
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if (i->os32L()) {
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Bit32u value32=0;
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if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR get_VM () || (CPL>BX_CPU_THIS_PTR get_IOPL ()))) {
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if ( !BX_CPU_THIS_PTR allow_io(DX, 4) ) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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// Write a zero to memory, to trigger any segment or page
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// faults before reading from IO port.
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write_virtual_dword(BX_SEG_REG_ES, edi, &value32);
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value32 = BX_INP(DX, 4);
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/* no seg override allowed */
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write_virtual_dword(BX_SEG_REG_ES, edi, &value32);
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incr = 4;
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}
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else {
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Bit16u value16=0;
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if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR get_VM () || (CPL>BX_CPU_THIS_PTR get_IOPL ()))) {
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if ( !BX_CPU_THIS_PTR allow_io(DX, 2) )
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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#if BX_SupportRepeatSpeedups
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#if (BX_DEBUGGER == 0)
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#if (defined(__i386__) && __i386__)
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/* If conditions are right, we can transfer IO to physical memory
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* in a batch, rather than one instruction at a time.
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*/
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if (i->repUsedL() && !BX_CPU_THIS_PTR async_event) {
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Bit32u wordCount;
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#if BX_SUPPORT_X86_64
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if (i->as64L())
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wordCount = RCX; // Truncated to 32bits. (we're only doing 1 page)
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else
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#endif
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if (i->as32L())
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wordCount = ECX;
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else
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wordCount = CX;
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if (wordCount) {
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bx_address laddrDst;
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Bit32u paddrDst, wordsFitDst;
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Bit8u *hostAddrDst;
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bx_segment_reg_t *dstSegPtr;
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int pointerDelta;
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dstSegPtr = &BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES];
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// Do segment checks for the 1st word. We do not want to
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// trip an exception beyond this, because the address would
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// be incorrect. After we know how many bytes we will directly
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// transfer, we can do the full segment limit check ourselves
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// without generating an exception.
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write_virtual_checks(dstSegPtr, edi, 2);
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laddrDst = BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_ES) + edi;
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if (BX_CPU_THIS_PTR cr0.pg)
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paddrDst = dtranslate_linear(laddrDst, CPL==3, BX_WRITE);
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else
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paddrDst = laddrDst;
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// If we want to write directly into the physical memory array,
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// we need the A20 address.
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paddrDst = A20ADDR(paddrDst);
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hostAddrDst = BX_CPU_THIS_PTR mem->getHostMemAddr(BX_CPU_THIS,
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paddrDst, BX_WRITE, DATA_ACCESS);
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// Check that native host access was not vetoed for that page, and
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// that the address is word aligned.
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if ( hostAddrDst && ! (paddrDst & 1) ) {
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// See how many words can fit in the rest of this page.
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if (BX_CPU_THIS_PTR get_DF ()) {
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// Counting downward.
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// Note: 1st word must not cross page boundary.
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if ( (paddrDst & 0xfff) > 0xffe )
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goto noAcceleration;
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wordsFitDst = (2 + (paddrDst & 0xfff)) >> 1;
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pointerDelta = -2;
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}
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else {
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// Counting upward.
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wordsFitDst = (0x1000 - (paddrDst & 0xfff)) >> 1;
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pointerDelta = 2;
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}
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// Restrict word count to the number that will fit in this page.
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if (wordCount > wordsFitDst)
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wordCount = wordsFitDst;
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// If after all the restrictions, there is anything left to do...
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if (wordCount) {
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unsigned j;
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Bit32u dstSegLimit;
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dstSegLimit = dstSegPtr->cache.u.segment.limit_scaled;
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// For 16-bit addressing mode, clamp the segment limits to 16bits
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// so we don't have to worry about computations using si/di
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// rolling over 16-bit boundaries.
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if (!i->as32L()) {
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if (dstSegLimit > 0xffff)
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dstSegLimit = 0xffff;
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}
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// Before we copy memory, we need to make sure that the segments
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// allow the accesses up to the given source and dest offset. If
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// the cache.valid bits have SegAccessWOK and ROK, we know that
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// the cache is valid for those operations, and that the segments
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// are non-expand down (thus we can make a simple limit check).
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if ( !(dstSegPtr->cache.valid & SegAccessWOK) ) {
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goto noAcceleration;
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}
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if (BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64) {
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// Now make sure transfer will fit within the constraints of the
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// segment boundaries, 0..limit for non expand-down. We know
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// wordCount >= 1 here.
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if (BX_CPU_THIS_PTR get_DF ()) {
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// Counting downward.
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Bit32u minOffset = (wordCount-1) << 1;
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if ( edi < minOffset )
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goto noAcceleration;
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}
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else {
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// Counting upward.
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Bit32u dstMaxOffset = (dstSegLimit - (wordCount<<1)) + 1;
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if ( edi > dstMaxOffset )
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goto noAcceleration;
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}
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}
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for (j=0; j<wordCount; ) {
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Bit16u temp16;
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bx_devices.bulkIOQuantumsTransferred = 0;
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if ( BX_CPU_THIS_PTR get_DF ()==0 ) { // Only do accel for DF=0
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bx_devices.bulkIOHostAddr = hostAddrDst;
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bx_devices.bulkIOQuantumsRequested = (wordCount - j);
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}
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else
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bx_devices.bulkIOQuantumsRequested = 0;
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temp16 = BX_INP(DX, 2);
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if ( bx_devices.bulkIOQuantumsTransferred ) {
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hostAddrDst = bx_devices.bulkIOHostAddr;
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j += bx_devices.bulkIOQuantumsTransferred;
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}
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else {
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* (Bit16u *) hostAddrDst = temp16;
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hostAddrDst += pointerDelta;
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j++;
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}
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// Terminate early if there was an event.
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if ( BX_CPU_THIS_PTR async_event )
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break;
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}
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// Reset for next non-bulk IO.
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bx_devices.bulkIOQuantumsRequested = 0;
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wordCount = j;
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// Decrement eCX. Note, the main loop will decrement 1 also, so
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// decrement by one less than expected, like the case above.
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BX_TICKN(j-1); // Main cpu loop also decrements one more.
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#if BX_SUPPORT_X86_64
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if (i->as64L())
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RCX -= (wordCount-1);
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else
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#endif
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if (i->as32L())
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ECX -= (wordCount-1);
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else
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CX -= (wordCount-1);
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incr = wordCount << 1; // count * 2.
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goto doIncr;
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}
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}
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}
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}
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noAcceleration:
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#endif // __i386__
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#endif // (BX_DEBUGGER == 0)
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#endif // #if BX_SupportRepeatSpeedups
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// Write a zero to memory, to trigger any segment or page
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// faults before reading from IO port.
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write_virtual_word(BX_SEG_REG_ES, edi, &value16);
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value16 = BX_INP(DX, 2);
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/* no seg override allowed */
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write_virtual_word(BX_SEG_REG_ES, edi, &value16);
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incr = 2;
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}
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#if BX_SupportRepeatSpeedups
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#if (BX_DEBUGGER == 0)
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#if (defined(__i386__) && __i386__)
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doIncr:
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#endif
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#endif
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#endif
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#if BX_SUPPORT_X86_64
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if (i->as64L()) {
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if (BX_CPU_THIS_PTR get_DF ())
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RDI = RDI - incr;
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else
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RDI = RDI + incr;
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}
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else
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#endif
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if (i->as32L()) {
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if (BX_CPU_THIS_PTR get_DF ())
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RDI = EDI - incr;
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else
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RDI = EDI + incr;
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}
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else {
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if (BX_CPU_THIS_PTR get_DF ())
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DI = DI - incr;
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else
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DI = DI + incr;
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}
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}
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void BX_CPU_C::OUTSB_DXXb(bxInstruction_c *i)
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{
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unsigned seg;
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Bit8u value8;
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bx_address esi;
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if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR get_VM () || (CPL>BX_CPU_THIS_PTR get_IOPL ()))) {
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if ( !BX_CPU_THIS_PTR allow_io(DX, 1) ) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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if (!BX_NULL_SEG_REG(i->seg())) {
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seg = i->seg();
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}
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else {
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seg = BX_SEG_REG_DS;
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}
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#if BX_SUPPORT_X86_64
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if (i->as64L())
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esi = RSI;
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else
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#endif
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if (i->as32L())
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esi = ESI;
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else
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esi = SI;
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read_virtual_byte(seg, esi, &value8);
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BX_OUTP(DX, value8, 1);
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#if BX_SUPPORT_X86_64
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if (i->as64L()) {
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if (BX_CPU_THIS_PTR get_DF ())
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RSI--;
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else
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RSI++;
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}
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else
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#endif
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if (i->as32L()) {
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if (BX_CPU_THIS_PTR get_DF ())
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RSI--;
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else
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RSI++;
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}
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else {
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if (BX_CPU_THIS_PTR get_DF ())
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SI--;
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else
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SI++;
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}
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}
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// output word/doubleword string to port
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void BX_CPU_C::OUTSW_DXXv(bxInstruction_c *i)
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{
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unsigned seg;
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bx_address esi;
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unsigned int incr;
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if (!BX_NULL_SEG_REG(i->seg())) {
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seg = i->seg();
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}
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else {
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seg = BX_SEG_REG_DS;
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}
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#if BX_SUPPORT_X86_64
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if (i->as64L())
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esi = RSI;
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else
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#endif
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if (i->as32L())
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esi = ESI;
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else
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esi = SI;
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if (i->os32L()) {
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Bit32u value32;
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if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR get_VM () || (CPL>BX_CPU_THIS_PTR get_IOPL ()))) {
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if ( !BX_CPU_THIS_PTR allow_io(DX, 4) ) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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read_virtual_dword(seg, esi, &value32);
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BX_OUTP(DX, value32, 4);
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incr = 4;
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}
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else {
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Bit16u value16;
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if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR get_VM () || (CPL>BX_CPU_THIS_PTR get_IOPL ()))) {
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if ( !BX_CPU_THIS_PTR allow_io(DX, 2) ) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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#if BX_SupportRepeatSpeedups
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#if (BX_DEBUGGER == 0)
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#if (defined(__i386__) && __i386__)
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/* If conditions are right, we can transfer IO to physical memory
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* in a batch, rather than one instruction at a time.
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*/
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if (i->repUsedL() && !BX_CPU_THIS_PTR async_event) {
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Bit32u wordCount;
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#if BX_SUPPORT_X86_64
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if (i->as64L())
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wordCount = RCX; // Truncated to 32bits. (we're only doing 1 page)
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else
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#endif
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if (i->as32L())
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wordCount = ECX;
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else
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wordCount = CX;
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if (wordCount) {
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bx_address laddrSrc;
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Bit32u paddrSrc, wordsFitSrc;
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Bit8u *hostAddrSrc;
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bx_segment_reg_t *srcSegPtr;
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unsigned pointerDelta;
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srcSegPtr = &BX_CPU_THIS_PTR sregs[seg];
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// Do segment checks for the 1st word. We do not want to
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// trip an exception beyond this, because the address would
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// be incorrect. After we know how many bytes we will directly
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// transfer, we can do the full segment limit check ourselves
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// without generating an exception.
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read_virtual_checks(srcSegPtr, esi, 2);
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laddrSrc = BX_CPU_THIS_PTR get_segment_base(seg) + esi;
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if (BX_CPU_THIS_PTR cr0.pg)
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paddrSrc = dtranslate_linear(laddrSrc, CPL==3, BX_READ);
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else
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paddrSrc = laddrSrc;
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// If we want to write directly into the physical memory array,
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// we need the A20 address.
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paddrSrc = A20ADDR(paddrSrc);
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hostAddrSrc = BX_CPU_THIS_PTR mem->getHostMemAddr(BX_CPU_THIS,
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paddrSrc, BX_READ, DATA_ACCESS);
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// Check that native host access was not vetoed for that page, and
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// that the address is word aligned.
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if ( hostAddrSrc && ! (paddrSrc & 1) ) {
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// See how many words can fit in the rest of this page.
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if (BX_CPU_THIS_PTR get_DF ()) {
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// Counting downward.
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// Note: 1st word must not cross page boundary.
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if ( (paddrSrc & 0xfff) > 0xffe )
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goto noAcceleration;
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wordsFitSrc = (2 + (paddrSrc & 0xfff)) >> 1;
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pointerDelta = (unsigned) -2;
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}
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else {
|
|
// Counting upward.
|
|
wordsFitSrc = (0x1000 - (paddrSrc & 0xfff)) >> 1;
|
|
pointerDelta = 2;
|
|
}
|
|
|
|
// Restrict word count to the number that will fit in this page.
|
|
if (wordCount > wordsFitSrc)
|
|
wordCount = wordsFitSrc;
|
|
|
|
// If after all the restrictions, there is anything left to do...
|
|
if (wordCount) {
|
|
unsigned j;
|
|
Bit32u srcSegLimit;
|
|
|
|
srcSegLimit = srcSegPtr->cache.u.segment.limit_scaled;
|
|
// For 16-bit addressing mode, clamp the segment limits to 16bits
|
|
// so we don't have to worry about computations using si/di
|
|
// rolling over 16-bit boundaries.
|
|
if (!i->as32L()) {
|
|
if (srcSegLimit > 0xffff)
|
|
srcSegLimit = 0xffff;
|
|
}
|
|
|
|
// Before we copy memory, we need to make sure that the segments
|
|
// allow the accesses up to the given source and dest offset. If
|
|
// the cache.valid bits have SegAccessWOK and ROK, we know that
|
|
// the cache is valid for those operations, and that the segments
|
|
// are non-expand down (thus we can make a simple limit check).
|
|
if ( !(srcSegPtr->cache.valid & SegAccessROK) ) {
|
|
goto noAcceleration;
|
|
}
|
|
if (BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64) {
|
|
// Now make sure transfer will fit within the constraints of the
|
|
// segment boundaries, 0..limit for non expand-down. We know
|
|
// wordCount >= 1 here.
|
|
if (BX_CPU_THIS_PTR get_DF ()) {
|
|
// Counting downward.
|
|
Bit32u minOffset = (wordCount-1) << 1;
|
|
if ( esi < minOffset )
|
|
goto noAcceleration;
|
|
}
|
|
else {
|
|
// Counting upward.
|
|
Bit32u srcMaxOffset = (srcSegLimit - (wordCount<<1)) + 1;
|
|
if ( esi > srcMaxOffset )
|
|
goto noAcceleration;
|
|
}
|
|
}
|
|
|
|
for (j=0; j<wordCount; ) {
|
|
Bit16u temp16;
|
|
bx_devices.bulkIOQuantumsTransferred = 0;
|
|
if ( BX_CPU_THIS_PTR get_DF ()==0 ) { // Only do accel for DF=0
|
|
bx_devices.bulkIOHostAddr = hostAddrSrc;
|
|
bx_devices.bulkIOQuantumsRequested = (wordCount - j);
|
|
}
|
|
else
|
|
bx_devices.bulkIOQuantumsRequested = 0;
|
|
temp16 = * (Bit16u *) hostAddrSrc;
|
|
BX_OUTP(DX, temp16, 2);
|
|
if ( bx_devices.bulkIOQuantumsTransferred ) {
|
|
hostAddrSrc = bx_devices.bulkIOHostAddr;
|
|
j += bx_devices.bulkIOQuantumsTransferred;
|
|
}
|
|
else {
|
|
hostAddrSrc += pointerDelta;
|
|
j++;
|
|
}
|
|
// Terminate early if there was an event.
|
|
if ( BX_CPU_THIS_PTR async_event )
|
|
break;
|
|
}
|
|
// Reset for next non-bulk IO.
|
|
bx_devices.bulkIOQuantumsRequested = 0;
|
|
wordCount = j;
|
|
// Decrement eCX. Note, the main loop will decrement 1 also, so
|
|
// decrement by one less than expected, like the case above.
|
|
BX_TICKN(j-1); // Main cpu loop also decrements one more.
|
|
#if BX_SUPPORT_X86_64
|
|
if (i->as64L())
|
|
RCX -= (wordCount-1);
|
|
else
|
|
#endif
|
|
if (i->as32L())
|
|
ECX -= (wordCount-1);
|
|
else
|
|
CX -= (wordCount-1);
|
|
incr = wordCount << 1; // count * 2.
|
|
goto doIncr;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
noAcceleration:
|
|
|
|
#endif // __i386__
|
|
#endif // (BX_DEBUGGER == 0)
|
|
#endif // #if BX_SupportRepeatSpeedups
|
|
|
|
read_virtual_word(seg, esi, &value16);
|
|
|
|
BX_OUTP(DX, value16, 2);
|
|
incr = 2;
|
|
}
|
|
|
|
#if BX_SupportRepeatSpeedups
|
|
#if (BX_DEBUGGER == 0)
|
|
#if (defined(__i386__) && __i386__)
|
|
doIncr:
|
|
#endif
|
|
#endif
|
|
#endif
|
|
|
|
#if BX_SUPPORT_X86_64
|
|
if (i->as64L()) {
|
|
if (BX_CPU_THIS_PTR get_DF ())
|
|
RSI = RSI - incr;
|
|
else
|
|
RSI = RSI + incr;
|
|
}
|
|
else
|
|
#endif
|
|
if (i->as32L()) {
|
|
if (BX_CPU_THIS_PTR get_DF ())
|
|
RSI = ESI - incr;
|
|
else
|
|
RSI = ESI + incr;
|
|
}
|
|
else {
|
|
if (BX_CPU_THIS_PTR get_DF ())
|
|
SI = SI - incr;
|
|
else
|
|
SI = SI + incr;
|
|
}
|
|
}
|
|
|
|
void BX_CPU_C::IN_ALIb(bxInstruction_c *i)
|
|
{
|
|
AL = BX_CPU_THIS_PTR inp8(i->Ib());
|
|
}
|
|
|
|
void BX_CPU_C::IN_eAXIb(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL > 2
|
|
if (i->os32L()) {
|
|
Bit32u eax = BX_CPU_THIS_PTR inp32(i->Ib());
|
|
RAX = eax;
|
|
}
|
|
else
|
|
#endif /* BX_CPU_LEVEL > 2 */
|
|
{
|
|
AX = BX_CPU_THIS_PTR inp16(i->Ib());
|
|
}
|
|
}
|
|
|
|
void BX_CPU_C::OUT_IbAL(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR outp8(i->Ib(), AL);
|
|
}
|
|
|
|
void BX_CPU_C::OUT_IbeAX(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL > 2
|
|
if (i->os32L()) {
|
|
BX_CPU_THIS_PTR outp32(i->Ib(), EAX);
|
|
}
|
|
else
|
|
#endif /* BX_CPU_LEVEL > 2 */
|
|
{
|
|
BX_CPU_THIS_PTR outp16(i->Ib(), AX);
|
|
}
|
|
}
|
|
|
|
void BX_CPU_C::IN_ALDX(bxInstruction_c *i)
|
|
{
|
|
AL = BX_CPU_THIS_PTR inp8(DX);
|
|
}
|
|
|
|
void BX_CPU_C::IN_eAXDX(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL > 2
|
|
if (i->os32L()) {
|
|
Bit32u eax = BX_CPU_THIS_PTR inp32(DX);
|
|
RAX = eax;
|
|
}
|
|
else
|
|
#endif /* BX_CPU_LEVEL > 2 */
|
|
{
|
|
AX = BX_CPU_THIS_PTR inp16(DX);
|
|
}
|
|
}
|
|
|
|
void BX_CPU_C::OUT_DXAL(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR outp8(DX, AL);
|
|
}
|
|
|
|
void BX_CPU_C::OUT_DXeAX(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL > 2
|
|
if (i->os32L()) {
|
|
BX_CPU_THIS_PTR outp32(DX, EAX);
|
|
}
|
|
else
|
|
#endif /* BX_CPU_LEVEL > 2 */
|
|
{
|
|
BX_CPU_THIS_PTR outp16(DX, AX);
|
|
}
|
|
}
|