386 lines
9.5 KiB
C++
386 lines
9.5 KiB
C++
// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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// Sample instrumentation library to generate physical address
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// of each instruction executed, and physical address of it's
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// data reads/writes
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#include "bochs.h"
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// maximum size of an instruction
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#define MAX_OPCODE_SIZE 16
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// maximum physical addresses an instruction can generate
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#define MAX_DATA_ACCESSES 1024
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// maximum number of IO accesses an instruction can generate
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#define MAX_IO_ACCESSES 4 // probably could be 1
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// Use this variable to turn on/off collection of instrumentation data
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// If you are not using the debugger to turn this on/off, then possibly
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// start this at 1 instead of 0.
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static Boolean collect_data = 0;
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static Boolean is_valid = 0; // is current instruction valid
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static struct {
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unsigned opcode_size;
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Bit8u opcode[MAX_OPCODE_SIZE];
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Bit32u linear_iaddr;
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Bit32u phy_iaddr;
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unsigned num_data_accesses;
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struct {
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Bit32u laddr; // linear address
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Bit32u paddr; // physical address
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unsigned op; // BX_READ or BX_WRITE
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unsigned size; // 1 .. 4
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} data_access[MAX_DATA_ACCESSES];
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unsigned num_io_accesses;
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struct {
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Bit16u addr;
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unsigned op; // BX_READ==inp or BX_WRITE==outp
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unsigned size; // 1 .. 4
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} io_access[MAX_IO_ACCESSES];
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} instruction;
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void
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bx_instr_opcode_begin(Bit32u linear)
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{
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Boolean valid;
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if (!collect_data) return;
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is_valid = 1;
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instruction.opcode_size = 0;
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instruction.linear_iaddr = linear;
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bx_cpu.dbg_xlate_linear2phy(linear, &instruction.phy_iaddr, &valid);
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instruction.phy_iaddr = A20ADDR(instruction.phy_iaddr);
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// If linear translation doesn't exist, a paging exception will occur.
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// Invalidate collecting data for now.
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if (!valid)
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is_valid = 0;
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instruction.num_data_accesses = 0;
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instruction.num_io_accesses = 0;
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}
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void
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bx_instr_opcode_end(Bit32u linear)
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{
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unsigned i;
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UNUSED(linear);
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if (!collect_data || !is_valid) return;
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// instruction completed:
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// print out instruction opcode bytes and phy mem stats
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if (is_valid) {
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fprintf(stderr, "opcode: l=0x%x, p=0x%x: ",
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(unsigned) instruction.linear_iaddr,
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(unsigned) instruction.phy_iaddr);
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for (i=0; i<instruction.opcode_size; i++) {
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fprintf(stderr, " %02x", instruction.opcode[i]);
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}
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fprintf(stderr, "\n");
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for (i=0; i<instruction.num_data_accesses; i++) {
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fprintf(stderr, "%s: l=0x%x, p=0x%x, %u bytes\n",
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(instruction.data_access[i].op==BX_READ) ? "read" : "write",
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(unsigned) instruction.data_access[i].laddr,
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(unsigned) instruction.data_access[i].paddr,
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(unsigned) instruction.data_access[i].size);
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}
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for (i=0; i<instruction.num_io_accesses; i++) {
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fprintf(stderr, "%s: 0x%x, %u bytes\n",
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(instruction.io_access[i].op==BX_READ) ? "in" : "out",
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(unsigned) instruction.io_access[i].addr,
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(unsigned) instruction.io_access[i].size);
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}
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}
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is_valid = 0;
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}
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void
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bx_instr_fetch_byte(Bit8u val8)
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{
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if (!collect_data || !is_valid) return;
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if ((instruction.opcode_size+1) > MAX_OPCODE_SIZE) {
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bx_panic("instr_fetch_byte: opcode too big.\n");
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}
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else {
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instruction.opcode[instruction.opcode_size] = val8;
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instruction.opcode_size++;
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}
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}
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void
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bx_instr_fetch_word(Bit16u val16)
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{
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if (!collect_data || !is_valid) return;
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if ((instruction.opcode_size+2) > MAX_OPCODE_SIZE) {
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bx_panic("instr_fetch_word: opcode too big.\n");
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}
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else {
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instruction.opcode[instruction.opcode_size] = val16 & 0xff;
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instruction.opcode[instruction.opcode_size+1] = val16 >> 8;
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instruction.opcode_size += 2;
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}
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}
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void
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bx_instr_fetch_dword(Bit32u val32)
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{
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if (!collect_data || !is_valid) return;
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if ((instruction.opcode_size+4) > MAX_OPCODE_SIZE) {
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bx_panic("instr_fetch_dword: opcode too big.\n");
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}
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else {
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instruction.opcode[instruction.opcode_size] = val32; val32 >>= 8;
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instruction.opcode[instruction.opcode_size+1] = val32; val32 >>= 8;
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instruction.opcode[instruction.opcode_size+2] = val32; val32 >>= 8;
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instruction.opcode[instruction.opcode_size+3] = val32;
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instruction.opcode_size += 4;
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}
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}
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void
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bx_instr_interrupt(unsigned vector)
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{
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UNUSED(vector);
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if (!collect_data || !is_valid) return;
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}
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void
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bx_instr_exception(unsigned vector)
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{
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is_valid = 0;
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if (!collect_data || !is_valid) return;
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}
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void
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bx_instr_inp(Bit16u addr, unsigned len)
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{
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unsigned index;
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if (!collect_data || !is_valid) return;
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if (instruction.num_io_accesses >= MAX_IO_ACCESSES) {
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bx_panic("instr_inp: instructions has too many accesses\n");
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}
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index = instruction.num_io_accesses;
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instruction.io_access[index].addr = addr;
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instruction.io_access[index].op = BX_READ;
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instruction.io_access[index].size = len;
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instruction.num_io_accesses++;
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}
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void
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bx_instr_outp(Bit16u addr, unsigned len)
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{
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unsigned index;
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if (!collect_data || !is_valid) return;
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if (instruction.num_io_accesses >= MAX_IO_ACCESSES) {
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bx_panic("instr_outp: instructions has too many accesses\n");
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}
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index = instruction.num_io_accesses;
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instruction.io_access[index].addr = addr;
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instruction.io_access[index].op = BX_WRITE;
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instruction.io_access[index].size = len;
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instruction.num_io_accesses++;
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}
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// some extra functions called from debugger
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void
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bx_instr_start(void)
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{
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collect_data = 1;
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is_valid = 0;
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}
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void
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bx_instr_stop(void)
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{
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collect_data = 0;
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is_valid = 0;
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}
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void
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bx_instr_reset(void)
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{
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}
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void
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bx_instr_print(void)
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{
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}
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void
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bx_instr_cnear_branch_taken(Bit32u new_eip)
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{
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// conditional near branch was taken
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Bit32u laddr, paddr;
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Boolean valid;
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if (!collect_data || !is_valid) return;
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// find linear address
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laddr = bx_cpu.cs.cache.u.segment.base + new_eip;
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// find physical address
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bx_cpu.dbg_xlate_linear2phy(laddr, &paddr, &valid);
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paddr = A20ADDR(paddr);
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if (valid==0) {
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// don't use paddr; laddr not found in page tables
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}
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else {
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fprintf(stderr, "cnear taken: l=0x%x p=0x%x\n", laddr, paddr);
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}
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}
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void
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bx_instr_cnear_branch_not_taken(void)
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{
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// conditional near branch was NOT taken
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if (!collect_data || !is_valid) return;
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fprintf(stderr, "cnear NOT taken\n");
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}
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void
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bx_instr_ucnear_branch(unsigned what, Bit32u new_eip)
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{
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// unconditional near branch
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Bit32u laddr, paddr;
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Boolean valid;
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if (!collect_data || !is_valid) return;
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// find linear address
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laddr = bx_cpu.cs.cache.u.segment.base + new_eip;
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// find physical address
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bx_cpu.dbg_xlate_linear2phy(laddr, &paddr, &valid);
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paddr = A20ADDR(paddr);
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if (valid==0) {
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// don't use paddr; laddr not found in page tables
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}
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else {
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fprintf(stderr, "ucnear: l=0x%x p=0x%x\n", laddr, paddr);
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}
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switch (what) {
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case BX_INSTR_IS_CALL: break;
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case BX_INSTR_IS_JMP: break;
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case BX_INSTR_IS_RET: break;
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default:
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bx_panic("instr_ucnear_branch: default case reached.\n");
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}
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}
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void
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bx_instr_far_branch(unsigned what, Bit32u new_cs, Bit32u new_eip)
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{
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// unconditional far branch
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Bit32u laddr, paddr;
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Boolean valid;
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UNUSED(new_cs);
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if (!collect_data || !is_valid) return;
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// find linear address
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laddr = bx_cpu.cs.cache.u.segment.base + new_eip;
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// find physical address
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bx_cpu.dbg_xlate_linear2phy(laddr, &paddr, &valid);
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paddr = A20ADDR(paddr);
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if (valid==0) {
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// don't use paddr; laddr not found in page tables
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}
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else {
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fprintf(stderr, "far: l=0x%x p=0x%x\n", laddr, paddr);
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}
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switch (what) {
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case BX_INSTR_IS_CALL: break;
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case BX_INSTR_IS_INT: break;
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case BX_INSTR_IS_IRET: break;
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case BX_INSTR_IS_JMP: break;
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case BX_INSTR_IS_RET: break;
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default:
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bx_panic("instr_far_branch: default case reached.\n");
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}
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}
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void
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bx_instr_lin_write(Bit32u lin, Bit32u phy, unsigned len)
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{
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unsigned index;
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if (!collect_data || !is_valid) return;
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if (instruction.num_data_accesses >= MAX_DATA_ACCESSES) {
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bx_panic("instr_lin_write: instruction has too many accesses\n");
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}
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index = instruction.num_data_accesses;
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instruction.data_access[index].paddr = A20ADDR(phy);
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instruction.data_access[index].laddr = lin;
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instruction.data_access[index].op = BX_WRITE;
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instruction.data_access[index].size = len;
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instruction.num_data_accesses++;
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}
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void
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bx_instr_lin_read(Bit32u lin, Bit32u phy, unsigned len)
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{
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unsigned index;
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if (!collect_data || !is_valid) return;
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if (instruction.num_data_accesses >= MAX_DATA_ACCESSES) {
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bx_panic("instr_lin_read: instruction has too many accesses\n");
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}
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index = instruction.num_data_accesses;
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instruction.data_access[index].paddr = A20ADDR(phy);
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instruction.data_access[index].laddr = lin;
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instruction.data_access[index].op = BX_READ;
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instruction.data_access[index].size = len;
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instruction.num_data_accesses++;
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}
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