375 lines
9.9 KiB
C++
375 lines
9.9 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: stack32.cc,v 1.35 2007-11-13 21:07:08 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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void BX_CPU_C::POP_Ed(bxInstruction_c *i)
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{
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Bit32u val32;
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pop_32(&val32);
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if (i->modC0()) {
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BX_WRITE_32BIT_REGZ(i->rm(), val32);
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}
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else {
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// Note: there is one little weirdism here. When 32bit addressing
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// is used, it is possible to use ESP in the modrm addressing.
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// If used, the value of ESP after the pop is used to calculate
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// the address.
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if (i->as32L() && (!i->modC0()) && (i->rm()==4) && (i->sibBase()==4)) {
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// call method on BX_CPU_C object
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BX_CPU_CALL_METHODR (i->ResolveModrm, (i));
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}
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write_virtual_dword(i->seg(), RMAddr(i), &val32);
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}
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}
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void BX_CPU_C::PUSH_ERX(bxInstruction_c *i)
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{
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push_32(BX_READ_32BIT_REG(i->opcodeReg()));
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}
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void BX_CPU_C::POP_ERX(bxInstruction_c *i)
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{
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Bit32u erx;
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pop_32(&erx);
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BX_WRITE_32BIT_REGZ(i->opcodeReg(), erx)
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}
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void BX_CPU_C::PUSH32_CS(bxInstruction_c *i)
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{
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Bit32u eSP;
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decrementESPForPush(4, &eSP);
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write_virtual_word(BX_SEG_REG_SS, eSP,
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&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
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}
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void BX_CPU_C::PUSH32_DS(bxInstruction_c *i)
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{
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Bit32u eSP;
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decrementESPForPush(4, &eSP);
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write_virtual_word(BX_SEG_REG_SS, eSP,
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&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value);
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}
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void BX_CPU_C::PUSH32_ES(bxInstruction_c *i)
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{
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Bit32u eSP;
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decrementESPForPush(4, &eSP);
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write_virtual_word(BX_SEG_REG_SS, eSP,
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&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value);
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}
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void BX_CPU_C::PUSH32_FS(bxInstruction_c *i)
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{
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Bit32u eSP;
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decrementESPForPush(4, &eSP);
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write_virtual_word(BX_SEG_REG_SS, eSP,
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&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value);
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}
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void BX_CPU_C::PUSH32_GS(bxInstruction_c *i)
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{
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Bit32u eSP;
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decrementESPForPush(4, &eSP);
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write_virtual_word(BX_SEG_REG_SS, eSP,
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&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value);
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}
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void BX_CPU_C::PUSH32_SS(bxInstruction_c *i)
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{
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Bit32u eSP;
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decrementESPForPush(4, &eSP);
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write_virtual_word(BX_SEG_REG_SS, eSP,
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&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value);
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}
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void BX_CPU_C::POP32_DS(bxInstruction_c *i)
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{
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Bit32u ds;
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pop_32(&ds);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS], (Bit16u) ds);
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}
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void BX_CPU_C::POP32_ES(bxInstruction_c *i)
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{
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Bit32u es;
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pop_32(&es);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES], (Bit16u) es);
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}
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void BX_CPU_C::POP32_FS(bxInstruction_c *i)
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{
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Bit32u fs;
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pop_32(&fs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], (Bit16u) fs);
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}
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void BX_CPU_C::POP32_GS(bxInstruction_c *i)
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{
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Bit32u gs;
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pop_32(&gs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], (Bit16u) gs);
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}
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void BX_CPU_C::POP32_SS(bxInstruction_c *i)
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{
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Bit32u ss;
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pop_32(&ss);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], (Bit16u) ss);
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// POP SS inhibits interrupts, debug exceptions and single-step
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// trap exceptions until the execution boundary following the
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// next instruction is reached.
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// Same code as MOV_SwEw()
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BX_CPU_THIS_PTR inhibit_mask |=
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BX_INHIBIT_INTERRUPTS | BX_INHIBIT_DEBUG;
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BX_CPU_THIS_PTR async_event = 1;
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}
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#if BX_CPU_LEVEL >= 2
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void BX_CPU_C::PUSHAD32(bxInstruction_c *i)
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{
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Bit32u temp_ESP = ESP;
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Bit16u temp_SP = SP;
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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{
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write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 4), &EAX);
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write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 8), &ECX);
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write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 12), &EDX);
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write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 16), &EBX);
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write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 20), &temp_ESP);
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write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 24), &EBP);
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write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 28), &ESI);
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write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 32), &EDI);
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ESP -= 32;
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}
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else
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{
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write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 4), &EAX);
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write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 8), &ECX);
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write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 12), &EDX);
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write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 16), &EBX);
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write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 20), &temp_ESP);
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write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 24), &EBP);
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write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 28), &ESI);
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write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 32), &EDI);
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SP -= 32;
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}
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}
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void BX_CPU_C::POPAD32(bxInstruction_c *i)
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{
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Bit32u edi, esi, ebp, ebx, edx, ecx, eax;
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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{
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Bit32u temp_ESP = ESP;
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read_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP + 0), &edi);
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read_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP + 4), &esi);
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read_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP + 8), &ebp);
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read_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP + 16), &ebx);
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read_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP + 20), &edx);
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read_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP + 24), &ecx);
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read_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP + 28), &eax);
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ESP += 32;
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}
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else
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{
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Bit16u temp_SP = SP;
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read_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP + 0), &edi);
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read_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP + 4), &esi);
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read_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP + 8), &ebp);
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read_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP + 16), &ebx);
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read_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP + 20), &edx);
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read_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP + 24), &ecx);
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read_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP + 28), &eax);
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SP += 32;
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}
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EDI = edi;
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ESI = esi;
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EBP = ebp;
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EBX = ebx;
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EDX = edx;
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ECX = ecx;
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EAX = eax;
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}
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#endif
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void BX_CPU_C::PUSH_Id(bxInstruction_c *i)
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{
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push_32(i->Id());
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}
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void BX_CPU_C::PUSH_Ed(bxInstruction_c *i)
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{
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Bit32u op1_32;
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/* op1_32 is a register or memory reference */
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if (i->modC0()) {
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op1_32 = BX_READ_32BIT_REG(i->rm());
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}
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else {
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/* pointer, segment address pair */
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read_virtual_dword(i->seg(), RMAddr(i), &op1_32);
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}
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push_32(op1_32);
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}
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#if BX_CPU_LEVEL >= 2
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void BX_CPU_C::ENTER_IwIb(bxInstruction_c *i)
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{
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unsigned ss32 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b;
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Bit16u imm16 = i->Iw();
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Bit8u level = i->Ib2();
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level &= 0x1F;
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Bit32u ebp; // Use temp copy in case of exception.
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if (i->os32L())
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push_32(EBP);
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else
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push_16(BP);
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Bit32u frame_ptr32 = ESP;
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if (ss32) {
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ebp = EBP;
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}
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else {
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ebp = BP;
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}
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if (level > 0) {
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/* do level-1 times */
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while (--level) {
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if (i->os32L()) {
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Bit32u temp32;
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if (ss32) {
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ebp -= 4;
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read_virtual_dword(BX_SEG_REG_SS, ebp, &temp32);
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}
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else { /* 16bit stacksize */
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ebp -= 4; ebp &= 0xffff;
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read_virtual_dword(BX_SEG_REG_SS, ebp, &temp32);
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}
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push_32(temp32);
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}
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else { /* 16bit opsize */
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Bit16u temp16;
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if (ss32) {
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ebp -= 2;
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read_virtual_word(BX_SEG_REG_SS, ebp, &temp16);
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}
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else { /* 16bit stacksize */
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ebp -= 2; ebp &= 0xffff;
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read_virtual_word(BX_SEG_REG_SS, ebp, &temp16);
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}
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push_16(temp16);
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}
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} /* while (--level) */
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/* push(frame pointer) */
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if (i->os32L()) {
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push_32(frame_ptr32);
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}
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else { /* 16bit opsize */
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push_16((Bit16u)frame_ptr32);
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}
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} /* if (level > 0) ... */
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if (ss32) {
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EBP = frame_ptr32;
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ESP -= imm16;
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}
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else {
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BP = (Bit16u) frame_ptr32;
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SP -= imm16;
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}
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}
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void BX_CPU_C::LEAVE(bxInstruction_c *i)
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{
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Bit32u temp_EBP;
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#if BX_CPU_LEVEL >= 3
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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temp_EBP = EBP;
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else
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#endif
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temp_EBP = BP;
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if (protected_mode()) {
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if (IS_DATA_SEGMENT_EXPAND_DOWN(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.type)) {
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if (temp_EBP <= BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.limit_scaled) {
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BX_PANIC(("LEAVE: BP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].limit"));
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exception(BX_SS_EXCEPTION, 0, 0);
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}
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}
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else { /* normal */
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if (temp_EBP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.limit_scaled) {
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BX_PANIC(("LEAVE: BP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].limit"));
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exception(BX_SS_EXCEPTION, 0, 0);
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}
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}
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}
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// delete frame
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#if BX_CPU_LEVEL >= 3
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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ESP = EBP;
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else
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#endif
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SP = BP;
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// restore frame pointer
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#if BX_CPU_LEVEL >= 3
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if (i->os32L()) {
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Bit32u temp32;
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pop_32(&temp32);
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EBP = temp32;
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}
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else
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#endif
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{
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Bit16u temp16;
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pop_16(&temp16);
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BP = temp16;
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}
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}
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#endif
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