7869ab425f
fixed check for SYSENTER/SYSEXIT instructions according to new Intel references
229 lines
5.2 KiB
C++
229 lines
5.2 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: bcd.cc,v 1.16 2005-10-01 07:47:00 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2002 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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void BX_CPU_C::AAA(bxInstruction_c *)
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{
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/*
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* Note: This instruction incorrectly documented in Intel's materials.
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* The right description is:
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*
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* IF (((AL and 0FH) > 9) or (AF==1)
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* THEN
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* IF CPU<286 THEN { AL <- AL+6 }
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* ELSE { AX <- AX+6 }
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* AH <- AH+1
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* CF <- 1
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* AF <- 1
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* ELSE
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* CF <- 0
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* AF <- 0
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* ENDIF
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* AL <- AL and 0Fh
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*/
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/* Validated against Intel Pentium family hardware. */
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/* AAA affects the following flags: A,C */
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if ( ((AL & 0x0f) > 9) || get_AF() )
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{
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AX = AX + 0x106;
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set_AF(1);
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set_CF(1);
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}
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else {
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set_AF(0);
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set_CF(0);
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}
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AL = AL & 0x0f;
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/* AAA affects also the following flags: Z,S,O,P */
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/* modification of the flags is undocumented */
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/* The following behaviour seems to match the P6 and
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its derived processors. */
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set_OF(0);
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set_SF(0); /* sign is always 0 because bits 4-7 of AL are zeroed */
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set_ZF(AL == 0);
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set_PF_base(AL);
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}
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void BX_CPU_C::AAS(bxInstruction_c *)
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{
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/* AAS affects the following flags: A,C */
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if ( ((AL & 0x0F) > 0x09) || get_AF() )
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{
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AX = AX - 0x106;
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set_AF(1);
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set_CF(1);
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}
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else {
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set_CF(0);
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set_AF(0);
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}
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AL = AL & 0x0f;
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/* AAS affects also the following flags: Z,S,O,P */
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/* modification of the flags is undocumented */
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/* The following behaviour seems to match the P6 and
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its derived processors. */
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set_OF(0);
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set_SF(0); /* sign is always 0 because bits 4-7 of AL are zeroed */
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set_ZF(AL == 0);
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set_PF_base(AL);
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}
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void BX_CPU_C::AAM(bxInstruction_c *i)
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{
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Bit8u al, imm8 = i->Ib();
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if (imm8 == 0)
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exception(BX_DE_EXCEPTION, 0, 0);
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al = AL;
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AH = al / imm8;
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AL = al % imm8;
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/* AAM effects the following flags: A,C,O,S,Z,P */
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/* modification of flags A,C,O is undocumented */
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/* The following behaviour seems to match the P6 and
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its derived processors. */
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clear_OF(); /* undocumented flag modification */
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clear_AF();
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clear_CF();
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/* AAM affects the following flags: S,Z,P */
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set_SF(AL >= 0x80);
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set_ZF(AL == 0);
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set_PF_base(AL);
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}
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void BX_CPU_C::AAD(bxInstruction_c *i)
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{
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Bit8u imm8 = i->Ib();
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Bit16u tmp = AH;
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tmp *= imm8;
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tmp += AL;
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AL = tmp & 0xff;
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AH = 0;
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/* AAD effects the following flags: A,C,O,S,Z,P */
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/* modification of flags A,C,O is undocumented */
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/* The following behaviour seems to match the P6 and
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its derived processors. */
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clear_OF(); /* undocumented flag modification */
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clear_AF();
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clear_CF();
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set_SF(AL >= 0x80);
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set_ZF(AL == 0);
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set_PF_base(AL);
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}
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void BX_CPU_C::DAA(bxInstruction_c *)
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{
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Bit8u tmpAL = AL;
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int tmpCF = 0;
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/* Validated against Intel Pentium family hardware. */
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// DAA affects the following flags: S,Z,A,P,C
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if (((tmpAL & 0x0F) > 0x09) || get_AF())
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{
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tmpCF = ((AL > 0xF9) || get_CF());
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AL = AL + 0x06;
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set_AF(1);
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}
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else
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set_AF(0);
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if ((tmpAL > 0x99) || get_CF())
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{
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AL = AL + 0x60;
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tmpCF = 1;
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}
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else
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tmpCF = 0;
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set_OF(0); /* undocumented flag modification */
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set_SF(AL >= 0x80);
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set_ZF(AL==0);
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set_PF_base(AL);
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set_CF(tmpCF);
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}
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void BX_CPU_C::DAS(bxInstruction_c *)
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{
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/* The algorithm for DAS is fashioned after the pseudo code in the
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* Pentium Processor Family Developer's Manual, volume 3. It seems
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* to have changed from earlier processor's manuals. I'm not sure
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* if this is a correction in the algorithm printed, or Intel has
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* changed the handling of instruction. Validated against Intel
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* Pentium family hardware.
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*/
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Bit8u tmpAL = AL;
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int tmpCF = 0;
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/* DAS effect the following flags: A,C,S,Z,P */
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if (((tmpAL & 0x0F) > 0x09) || get_AF())
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{
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tmpCF = (AL < 0x06) || get_CF();
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AL = AL - 0x06;
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set_AF(1);
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}
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else
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set_AF(0);
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if ((tmpAL > 0x99) || get_CF())
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{
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AL = AL - 0x60;
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tmpCF = 1;
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}
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set_OF(0); /* undocumented flag modification */
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set_SF(AL >= 0x80);
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set_ZF(AL==0);
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set_PF_base(AL);
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set_CF(tmpCF);
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}
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