532 lines
14 KiB
C++
532 lines
14 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2003-2018 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu/cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_FPU
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#include "cpu/decoder/ia_opcodes.h"
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#include "softfloat3e/include/softfloat.h"
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#include "softfloat-specialize.h"
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extern softfloat_status_t i387cw_to_softfloat_status_word(Bit16u control_word);
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static int status_word_flags_fpu_compare(int float_relation)
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{
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switch(float_relation) {
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case softfloat_relation_unordered:
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return (FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
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case softfloat_relation_greater:
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return (0);
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case softfloat_relation_less:
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return (FPU_SW_C0);
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case softfloat_relation_equal:
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return (FPU_SW_C3);
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}
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return (-1); // should never get here
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}
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void BX_CPU_C::write_eflags_fpu_compare(int float_relation)
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{
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switch(float_relation) {
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case softfloat_relation_unordered:
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setEFlagsOSZAPC(EFlagsZFMask | EFlagsPFMask | EFlagsCFMask);
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break;
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case softfloat_relation_greater:
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clearEFlagsOSZAPC();
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break;
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case softfloat_relation_less:
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clearEFlagsOSZAPC();
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assert_CF();
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break;
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case softfloat_relation_equal:
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clearEFlagsOSZAPC();
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assert_ZF();
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break;
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default:
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BX_PANIC(("write_eflags: unknown floating point compare relation"));
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}
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOM_STi(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR FPU_check_pending_exceptions();
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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int pop_stack = (i->getIaOpcode() == BX_IA_FCOMP_STi);
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->src()))
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{
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FPU_exception(i, FPU_EX_Stack_Underflow);
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setcc(FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
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if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
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{
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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softfloat_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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int rc = extF80_compare(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->src()), &status);
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setcc(status_word_flags_fpu_compare(rc));
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if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOMI_ST0_STj(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR FPU_check_pending_exceptions();
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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int pop_stack = i->b1() & 4;
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->src()))
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{
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FPU_exception(i, FPU_EX_Stack_Underflow);
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setEFlagsOSZAPC(EFlagsZFMask | EFlagsPFMask | EFlagsCFMask);
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if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
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{
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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softfloat_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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int rc = extF80_compare(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->src()), &status);
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BX_CPU_THIS_PTR write_eflags_fpu_compare(rc);
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if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FUCOMI_ST0_STj(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR FPU_check_pending_exceptions();
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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int pop_stack = i->b1() & 4;
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->src()))
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{
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FPU_exception(i, FPU_EX_Stack_Underflow);
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setEFlagsOSZAPC(EFlagsZFMask | EFlagsPFMask | EFlagsCFMask);
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if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
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{
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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softfloat_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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int rc = extF80_compare_quiet(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->src()), &status);
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BX_CPU_THIS_PTR write_eflags_fpu_compare(rc);
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if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FUCOM_STi(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR FPU_check_pending_exceptions();
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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int pop_stack = (i->getIaOpcode() == BX_IA_FUCOMP_STi);
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->src()))
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{
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FPU_exception(i, FPU_EX_Stack_Underflow);
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setcc(FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
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if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
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{
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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softfloat_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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int rc = extF80_compare_quiet(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->src()), &status);
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setcc(status_word_flags_fpu_compare(rc));
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if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOM_SINGLE_REAL(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR FPU_check_pending_exceptions();
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int rc, pop_stack = (i->getIaOpcode() == BX_IA_FCOMP_SINGLE_REAL);
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RMAddr(i) = BX_CPU_RESOLVE_ADDR(i);
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float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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if (IS_TAG_EMPTY(0))
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{
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FPU_exception(i, FPU_EX_Stack_Underflow);
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setcc(FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
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if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
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{
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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softfloat_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 a = BX_READ_FPU_REG(0);
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if (extF80_isNaN(a) || extF80_isUnsupported(a) || f32_isNaN(load_reg)) {
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rc = softfloat_relation_unordered;
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softfloat_raiseFlags(&status, softfloat_flag_invalid);
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}
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else {
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rc = extF80_compare(a, f32_to_extF80(load_reg, &status), &status);
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}
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setcc(status_word_flags_fpu_compare(rc));
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if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOM_DOUBLE_REAL(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR FPU_check_pending_exceptions();
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int rc, pop_stack = (i->getIaOpcode() == BX_IA_FCOMP_DOUBLE_REAL);
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RMAddr(i) = BX_CPU_RESOLVE_ADDR(i);
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float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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if (IS_TAG_EMPTY(0))
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{
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FPU_exception(i, FPU_EX_Stack_Underflow);
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setcc(FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
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if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
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{
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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softfloat_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 a = BX_READ_FPU_REG(0);
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if (extF80_isNaN(a) || extF80_isUnsupported(a) || f64_isNaN(load_reg)) {
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rc = softfloat_relation_unordered;
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softfloat_raiseFlags(&status, softfloat_flag_invalid);
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}
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else {
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rc = extF80_compare(a, f64_to_extF80(load_reg, &status), &status);
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}
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setcc(status_word_flags_fpu_compare(rc));
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if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FICOM_WORD_INTEGER(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR FPU_check_pending_exceptions();
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int pop_stack = (i->getIaOpcode() == BX_IA_FICOMP_WORD_INTEGER);
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RMAddr(i) = BX_CPU_RESOLVE_ADDR(i);
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Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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if (IS_TAG_EMPTY(0))
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{
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FPU_exception(i, FPU_EX_Stack_Underflow);
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setcc(FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
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if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
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{
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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softfloat_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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int rc = extF80_compare(BX_READ_FPU_REG(0),
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i32_to_extF80((Bit32s)(load_reg)), &status);
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setcc(status_word_flags_fpu_compare(rc));
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if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FICOM_DWORD_INTEGER(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR FPU_check_pending_exceptions();
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int pop_stack = (i->getIaOpcode() == BX_IA_FICOMP_DWORD_INTEGER);
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RMAddr(i) = BX_CPU_RESOLVE_ADDR(i);
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Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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if (IS_TAG_EMPTY(0))
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{
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FPU_exception(i, FPU_EX_Stack_Underflow);
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setcc(FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
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if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
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{
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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softfloat_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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int rc = extF80_compare(BX_READ_FPU_REG(0), i32_to_extF80(load_reg), &status);
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setcc(status_word_flags_fpu_compare(rc));
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if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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/* DE D9 - FCOMPP */
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/* DA E9 - FUCOMPP */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOMPP(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR FPU_check_pending_exceptions();
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(1))
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{
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FPU_exception(i, FPU_EX_Stack_Underflow);
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setcc(FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
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if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
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{
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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bool quiet = (i->getIaOpcode() == BX_IA_FUCOMPP);
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softfloat_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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int rc = extF80_compare(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), quiet, &status);
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setcc(status_word_flags_fpu_compare(rc));
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if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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/* D9 E4 */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FTST(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR FPU_check_pending_exceptions();
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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if (IS_TAG_EMPTY(0)) {
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FPU_exception(i, FPU_EX_Stack_Underflow);
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setcc(FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
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}
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else {
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static floatx80 Const_Z = packFloatx80(0, 0x0000, 0);
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softfloat_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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int rc = extF80_compare(BX_READ_FPU_REG(0), Const_Z, &status);
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setcc(status_word_flags_fpu_compare(rc));
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FPU_exception(i, status.softfloat_exceptionFlags);
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}
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BX_NEXT_INSTR(i);
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}
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/* D9 E5 */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FXAM(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR FPU_check_pending_exceptions();
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
floatx80 reg = BX_READ_FPU_REG(0);
|
|
int sign = extF80_sign(reg);
|
|
|
|
/*
|
|
* Examine the contents of the ST(0) register and sets the condition
|
|
* code flags C0, C2 and C3 in the FPU status word to indicate the
|
|
* class of value or number in the register.
|
|
*/
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
{
|
|
setcc(FPU_SW_C3|FPU_SW_C1|FPU_SW_C0);
|
|
}
|
|
else
|
|
{
|
|
softfloat_class_t aClass = extF80_class(reg);
|
|
|
|
switch(aClass)
|
|
{
|
|
case softfloat_zero:
|
|
setcc(FPU_SW_C3|FPU_SW_C1);
|
|
break;
|
|
|
|
case softfloat_SNaN:
|
|
case softfloat_QNaN:
|
|
// unsupported handled as NaNs
|
|
if (extF80_isUnsupported(reg)) {
|
|
setcc(FPU_SW_C1);
|
|
} else {
|
|
setcc(FPU_SW_C1|FPU_SW_C0);
|
|
}
|
|
break;
|
|
|
|
case softfloat_negative_inf:
|
|
case softfloat_positive_inf:
|
|
setcc(FPU_SW_C2|FPU_SW_C1|FPU_SW_C0);
|
|
break;
|
|
|
|
case softfloat_denormal:
|
|
setcc(FPU_SW_C3|FPU_SW_C2|FPU_SW_C1);
|
|
break;
|
|
|
|
case softfloat_normalized:
|
|
setcc(FPU_SW_C2|FPU_SW_C1);
|
|
break;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* The C1 flag is set to the sign of the value in ST(0), regardless
|
|
* of whether the register is empty or full.
|
|
*/
|
|
if (! sign)
|
|
clear_C1();
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
#endif
|