Bochs/bochs/cpu/todo
Stanislav Shwartsman 44241a1e56 - Added support for AVX and AVX2 instructions emulation, to enable configure
with --enable-avx option. When compiled in, AVX still has to be enabled
    using .bochsrc CPUID option. AVX2 FMA instructions still not implemented.

  - Added support for Bit Manipulation Instructions (BMI) emulation. The BMI
    instructions support can be enabled using .bochsrc CPUID option.
2011-08-27 13:47:16 +00:00

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TODO (know issues in CPU model):
-------------------------------
[!] The following 3DNow! instructions still not implemented:
PF2IW_PqQq
PFNACC_PqQq
PFPNACC_PqQq
PFCMPGE_PqQq
PFCMPGT_PqQq
PFCMPEQ_PqQq
PFMIN_PqQq
PFMAX_PqQq
PFRCP_PqQq
PFRSQRT_PqQq
PFSUB_PqQq
PFSUBR_PqQq
PFADD_PqQq
PFACC_PqQq,
PFMUL_PqQq
PFRCPIT1_PqQq
PFRSQIT1_PqQq
PFRCPIT2_PqQq
[!] CPUID does not report 3DNow! instruction set
[!] Some of APIC functionality still not implemented, for example
- LVT pins handling
- Filter interrupts according processor priority (PPR)
[!] REP NOP is PAUSE (on P4/XEON)
When running in SMP mode, this means that we are in a spin loop.
This processor should yield to the other one, as we are anyhow waiting
for a lock, and any other processor is responsible for this.
[!] 32-bit linear address wrap when executing in legacy mode might be
not implemented correctly for system memory accesses (like descriptor
tables and etc)
[!] AMD and Intel x86_64 implementations are different.
Currently Bochs emulation is according to Intel version.
Do we need to support both ?
[!] VMX:
- Dual-monitor treatment of SMIs and SMM not implemented yet
- VMENTER to not-active state not supported yet
[!] SMX, FMA, SVM, XOP, TBM
[!] TODO: Convert CPUDB to plugins and search for them in runtime