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Bochs/bochs/cpu/bmi64.cc
Stanislav Shwartsman 44241a1e56 - Added support for AVX and AVX2 instructions emulation, to enable configure 
with --enable-avx option. When compiled in, AVX still has to be enabled
    using .bochsrc CPUID option. AVX2 FMA instructions still not implemented.

  - Added support for Bit Manipulation Instructions (BMI) emulation. The BMI
    instructions support can be enabled using .bochsrc CPUID option.
2011-08-27 13:47:16 +00:00

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/////////////////////////////////////////////////////////////////////////
// $Id$
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2011 The Bochs Project
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
// License as published by the Free Software Foundation; either
// version 2 of the License, or (at your option) any later version.
//
// This library is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// Lesser General Public License for more details.
//
// You should have received a copy of the GNU Lesser General Public
// License along with this library; if not, write to the Free Software
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
/////////////////////////////////////////////////////////////////////////
#define NEED_CPU_REG_SHORTCUTS 1
#include "bochs.h"
#include "cpu.h"
#define LOG_THIS BX_CPU_THIS_PTR
#if BX_SUPPORT_X86_64 && BX_SUPPORT_AVX
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ANDN_GqBqEqR(bxInstruction_c *i)
{
if (!protected_mode()) {
BX_DEBUG(("ANDN_GqBqEq: not recognized in real or virtual-8086 mode"));
exception(BX_UD_EXCEPTION, 0);
}
Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
Bit64u op2_64 = BX_READ_64BIT_REG(i->vvv());
op1_64 = op1_64 & ~op2_64;
SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
BX_WRITE_64BIT_REG(i->nnn(), op1_64);
BX_NEXT_INSTR(i);
}
extern void long_mul(Bit128u *product, Bit64u op1, Bit64u op2);
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MULX_GqBqEqR(bxInstruction_c *i)
{
if (!protected_mode()) {
BX_DEBUG(("MULX_GqBqEqR: not recognized in real or virtual-8086 mode"));
exception(BX_UD_EXCEPTION, 0);
}
Bit64u op1_64 = RDX;
Bit64u op2_64 = BX_READ_64BIT_REG(i->rm());
Bit128u product_128;
// product_128 = ((Bit128u) op1_64) * ((Bit128u) op2_64);
// product_64l = (Bit64u) (product_128 & 0xFFFFFFFFFFFFFFFF);
// product_64h = (Bit64u) (product_128 >> 64);
long_mul(&product_128,op1_64,op2_64);
BX_WRITE_64BIT_REG(i->vvv(), product_128.lo);
BX_WRITE_64BIT_REG(i->nnn(), product_128.hi);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLSI_BqEqR(bxInstruction_c *i)
{
if (!protected_mode()) {
BX_DEBUG(("BLSI_BqEq: not recognized in real or virtual-8086 mode"));
exception(BX_UD_EXCEPTION, 0);
}
Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
bx_bool tmpCF = (op1_64 == 0);
op1_64 = (-op1_64) & op1_64;
SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
set_CF(tmpCF);
BX_WRITE_64BIT_REG(i->vvv(), op1_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLSMSK_BqEqR(bxInstruction_c *i)
{
if (!protected_mode()) {
BX_DEBUG(("BLSMSK_BqEq: not recognized in real or virtual-8086 mode"));
exception(BX_UD_EXCEPTION, 0);
}
Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
bx_bool tmpCF = (op1_64 == 0);
op1_64 = (op1_64-1) ^ op1_64;
SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
set_CF(tmpCF);
BX_WRITE_64BIT_REG(i->vvv(), op1_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLSR_BqEqR(bxInstruction_c *i)
{
if (!protected_mode()) {
BX_DEBUG(("BLSR_BqEq: not recognized in real or virtual-8086 mode"));
exception(BX_UD_EXCEPTION, 0);
}
Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
bx_bool tmpCF = (op1_64 == 0);
op1_64 = (op1_64-1) & op1_64;
SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
set_CF(tmpCF);
BX_WRITE_64BIT_REG(i->vvv(), op1_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::RORX_GqEqIbR(bxInstruction_c *i)
{
if (!protected_mode()) {
BX_DEBUG(("RORX_GqEqIb: not recognized in real or virtual-8086 mode"));
exception(BX_UD_EXCEPTION, 0);
}
Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
unsigned count = i->Ib() & 0x3f;
if (count) {
op1_64 = (op1_64 >> count) | (op1_64 << (64 - count));
}
BX_WRITE_64BIT_REG(i->nnn(), op1_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SHRX_GqEqBqR(bxInstruction_c *i)
{
if (!protected_mode()) {
BX_DEBUG(("SHRX_GqEqBqR: not recognized in real or virtual-8086 mode"));
exception(BX_UD_EXCEPTION, 0);
}
Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
unsigned count = BX_READ_32BIT_REG(i->vvv()) & 0x3f;
if (count)
op1_64 >>= count;
BX_WRITE_64BIT_REG(i->nnn(), op1_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SARX_GqEqBqR(bxInstruction_c *i)
{
if (!protected_mode()) {
BX_DEBUG(("SARX_GqEqBqR: not recognized in real or virtual-8086 mode"));
exception(BX_UD_EXCEPTION, 0);
}
Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
unsigned count = BX_READ_32BIT_REG(i->vvv()) & 0x3f;
if (count) {
/* count < 64, since only lower 6 bits used */
op1_64 = ((Bit64s) op1_64) >> count;
}
BX_WRITE_64BIT_REG(i->nnn(), op1_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SHLX_GqEqBqR(bxInstruction_c *i)
{
if (!protected_mode()) {
BX_DEBUG(("SHLX_GqEqBqR: not recognized in real or virtual-8086 mode"));
exception(BX_UD_EXCEPTION, 0);
}
Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
unsigned count = BX_READ_32BIT_REG(i->vvv()) & 0x3f;
if (count)
op1_64 <<= count;
BX_WRITE_64BIT_REG(i->nnn(), op1_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BEXTR_GqEqBqR(bxInstruction_c *i)
{
if (!protected_mode()) {
BX_DEBUG(("BEXTR_GqEqBqR: not recognized in real or virtual-8086 mode"));
exception(BX_UD_EXCEPTION, 0);
}
Bit16u control = BX_READ_16BIT_REG(i->vvv());
unsigned start = control & 0xff;
unsigned len = control >> 8;
Bit64u op1_64 = 0;
if (start < 64 && len > 0) {
op1_64 = BX_READ_64BIT_REG(i->rm());
op1_64 >>= start;
if (len < 64) {
Bit64u extract_mask = (BX_CONST64(1) << len) - 1;
op1_64 &= extract_mask;
}
}
SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
BX_WRITE_64BIT_REG(i->nnn(), op1_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BZHI_GqEqBqR(bxInstruction_c *i)
{
if (!protected_mode()) {
BX_DEBUG(("BZHI_GqEqBqR: not recognized in real or virtual-8086 mode"));
exception(BX_UD_EXCEPTION, 0);
}
unsigned control = BX_READ_16BIT_REG(i->vvv()) & 0xff;
bx_bool tmpCF = 0;
Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
if (control < 64) {
Bit64u mask = (BX_CONST64(1) << control) - 1;
op1_64 &= mask;
}
else {
tmpCF = 1;
}
SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
set_CF(tmpCF);
BX_WRITE_64BIT_REG(i->nnn(), op1_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::PEXT_GqEqBqR(bxInstruction_c *i)
{
if (!protected_mode()) {
BX_DEBUG(("PEXT_GqEqBqR: not recognized in real or virtual-8086 mode"));
exception(BX_UD_EXCEPTION, 0);
}
Bit64u op1_64 = BX_READ_64BIT_REG(i->vvv());
Bit64u op2_64 = BX_READ_64BIT_REG(i->rm()), result_64 = 0;
Bit64u wr_mask = 0x1;
for (; op2_64 != 0; op2_64 >>= 1)
{
if (op2_64 & 0x1) {
if (op1_64 & 0x1) result_64 |= wr_mask;
wr_mask <<= 1;
}
op1_64 >>= 1;
}
BX_WRITE_64BIT_REG(i->nnn(), result_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::PDEP_GqEqBqR(bxInstruction_c *i)
{
if (!protected_mode()) {
BX_DEBUG(("PDEP_GqEqBqR: not recognized in real or virtual-8086 mode"));
exception(BX_UD_EXCEPTION, 0);
}
Bit64u op1_64 = BX_READ_64BIT_REG(i->vvv());
Bit64u op2_64 = BX_READ_64BIT_REG(i->rm()), result_64 = 0;
Bit64u wr_mask = 0x1;
for (; op2_64 != 0; op2_64 >>= 1)
{
if (op2_64 & 0x1) {
if (op1_64 & 0x1) result_64 |= wr_mask;
op1_64 >>= 1;
}
wr_mask <<= 1;
}
BX_WRITE_64BIT_REG(i->nnn(), result_64);
BX_NEXT_INSTR(i);
}
#endif
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