Stanislav Shwartsman 968b2744f4 According to the Intel (and AMD) manuals a lot different SSE/SSE2 opcodes ...

has EXACTLY the same operation.

Deleted first three redundant opcodes:
   MOVAPS_VpsWps  (0f 28) = MOVAPD_VpdWpd  (66 0f 28)
   MOVAPS_WpsVps  (0f 29) = MOVAPD_WpdVpd  (66 0f 29)
   MOVNTPS_MdqVps (0f 2b) = MOVNTPD_MdqVpd (66 0f 2b)

Until checking:
XORPS,XORPD
ORPS,ORPD
ANDPS,ANDPD
ANDNPS,ANDNPD
MOVUPS,MOVUPD
MOVLPS,MOVLPD
MOVHPS,MOVHPD

2002-11-13 21:35:17 +00:00

bochs

According to the Intel (and AMD) manuals a lot different SSE/SSE2 opcodes

2002-11-13 21:35:17 +00:00

bochs-performance

- add comments describing how blur-translate works

2002-04-17 22:51:58 +00:00

bochs-testing

- add test results for Linux, Solaris, and MacOS X

2002-10-17 07:16:22 +00:00

CVSROOT

- fixing { parameter

2002-03-21 07:15:06 +00:00

sfsite

- fix date of previous irc conversation

2002-10-22 03:00:14 +00:00

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