596 lines
17 KiB
C++
596 lines
17 KiB
C++
/*
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* PCIDEV: PCI host device mapping
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* Copyright (C) 2003 - Frank Cornelis
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License version 2 as published by the Free Software Foundation.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/*
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* Based on pcivga code:
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* Copyright (C) 2002,2003 Mike Nordell
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*/
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// Define BX_PLUGGABLE in files that can be compiled into plugins. For
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// platforms that require a special tag on exported symbols, BX_PLUGGABLE
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// is used to know when we are exporting symbols and when we are importing.
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#define BX_PLUGGABLE
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#include "iodev.h"
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#if BX_SUPPORT_PCI && BX_SUPPORT_PCIDEV
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#include "kernel_pcidev.h"
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#include <sys/ioctl.h>
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#include <signal.h>
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#include <linux/pci.h>
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#define LOG_THIS thePciDevAdapter->
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bx_pcidev_c* thePciDevAdapter = 0;
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int
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libpcidev_LTX_plugin_init(plugin_t *plugin, plugintype_t type, int argc, char *argv[])
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{
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thePciDevAdapter = new bx_pcidev_c ();
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bx_devices.pluginPciDevAdapter = thePciDevAdapter;
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BX_REGISTER_DEVICE_DEVMODEL(plugin, type, thePciDevAdapter, BX_PLUGIN_PCIDEV);
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return 0; // Success
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}
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void
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libpcidev_LTX_plugin_fini(void)
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{
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}
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bx_pcidev_c::bx_pcidev_c(void)
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{
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put("PCI2H");
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settype(PCIDEVLOG);
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}
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bx_pcidev_c::~bx_pcidev_c(void)
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{
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// nothing for now
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BX_DEBUG(("Exit."));
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}
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static void pcidev_sighandler(int param)
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{
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unsigned long irq = ((bx_pcidev_c *)bx_devices.pluginPciDevAdapter)->irq;
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BX_INFO(("Interrupt received."));
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DEV_pic_lower_irq(irq);
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/*
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* We need to first lower the IRQ line or else we don't
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* get any IRQs through
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*/
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DEV_pic_raise_irq(irq);
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}
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static bx_bool pcidev_mem_read_handler(unsigned long addr, unsigned long len, void *data, void *param)
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{
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struct region_struct *region = (struct region_struct *)param;
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bx_pcidev_c *pcidev = region->pcidev;
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int fd = pcidev->pcidev_fd;
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int ret = -1;
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if (fd == -1)
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return false; /* we failed to handle the request, so let a default handler do it for us */
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BX_INFO(("Reading I/O memory at 0x%08x", (unsigned)addr));
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struct pcidev_io_struct io;
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io.address = addr + region->host_start - region->start;
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switch(len) {
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case 1:
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ret = ioctl(fd, PCIDEV_IOCTL_READ_MEM_BYTE, &io);
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*(unsigned char *)data = io.value;
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break;
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case 2:
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ret = ioctl(fd, PCIDEV_IOCTL_READ_MEM_WORD, &io);
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*(unsigned short *)data = io.value;
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break;
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case 4:
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ret = ioctl(fd, PCIDEV_IOCTL_READ_MEM_DWORD, &io);
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*(unsigned long *)data = io.value;
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break;
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default:
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BX_ERROR(("Unsupported pcidev read mem operation"));
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break;
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}
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if (ret == -1) {
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BX_ERROR(("pcidev read mem error"));
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}
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return true; // ok, we handled the request
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}
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static bx_bool pcidev_mem_write_handler(unsigned long addr, unsigned long len, void *data, void *param)
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{
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struct region_struct *region = (struct region_struct *)param;
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bx_pcidev_c *pcidev = region->pcidev;
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int fd = pcidev->pcidev_fd;
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int ret = -1;
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if (fd == -1)
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return false; /* we failed to handle the request, so let a default handler do it for us */
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BX_INFO(("Writing I/O memory at 0x%08x", (unsigned)addr));
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struct pcidev_io_struct io;
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io.address = addr + region->host_start - region->start;
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switch(len) {
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case 1:
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io.value = *(unsigned char *)data;
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ret = ioctl(fd, PCIDEV_IOCTL_WRITE_MEM_BYTE, &io);
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break;
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case 2:
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io.value = *(unsigned short *)data;
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ret = ioctl(fd, PCIDEV_IOCTL_WRITE_MEM_WORD, &io);
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break;
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case 4:
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io.value = *(unsigned long *)data;
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ret = ioctl(fd, PCIDEV_IOCTL_WRITE_MEM_DWORD, &io);
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break;
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default:
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BX_ERROR(("Unsupported pcidev write mem operation"));
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break;
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}
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if (ret == -1) {
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BX_ERROR(("pcidev write mem error"));
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}
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return true;
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}
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static const char * const pcidev_name = "Experimental PCI 2 host PCI";
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void
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bx_pcidev_c::init(void)
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{
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// called once when bochs initializes
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BX_PCIDEV_THIS pcidev_fd = -1;
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int fd;
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fd = open("/dev/pcidev", O_RDWR);
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if (fd == -1) {
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switch(errno) {
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case ENODEV:
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BX_ERROR(("The pcidev kernel module is not loaded!"));
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break;
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default:
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perror("open /dev/pcidev");
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break;
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}
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return;
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}
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BX_PCIDEV_THIS pcidev_fd = fd;
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struct pcidev_find_struct find;
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unsigned short vendor = bx_options.pcidev.Ovendor->get();
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unsigned short device = bx_options.pcidev.Odevice->get();
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find.deviceID = device;
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find.vendorID = vendor;
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if (ioctl(fd, PCIDEV_IOCTL_FIND, &find) == -1) {
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switch (errno) {
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case ENOENT:
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BX_ERROR(("PCI device not found on host system."));
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break;
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case EBUSY:
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BX_ERROR(("PCI device already used by another kernel module."));
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break;
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default:
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perror("ioctl");
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break;
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}
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close(fd);
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BX_PCIDEV_THIS pcidev_fd = -1;
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return;
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}
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BX_INFO(("vendor: %04x; device: %04x @ host %04x:%04x.%d", vendor, device,
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(unsigned)find.bus, (unsigned)find.device, (unsigned)find.func));
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Bit8u devfunc = 0x00;
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DEV_register_pci_handlers(this,
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pci_read_handler,
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pci_write_handler,
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&devfunc, BX_PLUGIN_PCIDEV,
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pcidev_name);
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BX_PCIDEV_THIS irq = PCIDEV_IRQ; // initial irq value
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/*
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* Next function just checks against IRQ sharing... for now Bochs
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* does not allow this... should be changed... IRQ sharing for PCI
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* devices is quite common
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*/
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DEV_register_irq(BX_PCIDEV_THIS irq, pcidev_name);
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for (int idx = 0; idx < PCIDEV_COUNT_RESOURCES; idx++) {
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if (!find.resources[idx].start)
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continue;
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BX_INFO(("PCI resource @ %x-%x (%s)", (unsigned)find.resources[idx].start,
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(unsigned)find.resources[idx].end,
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(find.resources[idx].flags & PCIDEV_RESOURCE_IO ? "I/O" : "Mem")));
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BX_PCIDEV_THIS regions[idx].start = find.resources[idx].start;
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BX_PCIDEV_THIS regions[idx].end = find.resources[idx].end;
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BX_PCIDEV_THIS regions[idx].host_start = find.resources[idx].start; // we start with an identical mapping
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struct pcidev_io_struct io;
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io.address = PCI_BASE_ADDRESS_0 + idx * 4;
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if (ioctl(fd, PCIDEV_IOCTL_READ_CONFIG_DWORD, &io) == -1)
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BX_ERROR(("Error reading a base address config reg."));
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BX_PCIDEV_THIS regions[idx].config_value = io.value;
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/*
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* We will use ®ion[idx] as parameter for our I/O or memory
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* handler. So we provide a pcidev pointer to the pcidev object
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* in order for the handle to be able to use its pcidev object
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*/
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BX_PCIDEV_THIS regions[idx].pcidev = this;
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unsigned long flags = find.resources[idx].flags;
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if (flags & PCIDEV_RESOURCE_IO) {
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BX_INFO(("Registering I/O port handler for %x to %x", (unsigned)find.resources[idx].start,
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(unsigned)find.resources[idx].end));
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if (!DEV_register_ioread_handler_range(&(BX_PCIDEV_THIS regions[idx]),
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read_handler, find.resources[idx].start,
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find.resources[idx].end, "pcidev", 7))
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BX_ERROR(("Could not register I/O port read handler range %#x to %#x",
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(unsigned)find.resources[idx].start,
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(unsigned)find.resources[idx].end));
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if (!DEV_register_iowrite_handler_range(&(BX_PCIDEV_THIS regions[idx]),
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write_handler, find.resources[idx].start,
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find.resources[idx].end, "pcidev", 7))
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BX_ERROR(("Could not register I/O port write handler range %#x to %#x",
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(unsigned)find.resources[idx].start,
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(unsigned)find.resources[idx].end));
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}
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else if (flags & PCIDEV_RESOURCE_MEM) {
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BX_INFO(("Registering memory I/O handler for %#x to %#x",
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(unsigned)find.resources[idx].start,
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(unsigned)find.resources[idx].end));
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DEV_register_memory_handlers(pcidev_mem_read_handler,
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&(BX_PCIDEV_THIS regions[idx]),
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pcidev_mem_write_handler,
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&(BX_PCIDEV_THIS regions[idx]),
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find.resources[idx].start,
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find.resources[idx].end);
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}
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}
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struct sigaction sa;
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sa.sa_handler = pcidev_sighandler;
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sigemptyset(&sa.sa_mask);
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sa.sa_flags = 0;
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sigaction(SIGUSR1, &sa, NULL);
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/*
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* The kernel pcidev will fire SIGUSR1 signals when it receives
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* interrupts from the host PCI device.
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*/
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ioctl(fd, PCIDEV_IOCTL_INTERRUPT, 1);
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/*
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* Let the kernel fire some fake IRQ signals
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*/
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//ioctl(fd, PCIDEV_IOCTL_INTERRUPT_TEST, 1);
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}
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void
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bx_pcidev_c::reset(unsigned type)
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{
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}
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// static pci configuration space read callback handler
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// redirects to non-static class handler to avoid virtual functions
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Bit32u
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bx_pcidev_c::pci_read_handler(void *this_ptr, Bit8u address, unsigned io_len)
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{
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#if !BX_USE_PCIDEV_SMF
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bx_pcidev_c *class_ptr = (bx_pcidev_c *) this_ptr;
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return class_ptr->pci_read(address, io_len);
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}
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Bit32u
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bx_pcidev_c::pci_read(Bit8u address, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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#endif // !BX_USE_PCIDEV_SMF
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int ret = -1;
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if (io_len > 4 || io_len == 0) {
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BX_DEBUG(("Experimental PCIDEV read register 0x%02x, len=%u !",
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(unsigned) address, (unsigned) io_len));
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return 0xffffffff;
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}
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int fd = BX_PCIDEV_THIS pcidev_fd;
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if (fd == -1)
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return 0xffffffff;
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struct pcidev_io_struct io;
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io.address = address;
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switch(io_len) {
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case 1:
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ret = ioctl(fd, PCIDEV_IOCTL_READ_CONFIG_BYTE, &io);
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break;
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case 2:
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ret = ioctl(fd, PCIDEV_IOCTL_READ_CONFIG_WORD, &io);
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break;
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case 4:
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ret = ioctl(fd, PCIDEV_IOCTL_READ_CONFIG_DWORD, &io);
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break;
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}
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if (ret == -1)
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BX_ERROR(("pcidev config read error"));
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// we don't use the host irq line but our own bochs irq line
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if (address == PCI_INTERRUPT_LINE) {
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io.value = (io.value & 0xffffff00) | (BX_PCIDEV_THIS irq & 0xff);
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}
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if (PCI_BASE_ADDRESS_0 <= address && address <= PCI_BASE_ADDRESS_5) {
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BX_INFO(("Reading pcidev base address %d.",
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(address - PCI_BASE_ADDRESS_0) / 4));
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if (address & 3)
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BX_ERROR(("base address not aligned!"));
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io.value = BX_PCIDEV_THIS regions[(address - PCI_BASE_ADDRESS_0) >> 2].config_value;
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}
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return io.value;
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}
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// static pci configuration space write callback handler
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// redirects to non-static class handler to avoid virtual functions
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void
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bx_pcidev_c::pci_write_handler(void *this_ptr, Bit8u address, Bit32u value, unsigned io_len)
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{
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#if !BX_USE_PCIDEV_SMF
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bx_pcidev_c *class_ptr = (bx_pcidev_c *) this_ptr;
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class_ptr->pci_write(address, value, io_len);
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}
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void
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bx_pcidev_c::pci_write(Bit8u address, Bit32u value, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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#endif // !BX_USE_PCIDEV_SMF
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int ret = -1;
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if (io_len > 4 || io_len == 0) {
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BX_DEBUG(("Experimental PCIDEV write register 0x%02x, len=%u !",
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(unsigned) address, (unsigned) io_len));
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return;
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}
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int fd = BX_PCIDEV_THIS pcidev_fd;
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if (fd == -1)
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return;
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// we do a host 2 guest irq line mapping
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if (address == PCI_INTERRUPT_LINE) {
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value &= 0xff;
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BX_INFO(("Changing the pcidev irq line from %d to %d",
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BX_PCIDEV_THIS irq, value));
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if (BX_PCIDEV_THIS irq)
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DEV_unregister_irq(BX_PCIDEV_THIS irq, pcidev_name);
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BX_PCIDEV_THIS irq = value;
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if (BX_PCIDEV_THIS irq) // win98 likes to set irq = 0 at power off
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DEV_register_irq(BX_PCIDEV_THIS irq, pcidev_name);
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return;
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}
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if (PCI_BASE_ADDRESS_0 <= address && address <= PCI_BASE_ADDRESS_5) {
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/*
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* Two things to do here:
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* - update the cached config space value via a probe
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* - remap the I/O or memory handler if required
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*/
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BX_INFO(("Changing pcidev base address %d. New value: %#x",
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(address - PCI_BASE_ADDRESS_0) / 4, value));
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if (address & 3) {
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BX_ERROR(("base address not aligned!"));
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return;
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}
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int io_reg_idx = (address - PCI_BASE_ADDRESS_0) >> 2;
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struct pcidev_io_struct io;
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io.address = address;
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io.value = value;
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ret = ioctl(fd, PCIDEV_IOCTL_PROBE_CONFIG_DWORD, &io);
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if (ret == -1) {
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BX_ERROR(("Error probing a base address reg!"));
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return;
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}
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unsigned long base = io.value;
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BX_PCIDEV_THIS regions[io_reg_idx].config_value = base;
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/* remap the I/O or memory handler if required using io.value
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* We assume that an I/O memory region will stay and I/O memory
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* region. And that an I/O port region also will stay an I/O port
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* region.
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*/
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if ((base & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY) {
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BX_INFO(("Remapping memory region from %#x to %#x",
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(unsigned)BX_PCIDEV_THIS regions[io_reg_idx].start,
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(unsigned)(base & PCI_BASE_ADDRESS_MEM_MASK)));
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if (BX_PCIDEV_THIS regions[io_reg_idx].start && // dirty hack
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!DEV_unregister_memory_handlers(pcidev_mem_read_handler,
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pcidev_mem_write_handler,
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BX_PCIDEV_THIS regions[io_reg_idx].start,
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BX_PCIDEV_THIS regions[io_reg_idx].end))
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BX_ERROR(("Error while unregistering old memory handlers!"));
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BX_PCIDEV_THIS regions[io_reg_idx].end =
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BX_PCIDEV_THIS regions[io_reg_idx].end +
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(base & PCI_BASE_ADDRESS_MEM_MASK) -
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BX_PCIDEV_THIS regions[io_reg_idx].start;
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BX_PCIDEV_THIS regions[io_reg_idx].start = base & PCI_BASE_ADDRESS_MEM_MASK;
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if (BX_PCIDEV_THIS regions[io_reg_idx].start) // dirty hack
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DEV_register_memory_handlers(pcidev_mem_read_handler,
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&(BX_PCIDEV_THIS regions[io_reg_idx]),
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pcidev_mem_write_handler,
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&(BX_PCIDEV_THIS regions[io_reg_idx]),
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BX_PCIDEV_THIS regions[io_reg_idx].start,
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BX_PCIDEV_THIS regions[io_reg_idx].end);
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}
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else {
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/*
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* Remap our I/O port handlers here.
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*/
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BX_INFO(("Remapping I/O port region from %x to %x",
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(unsigned)BX_PCIDEV_THIS regions[io_reg_idx].start,
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(unsigned)(base & PCI_BASE_ADDRESS_IO_MASK)));
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if (BX_PCIDEV_THIS regions[io_reg_idx].start) { // dirty hack
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if (!DEV_unregister_ioread_handler_range(&(BX_PCIDEV_THIS regions[io_reg_idx]),
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read_handler,
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BX_PCIDEV_THIS regions[io_reg_idx].start,
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BX_PCIDEV_THIS regions[io_reg_idx].end,
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7))
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BX_ERROR(("Error while unregistering old I/O port read handlers!"));
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if (!DEV_unregister_iowrite_handler_range(&(BX_PCIDEV_THIS regions[io_reg_idx]),
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write_handler,
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BX_PCIDEV_THIS regions[io_reg_idx].start,
|
|
BX_PCIDEV_THIS regions[io_reg_idx].end,
|
|
7))
|
|
BX_ERROR(("Error while unregistering old I/O port write handlers!"));
|
|
}
|
|
BX_PCIDEV_THIS regions[io_reg_idx].end =
|
|
BX_PCIDEV_THIS regions[io_reg_idx].end +
|
|
(base & PCI_BASE_ADDRESS_IO_MASK) -
|
|
BX_PCIDEV_THIS regions[io_reg_idx].start;
|
|
BX_PCIDEV_THIS regions[io_reg_idx].start = base & PCI_BASE_ADDRESS_IO_MASK;
|
|
if (BX_PCIDEV_THIS regions[io_reg_idx].start) { // dirty hack
|
|
DEV_register_ioread_handler_range(
|
|
&(BX_PCIDEV_THIS regions[io_reg_idx]),
|
|
read_handler,
|
|
BX_PCIDEV_THIS regions[io_reg_idx].start,
|
|
BX_PCIDEV_THIS regions[io_reg_idx].end,
|
|
"pcidev", 7);
|
|
DEV_register_iowrite_handler_range(
|
|
&(BX_PCIDEV_THIS regions[io_reg_idx]),
|
|
write_handler,
|
|
BX_PCIDEV_THIS regions[io_reg_idx].start,
|
|
BX_PCIDEV_THIS regions[io_reg_idx].end,
|
|
"pcidev", 7);
|
|
}
|
|
}
|
|
return;
|
|
}
|
|
|
|
struct pcidev_io_struct io;
|
|
io.address = address;
|
|
io.value = value;
|
|
|
|
switch(io_len) {
|
|
case 1:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_WRITE_CONFIG_BYTE, &io);
|
|
break;
|
|
case 2:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_WRITE_CONFIG_WORD, &io);
|
|
break;
|
|
case 4:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_WRITE_CONFIG_DWORD, &io);
|
|
break;
|
|
}
|
|
if (ret == -1)
|
|
BX_ERROR(("pcidev config write error"));
|
|
}
|
|
|
|
|
|
Bit32u
|
|
bx_pcidev_c::read_handler(void *param, Bit32u address, unsigned io_len)
|
|
{
|
|
#if !BX_USE_PCIDEV_SMF
|
|
bx_pcidev_c *class_ptr = ((struct region_struct *)param)->pcidev;
|
|
|
|
return class_ptr->read(param, address, io_len);
|
|
}
|
|
|
|
Bit32u
|
|
bx_pcidev_c::read(void *param, Bit32u address, unsigned io_len)
|
|
{
|
|
#endif // !BX_USE_PCIDEV_SMF
|
|
struct region_struct *region = (struct region_struct *)param;
|
|
int ret = -1;
|
|
|
|
int fd = BX_PCIDEV_THIS pcidev_fd;
|
|
if (fd == -1)
|
|
return 0xffffffff;
|
|
|
|
struct pcidev_io_struct io;
|
|
// here we map the io address
|
|
io.address = address + region->host_start - region->start;
|
|
switch(io_len) {
|
|
case 1:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_READ_IO_BYTE, &io);
|
|
break;
|
|
case 2:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_READ_IO_WORD, &io);
|
|
break;
|
|
case 4:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_READ_IO_DWORD, &io);
|
|
break;
|
|
}
|
|
if (ret == -1) {
|
|
BX_ERROR(("pcidev read I/O error"));
|
|
io.value = 0xffffffff;
|
|
}
|
|
|
|
return io.value;
|
|
}
|
|
|
|
void
|
|
bx_pcidev_c::write_handler(void *param, Bit32u address, Bit32u value, unsigned io_len)
|
|
{
|
|
#if !BX_USE_PCIDEV_SMF
|
|
bx_pcidev_c *class_ptr = ((struct region_struct *)param)->pcidev;
|
|
|
|
class_ptr->write(param, address, value, io_len);
|
|
}
|
|
|
|
void
|
|
bx_pcidev_c::write(void *param, Bit32u address, Bit32u value, unsigned io_len)
|
|
{
|
|
#else
|
|
//UNUSED(this_ptr);
|
|
#endif // !BX_USE_PCIDEV_SMF
|
|
struct region_struct *region = (struct region_struct *)param;
|
|
int ret = -1;
|
|
|
|
int fd = BX_PCIDEV_THIS pcidev_fd;
|
|
if (fd == -1)
|
|
return;
|
|
|
|
struct pcidev_io_struct io;
|
|
// here we map the I/O address
|
|
io.address = address + region->host_start - region->start;
|
|
io.value = value;
|
|
|
|
switch(io_len) {
|
|
case 1:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_WRITE_IO_BYTE, &io);
|
|
break;
|
|
case 2:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_WRITE_IO_WORD, &io);
|
|
break;
|
|
case 4:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_WRITE_IO_DWORD, &io);
|
|
break;
|
|
}
|
|
if (ret == -1)
|
|
BX_ERROR(("pcidev I/O write error"));
|
|
}
|
|
|
|
#endif // BX_SUPPORT_PCI && BX_SUPPORT_PCIDEV
|